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path: root/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
AgeCommit message (Expand)AuthorFilesLines
2018-03-23Re-commit: [MachineLICM] Add functions to MachineLICM to hoist invariant storesZaara Syeda1-10/+10
2018-03-19Revert [MachineLICM] This reverts commit rL327856Zaara Syeda1-10/+10
2018-03-19[MachineLICM] Add functions to MachineLICM to hoist invariant storesZaara Syeda1-10/+10
2018-03-13test commit: fix formatting of a commentZaara Syeda1-3/+3
2017-12-29[PowerPC] Fix for PR35688 - handle out-of-range values for r+r to r+i conversionNemanja Ivanovic1-1/+1
2017-12-20[PowerPC] fix a bug in redundant compare eliminationHiroshi Inoue1-5/+13
2017-12-18[PPC] Disable reg+reg to reg+imm transformation.Benjamin Kramer1-1/+1
2017-12-15MachineFunction: Return reference from getFunction(); NFCMatthias Braun1-1/+1
2017-12-15Fix code causing fallthrough warnings in the PPC back end.Nemanja Ivanovic1-1/+4
2017-12-15[PowerPC] Convert r+r instructions to r+i (pre and post RA)Nemanja Ivanovic1-48/+63
2017-12-15Disabling r312514 as it causes miscompiles that show up on bootstrapNemanja Ivanovic1-1/+1
2017-12-07[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih1-3/+3
2017-12-04[CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih1-3/+4
2017-11-30[CodeGen] Print "%vreg0" as "%0" in both MIR and debug outputFrancis Visoiu Mistrih1-5/+5
2017-11-27[PowerPC] Remove redundant TOC savesZaara Syeda1-2/+71
2017-11-15[PowerPC] fix up in redundant compare eliminationHiroshi Inoue1-2/+6
2017-10-30Revert "[PowerPC] Try to simplify a Swap if it feeds a Splat"Stefan Pintilie1-47/+0
2017-10-24[PowerPC] Try to simplify a Swap if it feeds a SplatStefan Pintilie1-0/+47
2017-10-23Revert "[PowerPC] Try to simplify a Swap if it feeds a Splat"Stefan Pintilie1-47/+0
2017-10-23[PowerPC] Try to simplify a Swap if it feeds a SplatStefan Pintilie1-0/+47
2017-10-20Disabling the transformation introduced in r315888Nemanja Ivanovic1-2/+2
2017-10-16[PowerPC] Eliminate sign- and zero-extensions if already sign- or zero-extendedHiroshi Inoue1-0/+216
2017-10-10Fix for PR34888.Nemanja Ivanovic1-3/+4
2017-10-03[trivial] fix format, NFCHiroshi Inoue1-1/+1
2017-09-28[PowerPC] eliminate partially redundant compare instructionHiroshi Inoue1-14/+180
2017-09-19[PowerPC Peephole] Constants into a join add, use ADDI over LI/ADD.Tony Jiang1-0/+116
2017-09-05[PowerPC] eliminate redundant compare instructionHiroshi Inoue1-0/+299
2017-06-06Sort the remaining #include lines in include/... and lib/....Chandler Carruth1-1/+1
2017-01-13[CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus1-10/+10
2016-12-06[PowerPC] Improvements for BUILD_VECTOR Vol. 4Nemanja Ivanovic1-9/+110
2016-10-12[PPCMIPeephole] Fix splat eliminationTim Shen1-3/+5
2016-10-04[Power9] Part-word VSX integer scalar loads/stores and sign extend instructionsNemanja Ivanovic1-0/+57
2016-04-27Add optimization bisect opt-in calls for PowerPC passesAndrew Kaylor1-0/+2
2015-11-10[PowerPC] Add an MI SSA peephole pass.Bill Schmidt1-0/+230
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