Age | Commit message (Expand) | Author | Files | Lines |
2014-12-19 | Remove unused variable, initializer, and accessor. | Eric Christopher | 1 | -1/+0 |
2014-12-17 | MipsABIInfo class is used in different libraries. Moving the files to MCTarge... | Vladimir Medic | 1 | -1/+1 |
2014-11-11 | [mips] Add preliminary support for the MIPS II target. | Vasileios Kalintiris | 1 | -0/+1 |
2014-10-24 | [mips] Replace MipsABIEnum with a MipsABIInfo class. | Daniel Sanders | 1 | -14/+8 |
2014-09-19 | constify the TargetMachine being passed through the Mips subtarget | Eric Christopher | 1 | -2/+3 |
2014-09-10 | [mips] Remove inverted predicates from MipsSubtarget that were only used by M... | Daniel Sanders | 1 | -3/+0 |
2014-09-09 | [mips] Move MipsTargetLowering::MipsCC::regSize() to MipsSubtarget::getGPRSiz... | Daniel Sanders | 1 | -0/+1 |
2014-09-02 | Reinstate "Nuke the old JIT." | Eric Christopher | 1 | -3/+0 |
2014-08-13 | Canonicalize header guards into a common format. | Benjamin Kramer | 1 | -2/+2 |
2014-08-08 | [mips] Invert the abicalls feature bit to be noabicalls so that it's possible... | Daniel Sanders | 1 | -3/+3 |
2014-08-08 | [mips] Initial implementation of -mabicalls/-mno-abicalls. | Daniel Sanders | 1 | -0/+4 |
2014-08-07 | Temporarily Revert "Nuke the old JIT." as it's not quite ready to | Eric Christopher | 1 | -0/+3 |
2014-08-07 | Nuke the old JIT. | Rafael Espindola | 1 | -3/+0 |
2014-08-04 | Remove the TargetMachine forwards for TargetSubtargetInfo based | Eric Christopher | 1 | -8/+14 |
2014-07-29 | [mips] Don't use odd-numbered single precision registers for fastcc calling | Sasa Stankovic | 1 | -0/+1 |
2014-07-18 | Fundamentally change the MipsSubtarget replacement machinery: | Eric Christopher | 1 | -20/+1 |
2014-07-18 | Avoid caching the relocation model on the subtarget, this is for | Eric Christopher | 1 | -6/+2 |
2014-07-18 | Avoid resetting the UseSoftFloat and FloatABIType on the TargetMachine | Eric Christopher | 1 | -1/+5 |
2014-07-15 | Move Post RA Scheduling flag bit into SchedMachineModel | Sanjay Patel | 1 | -3/+4 |
2014-07-14 | [mips] Expand BuildPairF64 to a spill and reload when the O32 FPXX ABI is | Sasa Stankovic | 1 | -1/+2 |
2014-07-10 | [mips] Added FPXX modeless calling convention. | Zoran Jovanovic | 1 | -0/+4 |
2014-07-10 | [mips] Add support for -modd-spreg/-mno-odd-spreg | Daniel Sanders | 1 | -0/+5 |
2014-07-08 | Mips.abiflags is a new implicitly generated section that will be present on ... | Vladimir Medic | 1 | -0/+4 |
2014-07-03 | Move subtarget dependent features into the subtarget from the target | Eric Christopher | 1 | -1/+26 |
2014-07-02 | Move the data layout and selection dag info from the mips target machine | Eric Christopher | 1 | -0/+7 |
2014-07-02 | Break out subtarget initialization that dependent variables need into | Eric Christopher | 1 | -0/+2 |
2014-07-02 | Move MipsJITInfo to the subtarget rather than the target machine. | Eric Christopher | 1 | -0/+5 |
2014-06-16 | [mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6 | Daniel Sanders | 1 | -1/+4 |
2014-06-16 | [mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6. | Daniel Sanders | 1 | -1/+1 |
2014-06-12 | [mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and ... | Daniel Sanders | 1 | -5/+10 |
2014-05-23 | [mips][mips64r6] [ls][dw][lr] are not available in MIPS32r6/MIPS64r6 | Daniel Sanders | 1 | -1/+6 |
2014-05-13 | [mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu... | Daniel Sanders | 1 | -0/+3 |
2014-05-12 | [mips] Marked up instructions added in MIPS-V and tested that IAS for -mcpu=m... | Daniel Sanders | 1 | -0/+3 |
2014-05-12 | [mips] Fold FeatureBitCount into FeatureMips32 and FeatureMips64 | Daniel Sanders | 1 | -4/+0 |
2014-05-12 | [mips] Fold FeatureSEInReg into FeatureMips32r2 | Daniel Sanders | 1 | -4/+0 |
2014-05-12 | [mips] Fold FeatureSwap into FeatureMips32r2 and FeatureMips64r2 | Daniel Sanders | 1 | -4/+0 |
2014-05-12 | [mips] Replace FeatureFPIdx with FeatureMips4_32r2 | Daniel Sanders | 1 | -5/+5 |
2014-05-09 | [mips] Marked up instructions added in MIPS-IV and tested that IAS for -mcpu=... | Daniel Sanders | 1 | -0/+4 |
2014-05-09 | [mips] Remove unused CondMov feature bit | Daniel Sanders | 1 | -4/+0 |
2014-05-09 | [mips] Marked up instructions added in MIPS-III and tested that IAS for -mcpu... | Daniel Sanders | 1 | -0/+4 |
2014-05-09 | [mips][mips64r6] Add experimental support for MIPS32r6 and MIPS64r6 | Daniel Sanders | 1 | -2/+7 |
2014-05-08 | [mips] Marked up instructions added in MIPS-II and tested that IAS for -mcpu=... | Daniel Sanders | 1 | -0/+1 |
2014-05-07 | [mips] Add highly experimental support for MIPS-I, MIPS-II, MIPS-III, and MIPS-V | Daniel Sanders | 1 | -1/+2 |
2014-04-29 | [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final... | Craig Topper | 1 | -3/+3 |
2014-04-16 | [mips] Add initial support for NaN2008 in the back-end. | Matheus Almeida | 1 | -0/+4 |
2014-04-16 | [mips] Indentation | Daniel Sanders | 1 | -4/+3 |
2014-04-03 | [mips] Add initial (experimental) MIPS-IV support. | Daniel Sanders | 1 | -4/+1 |
2014-03-20 | [MIPS] Add cpu octeon and some instructions | Kai Nacke | 1 | -0/+5 |
2014-02-07 | [mips] Forbid the use of registers t6, t7 and t8 if the target is NaCl. | Sasa Stankovic | 1 | -0/+1 |
2014-02-05 | [mips] Add NaCl target and forbid indexed loads and stores for it | Petar Jovanovic | 1 | -0/+3 |