| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2015-01-06 | Remove dead variable. | Eric Christopher | 1 | -1/+1 |
| 2014-11-21 | [mips][microMIPS] This patch implements functionality in MIPS delay slot | Jozef Kolek | 1 | -1/+3 |
| 2014-08-04 | Remove the TargetMachine forwards for TargetSubtargetInfo based | Eric Christopher | 1 | -3/+6 |
| 2014-07-18 | Make InstrInfo depend only upon the Subtarget getting passed in | Eric Christopher | 1 | -24/+22 |
| 2014-07-14 | [mips] For the FP64A ABI, odd-numbered double-precision moves must not use mt... | Daniel Sanders | 1 | -3/+21 |
| 2014-07-14 | [mips] Use MFHC1 when it is available (MIPS32r2 and later) for both FP32 and ... | Daniel Sanders | 1 | -4/+5 |
| 2014-07-14 | [mips] Expand BuildPairF64 to a spill and reload when the O32 FPXX ABI is | Sasa Stankovic | 1 | -10/+9 |
| 2014-07-09 | [mips][mips64r6] Use JALR for returns instead of JR (which is not available o... | Daniel Sanders | 1 | -11/+15 |
| 2014-06-12 | [mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and ... | Daniel Sanders | 1 | -10/+21 |
| 2014-04-25 | [C++] Use 'nullptr'. Target edition. | Craig Topper | 1 | -1/+1 |
| 2014-04-03 | Implementation of 16-bit microMIPS instructions MFHI and MFLO. | Zoran Jovanovic | 1 | -7/+13 |
| 2014-03-20 | Implementation of microMIPS 16-bit instructions MOVE and JALR. | Zoran Jovanovic | 1 | -3/+7 |
| 2014-03-12 | [mips][fp64] Add an implicit def to MTHC1 claiming that it reads the lower 32... | Daniel Sanders | 1 | -8/+20 |
| 2014-03-10 | [mips][fp64] Add an implicit def to MFHC1 claiming that it reads the lower 32... | Daniel Sanders | 1 | -3/+15 |
| 2014-03-02 | [C++11] Replace llvm::tie with std::tie. | Benjamin Kramer | 1 | -1/+2 |
| 2013-11-18 | [mips] Fix 'ran out of registers' in MIPS32 with FP64 when generating code fo... | Daniel Sanders | 1 | -2/+7 |
| 2013-10-15 | [mips] Define a pseudo instruction which writes to both the lower and higher | Akira Hatanaka | 1 | -0/+38 |
| 2013-10-07 | [mips] Fix definition of mfhi and mflo instructions to read from the whole | Akira Hatanaka | 1 | -0/+18 |
| 2013-09-27 | [mips][msa] Added support for MSA registers to copyPhysReg | Daniel Sanders | 1 | -0/+4 |
| 2013-09-07 | [mips] Enhance command line option "-mno-ldc1-sdc1" to expand base+index double | Akira Hatanaka | 1 | -61/+0 |
| 2013-08-28 | [mips][msa] Added cfcmsa, and ctcmsa | Daniel Sanders | 1 | -0/+4 |
| 2013-08-27 | [mips][msa] Added spill/reload support | Daniel Sanders | 1 | -0/+16 |
| 2013-08-20 | [mips] Add support for mfhc1 and mthc1. | Akira Hatanaka | 1 | -8/+23 |
| 2013-08-20 | [mips] Define register class FGRH32 for the high half of the 64-bit floating | Akira Hatanaka | 1 | -8/+7 |
| 2013-08-20 | [mips] Resolve register classes dynamically using ptr_rc to reduce the number of | Akira Hatanaka | 1 | -24/+20 |
| 2013-08-14 | [mips] Rename HIRegs and LORegs. | Akira Hatanaka | 1 | -12/+12 |
| 2013-08-08 | [mips] Rename accumulator register classes and FP register operands. | Akira Hatanaka | 1 | -12/+12 |
| 2013-08-06 | [mips] Rename register classes CPURegs and CPU64Regs. | Akira Hatanaka | 1 | -11/+11 |
| 2013-07-22 | [mips] Use ADDu instead of OR to copy general purpose registers. Also, delete | Akira Hatanaka | 1 | -6/+5 |
| 2013-07-19 | [mips] Delete MFC1_FT_CCR, MTC1_FT_CCR and MOVCCRToCCR. | Akira Hatanaka | 1 | -2/+0 |
| 2013-06-11 | [mips] Use function TargetInstrInfo::getRegClass. | Akira Hatanaka | 1 | -5/+7 |
| 2013-06-08 | [mips] Use a helper function which compares the size of the source and | Akira Hatanaka | 1 | -6/+18 |
| 2013-06-07 | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 1 | -1/+1 |
| 2013-05-16 | [mips] Fix instruction selection pattern for sint_to_fp node to avoid emittin... | Akira Hatanaka | 1 | -0/+37 |
| 2013-05-13 | [mips] Add option -mno-ldc1-sdc1. | Akira Hatanaka | 1 | -0/+62 |
| 2013-05-13 | [mips] Rename functions. No functionality changes. | Akira Hatanaka | 1 | -11/+11 |
| 2013-05-02 | [mips] Handle reading, writing or copying of ccond field of DSP control | Akira Hatanaka | 1 | -0/+15 |
| 2013-04-30 | [mips] Fix handling of instructions which copy to/from accumulator registers. | Akira Hatanaka | 1 | -14/+16 |
| 2013-04-02 | [mips] Small update to the implementation of eh.return for Mips. | Akira Hatanaka | 1 | -0/+4 |
| 2013-03-30 | [mips] Fix MipsSEInstrInfo::copyPhysReg, loadRegFromStack and storeRegToStack | Akira Hatanaka | 1 | -0/+18 |
| 2013-03-29 | [mips] Define overloaded versions of storeRegToStack and loadRegFromStack. | Akira Hatanaka | 1 | -11/+9 |
| 2013-01-30 | [mips] Lower EH_RETURN. | Akira Hatanaka | 1 | -0/+29 |
| 2012-12-20 | [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy | Akira Hatanaka | 1 | -5/+5 |
| 2012-12-03 | Use the new script to sort the includes of every file under lib. | Chandler Carruth | 1 | -3/+3 |
| 2012-11-03 | [mips] Stop reserving register AT and use register scavenger when a scratch | Akira Hatanaka | 1 | -7/+10 |
| 2012-11-02 | [mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directive | Akira Hatanaka | 1 | -1/+0 |
| 2012-08-23 | Make function loadImmediate a member of MipsSEInstrInfo and change it to return | Akira Hatanaka | 1 | -4/+43 |
| 2012-08-02 | Move the code that creates instances of MipsInstrInfo and MipsFrameLowering out | Akira Hatanaka | 1 | -0/+4 |
| 2012-07-31 | Implement MipsSERegisterInfo::eliminateCallFramePseudoInstr. The function emits | Akira Hatanaka | 1 | -0/+20 |
| 2012-07-31 | Add definitions of two subclasses of MipsRegisterInfo, Mips16RegisterInfo and | Akira Hatanaka | 1 | -0/+5 |
