aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
AgeCommit message (Expand)AuthorFilesLines
2014-10-16[mips] Account for endianess when expanding BuildPairF64/ExtractElementF64 no...Vasileios Kalintiris1-1/+4
2014-08-05Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher1-39/+23
2014-08-04Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher1-24/+40
2014-07-14[mips] For the FP64A ABI, odd-numbered double-precision moves must not use mt...Daniel Sanders1-9/+89
2014-07-14[mips] Expand BuildPairF64 to a spill and reload when the O32 FPXX ABI isSasa Stankovic1-0/+54
2014-07-10[mips] Emit two CFI offset directives per double precision SDC1/LDC1Zoran Jovanovic1-0/+16
2014-07-02So that we can include frame lowering in the subtarget, remove includeEric Christopher1-0/+4
2014-04-14Use FrameSetup on frame instructions for the Mips port.Eric Christopher1-1/+2
2014-03-07Replace PROLOG_LABEL with a new CFI_INSTRUCTION.Rafael Espindola1-24/+25
2013-10-07[mips] Fix definition of mfhi and mflo instructions to read from the wholeAkira Hatanaka1-27/+42
2013-08-20[mips] Define register class FGRH32 for the high half of the 64-bit floatingAkira Hatanaka1-2/+2
2013-08-20[mips] Resolve register classes dynamically using ptr_rc to reduce the number ofAkira Hatanaka1-8/+0
2013-08-08[mips] Rename accumulator register classes and FP register operands.Akira Hatanaka1-14/+14
2013-08-06[mips] Rename register classes CPURegs and CPU64Regs.Akira Hatanaka1-5/+5
2013-06-18Use pointers to the MCAsmInfo and MCRegInfo.Bill Wendling1-6/+6
2013-06-07Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling1-13/+38
2013-05-16Remove addFrameMove.Rafael Espindola1-19/+18
2013-05-11Change getFrameMoves to return a const reference.Rafael Espindola1-7/+6
2013-05-02[mips] Handle reading, writing or copying of ccond field of DSP controlAkira Hatanaka1-0/+40
2013-05-01[mips] Rename class and functions. Simplify code.Akira Hatanaka1-26/+29
2013-04-30[mips] Fix handling of instructions which copy to/from accumulator registers.Akira Hatanaka1-10/+18
2013-03-30[mips] Expand pseudo load, store and copy instructions right beforeAkira Hatanaka1-1/+165
2013-03-22Allow the register scavenger to spill multiple registersHal Finkel1-1/+1
2013-02-21Move the eliminateCallFramePseudoInstr method from TargetRegisterInfoEli Bendersky1-0/+20
2013-01-30[mips] Lower EH_RETURN.Akira Hatanaka1-0/+60
2013-01-02Move all of the header files which are involved in modelling the LLVM IRChandler Carruth1-2/+2
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth1-4/+4
2012-11-03[mips] Stop reserving register AT and use register scavenger when a scratchAkira Hatanaka1-0/+14
2012-10-08Move TargetData to DataLayout.Micah Villmow1-1/+1
2012-08-02Move the code that creates instances of MipsInstrInfo and MipsFrameLowering outAkira Hatanaka1-0/+5
2012-07-31Implement MipsSERegisterInfo::eliminateCallFramePseudoInstr. The function emitsAkira Hatanaka1-27/+7
2012-07-31Add definitions of two subclasses of MipsFrameLowering, Mips16FrameLowering andAkira Hatanaka1-0/+225
generated by cgit v1.1 at 2025-10-17 04:56:20 +0000