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path: root/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
AgeCommit message (Expand)AuthorFilesLines
2015-01-05Replace several 'assert(false' with 'llvm_unreachable' or fold a condition in...Craig Topper1-4/+2
2014-07-18Make InstrInfo depend only upon the Subtarget getting passed inEric Christopher1-5/+4
2014-07-18Remove commented out code.Eric Christopher1-3/+0
2014-07-18Clean up some style and formatting issues.Eric Christopher1-33/+29
2014-04-21[Modules] Make Support/Debug.h modular. This requires it to not changeChandler Carruth1-0/+1
2014-03-02[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer1-1/+1
2013-12-15remove an uneeded statement (condition is covered by the statementReed Kotler1-2/+0
2013-12-15Last change for mips16 prolog/epilog cleanup and optimization.Reed Kotler1-28/+48
2013-12-11Distinguish and choose 16 or 32 bit forms of save/restore for Mips16.Reed Kotler1-4/+8
2013-12-10Next step in Mips16 prologue/epilogue cleanup.Reed Kotler1-8/+22
2013-12-09get rid of superfluous commentReed Kotler1-1/+0
2013-12-09Delete some old code used for testing that is not needed anymore.Reed Kotler1-87/+33
2013-12-08Make sure we mark these registers as defined. Previously was doneReed Kotler1-6/+10
2013-12-08Cleaning up of prologue/epilogue code for Mips16. First stepReed Kotler1-4/+13
2013-12-06Delete dead code.Reed Kotler1-16/+0
2013-11-24Make sure that for C++ emitting LwConstant32 pseudos, that it correspondsReed Kotler1-2/+2
2013-11-15Make all the conditional Mips 16 branches get initially set for theReed Kotler1-0/+6
2013-11-13Mips16InstrInfo.cpp: Use <cctype> instead of <ctype.h>NAKAMURA Takumi1-2/+1
2013-11-13Allow the code which returns the length for inline assembler to knowReed Kotler1-1/+47
2013-11-12Change the default branch instruction to be the 16 bit variety for mips16.Reed Kotler1-1/+2
2013-08-18Remove unused stdio.h includesDmitri Gribenko1-3/+1
2013-08-14[mips] Rename HIRegs and LORegs.Akira Hatanaka1-2/+2
2013-08-06[mips] Rename register classes CPURegs and CPU64Regs.Akira Hatanaka1-2/+2
2013-08-04Clean up code for Mips16 large frame handling.Reed Kotler1-28/+109
2013-06-07Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling1-1/+1
2013-05-13[mips] Rename functions. No functionality changes.Akira Hatanaka1-2/+2
2013-03-29[mips] Define overloaded versions of storeRegToStack and loadRegFromStack.Akira Hatanaka1-10/+9
2013-02-25Make pseudos FEXT_CCRX16_ins and FEXT_CCRXI16_ins into custom emitters.Reed Kotler1-55/+0
2013-02-24 Make psuedo FEXT_T8I816_ins into a custom emitter.Reed Kotler1-53/+0
2013-02-24Make psuedo FEXT_T8I816_ins a custom inserter. It should be expandedReed Kotler1-22/+0
2013-02-20Expand pseudos/macros:Reed Kotler1-0/+56
2013-02-19Expand pseudos/macros BteqzT8SltiX16, BteqzT8SltiuX16,Reed Kotler1-1/+16
2013-02-19Expand pseudos BteqzT8CmpiX16 and BtnezT8CmpiX16.Reed Kotler1-0/+26
2013-02-18Expand macro/pseudo instructions BtnezT8SltX16 and BtnezT8SltuX16.Reed Kotler1-0/+8
2013-02-18Expand pseudo/macro BteqzT8SltuX16 . There is no test case becauseReed Kotler1-0/+5
2013-02-18Expand pseudo/macro BteqzT8SltX16.Reed Kotler1-0/+3
2013-02-18Expand macro/pseudo BteqzT8CmpX16.Reed Kotler1-0/+3
2013-02-18Beginning of expanding all current mips16 macro/pseudo instruction sequences.Reed Kotler1-0/+15
2013-02-16One more try to make this look nice. I have lots of pseudo lowering Reed Kotler1-4/+9
2013-02-16Use a different scheme to chose 16/32 variants. This scheme is moreReed Kotler1-8/+6
2013-02-13For Mips 16, add the optimization where the 16 bit form of addiu sp can be usedReed Kotler1-3/+12
2013-02-08When Mips16 frames grow large, the immediate field may exceed the maximumReed Kotler1-3/+72
2013-01-19This is a resubmittal. For some reason it broke the bots yesterdayJack Carter1-19/+33
2012-12-20fix most of remaining issues with large frames.Reed Kotler1-8/+131
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth1-4/+4
2012-10-31Implement ADJCALLSTACKUP and ADJCALLSTACKDOWNReed Kotler1-1/+17
2012-10-30Change mips16 delay slot jumps to non delay slot forms by default.Reed Kotler1-1/+1
2012-10-17Add conditional branch instructions and their patterns.Reed Kotler1-2/+29
2012-10-12Div, Rem int/unsigned int Reed Kotler1-8/+15
2012-09-281. Add load/store words from the stackReed Kotler1-2/+19
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