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path: root/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
AgeCommit message (Expand)AuthorFilesLines
2016-09-11CodeGen: Give MachineBasicBlock::reverse_iterator a handle to the current MIDuncan P. N. Exon Smith1-1/+1
2016-09-02Make sure to maintain register liveness when generating predicated instructions.Ron Lieberman1-22/+56
2016-08-19[Hexagon] Fix subesthetic indentationKrzysztof Parzyszek1-3/+3
2016-08-19[Hexagon] Fix a few omissions in HexagonInstrInfoKrzysztof Parzyszek1-0/+3
2016-08-19[Hexagon] Mark PS_jumpret as pseudo-instruction, expand it into J2_jumprKrzysztof Parzyszek1-0/+19
2016-08-17Hexagon: Avoid dereferencing end() in HexagonInstrInfo::InsertBranchDuncan P. N. Exon Smith1-7/+5
2016-08-16[Hexagon] Standardize next batch of pseudo instructionsKrzysztof Parzyszek1-9/+10
2016-08-16[Hexagon] Clean up some miscellaneous V60 intrinsics a bitKrzysztof Parzyszek1-8/+10
2016-08-16[Hexagon] Standardize vector predicate load/store pseudo instructionsKrzysztof Parzyszek1-20/+12
2016-08-12[Hexagon] Cleanup and standardize vector load/store pseudo instructionsKrzysztof Parzyszek1-81/+68
2016-08-12[Hexagon] Standardize pseudo-instructions for calls and returnsKrzysztof Parzyszek1-11/+11
2016-08-12[Hexagon] Treat non-returning indirect calls as scheduling boundariesKrzysztof Parzyszek1-4/+3
2016-08-11[Hexagon] Allow non-returning calls in hardware loopsKrzysztof Parzyszek1-0/+6
2016-08-11[Hexagon] Standardize "select" pseudo-instructionsKrzysztof Parzyszek1-3/+5
2016-08-10[Hexagon] Use integer instructions for floating point immediatesKrzysztof Parzyszek1-23/+1
2016-08-01Replace MachineInstr* with MachineInstr& in TargetInstrInfo, NFCKrzysztof Parzyszek1-19/+19
2016-07-29[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFCKrzysztof Parzyszek1-403/+379
2016-07-29MachinePipeliner pass that implements Swing Modulo SchedulingBrendon Cahoon1-0/+107
2016-07-29[Hexagon] Implement DFA based hazard recognizerKrzysztof Parzyszek1-3/+10
2016-07-28MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun1-2/+2
2016-07-15[Hexagon] Handle instruction latency for 0 or 2 cyclesKrzysztof Parzyszek1-0/+32
2016-07-15[Hexagon] Improve patterns with stack-based addressingKrzysztof Parzyszek1-11/+15
2016-07-15Rename AnalyzeBranch* to analyzeBranch*.Jacques Pienaar1-2/+2
2016-07-14[Hexagon] Packetize function call arguments with tail call instructionsKrzysztof Parzyszek1-0/+11
2016-07-08Target: Avoid getFirstTerminator() => pointer, NFCDuncan P. N. Exon Smith1-1/+1
2016-06-30CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith1-393/+411
2016-06-15[Hexagon] Fix/simplify some conditional statementsKrzysztof Parzyszek1-3/+3
2016-06-12Pass DebugLoc and SDLoc by const ref.Benjamin Kramer1-6/+7
2016-06-10[Hexagon] Remove incorrect offset scalingKrzysztof Parzyszek1-4/+2
2016-06-02[Hexagon] Expand COPY pseudo-instructionKrzysztof Parzyszek1-6/+11
2016-05-16[Hexagon] Simplify HexagonInstrInfo::isPredicableKrzysztof Parzyszek1-84/+5
2016-05-12[Hexagon] Expand VSelect pseudo instructionsKrzysztof Parzyszek1-0/+38
2016-05-05[scan-build] fix warnings emitted on LLVM Hexagon code baseKrzysztof Parzyszek1-1/+1
2016-05-05[Hexagon] Fix the offset ranges for vector memory instructionsKrzysztof Parzyszek1-8/+8
2016-04-29[Hexagon] Optimize addressing modes for load/storeKrzysztof Parzyszek1-0/+26
2016-03-24[Hexagon] Generate PIC-specific versions of save/restore routinesKrzysztof Parzyszek1-1/+3
2016-02-27WIP: CodeGen: Use MachineInstr& in MachineInstrBundle.h, NFCDuncan P. N. Exon Smith1-1/+1
2016-02-23CodeGen: TII: Take MachineInstr& in predicate API, NFCDuncan P. N. Exon Smith1-60/+57
2016-02-22CodeGen: Bring back MachineBasicBlock::iterator::getInstrIterator()...Duncan P. N. Exon Smith1-1/+1
2016-02-22Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC"Duncan P. N. Exon Smith1-3/+3
2016-02-21CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFCDuncan P. N. Exon Smith1-2/+2
2016-02-12[Hexagon] Recognize more cases in copyPhysReg and stack slot load/storeKrzysztof Parzyszek1-51/+105
2016-02-12[Hexagon] Recognize more instructions in isLoadFromStackSlot/isStoreToStackSlotKrzysztof Parzyszek1-19/+99
2016-02-12[Hexagon] Add utility functions to detect sign- and zero-extending loadsKrzysztof Parzyszek1-1/+159
2016-01-22[Hexagon] Use general purpose registers to spill pred/mod registers intoKrzysztof Parzyszek1-6/+15
2016-01-14[Hexagon] Expand pseudo instruction Insert4Krzysztof Parzyszek1-0/+30
2016-01-14[Hexagon] Handle branches with non-mbb operandsKrzysztof Parzyszek1-0/+5
2015-12-16[Hexagon] Update the Hexagon packetizerKrzysztof Parzyszek1-1/+38
2015-12-14[Hexagon] Add "const" to function parameters in HexagonInstrInfoKrzysztof Parzyszek1-24/+25
2015-12-07fix 'the the '; NFCSanjay Patel1-1/+1
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