Age | Commit message (Expand) | Author | Files | Lines |
2016-09-08 | [Hexagon] Expand sext- and zextloads of vector types, not just extloads | Krzysztof Parzyszek | 1 | -1/+5 |
2016-08-19 | [Hexagon] Fix subesthetic indentation | Krzysztof Parzyszek | 1 | -46/+45 |
2016-08-19 | [Hexagon] Allow i1 values for 'r' constraint in inline-asm | Krzysztof Parzyszek | 1 | -2/+3 |
2016-08-19 | [Hexagon] Do not cache alloca instructions during isel | Krzysztof Parzyszek | 1 | -14/+0 |
2016-08-19 | [Hexagon] Allow tail-call optimization when mixing C and fast calling conv | Krzysztof Parzyszek | 1 | -3/+9 |
2016-08-19 | [Hexagon] Improvements to handling and generation of FP instructions | Krzysztof Parzyszek | 1 | -0/+7 |
2016-08-18 | [SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround | Michael Kuperstein | 1 | -1/+1 |
2016-08-16 | [Hexagon] Standardize next batch of pseudo instructions | Krzysztof Parzyszek | 1 | -1/+1 |
2016-08-13 | Fix unsupported relocation type R_HEX_6_X' for symbol .rodata | Ron Lieberman | 1 | -2/+9 |
2016-08-12 | [Hexagon] Standardize pseudo-instructions for calls and returns | Krzysztof Parzyszek | 1 | -5/+5 |
2016-08-10 | [Hexagon] Remove unneeded/unused ISD opcodes ARGEXTEND and FCONST32 | Krzysztof Parzyszek | 1 | -2/+0 |
2016-08-08 | [Hexagon] Add pattern for 64-bit mulhs | Krzysztof Parzyszek | 1 | -1/+0 |
2016-08-03 | [Hexagon] Do not check alignment for unsized types in isLegalAddressingMode | Krzysztof Parzyszek | 1 | -7/+16 |
2016-08-02 | [Hexagon] Improvements to address mode checks in TargetLowering | Krzysztof Parzyszek | 1 | -2/+35 |
2016-08-01 | [Hexagon] Tidy up some code, NFC: reapply r277372 with a fix | Krzysztof Parzyszek | 1 | -96/+101 |
2016-08-01 | Revert r277372, it is causing buildbot failures | Krzysztof Parzyszek | 1 | -101/+96 |
2016-08-01 | [Hexagon] Tidy up some code, NFC | Krzysztof Parzyszek | 1 | -96/+101 |
2016-07-29 | Revert r277178, the actual change had already been applied | Krzysztof Parzyszek | 1 | -0/+1 |
2016-07-29 | [Hexagon] Misaligned loads and stores are not fast | Krzysztof Parzyszek | 1 | -1/+0 |
2016-07-29 | [Hexagon] Custom lower VECTOR_SHUFFLE and EXTRACT_SUBVECTOR for HVX | Krzysztof Parzyszek | 1 | -22/+155 |
2016-07-28 | MachineFunction: Return reference for getFrameInfo(); NFC | Matthias Braun | 1 | -13/+13 |
2016-07-26 | [Hexagon] Post-increment loads/stores enhancements | Krzysztof Parzyszek | 1 | -5/+12 |
2016-07-25 | [Hexagon] Add target feature to generate long calls | Krzysztof Parzyszek | 1 | -2/+5 |
2016-07-18 | [Hexagon] Handle returning small structures by value | Krzysztof Parzyszek | 1 | -1/+7 |
2016-07-18 | [Hexagon] Revert r275822: mistake in commit message | Krzysztof Parzyszek | 1 | -7/+1 |
2016-07-18 | [Hexagon] Handle returning small structures by value | Krzysztof Parzyszek | 1 | -1/+7 |
2016-07-15 | [SelectionDAG] Get rid of bool parameters in SelectionDAG::getLoad, getStore,... | Justin Lebar | 1 | -38/+20 |
2016-06-30 | CodeGen: Use MachineInstr& in TargetLowering, NFC | Duncan P. N. Exon Smith | 1 | -12/+11 |
2016-06-30 | Delete unused includes. NFC. | Rafael Espindola | 1 | -1/+0 |
2016-06-27 | Move shouldAssumeDSOLocal to Target. | Rafael Espindola | 1 | -2/+1 |
2016-06-26 | Use isPositionIndependent predicate. NFC. | Rafael Espindola | 1 | -9/+8 |
2016-06-23 | Preserve DebugInfo when replacing values in DAGCombiner | Nirav Dave | 1 | -2/+2 |
2016-06-23 | Revert r273456, "Preserve DebugInfo when replacing values in DAGCombiner" as ... | Peter Collingbourne | 1 | -2/+2 |
2016-06-22 | Start using shouldAssumeDSOLocal on Hexagon. | Rafael Espindola | 1 | -2/+3 |
2016-06-22 | Preserve DebugInfo when replacing values in DAGCombiner | Nirav Dave | 1 | -2/+2 |
2016-06-22 | [Hexagon] Handle expansion of cmpxchg | Krzysztof Parzyszek | 1 | -0/+10 |
2016-06-15 | Revert "Preserve DebugInfo when replacing values in DAGCombiner" | Nirav Dave | 1 | -2/+2 |
2016-06-15 | Preserve DebugInfo when replacing values in DAGCombiner | Nirav Dave | 1 | -2/+2 |
2016-06-12 | Pass DebugLoc and SDLoc by const ref. | Benjamin Kramer | 1 | -26/+17 |
2016-05-18 | [Hexagon] Recognize "q" and "v" in inline-asm as register constraints | Krzysztof Parzyszek | 1 | -0/+14 |
2016-04-28 | [CodeGen] Default CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to Expand in TargetLowering... | Craig Topper | 1 | -10/+1 |
2016-04-23 | [Hexagon] Set ctlz_zero_undef/cttz_zero_undef to Expand so LegalizeDAG will c... | Craig Topper | 1 | -4/+8 |
2016-04-21 | [Hexagon] Expand handling of the small-data/bss section | Krzysztof Parzyszek | 1 | -1/+1 |
2016-04-15 | Use MVT instead of EVT to remove a bunch of unnecessary calls to getSimpleVT. | Craig Topper | 1 | -7/+5 |
2016-03-28 | [Hexagon] Improve handling of unaligned vector loads and stores | Krzysztof Parzyszek | 1 | -0/+26 |
2016-03-16 | Tweak some atomics functions in preparation for larger changes; NFC. | James Y Knight | 1 | -1/+0 |
2016-03-14 | [DAG] use !isUndef() ; NFCI | Sanjay Patel | 1 | -1/+1 |
2016-03-14 | [DAG] use isUndef() ; NFCI | Sanjay Patel | 1 | -5/+5 |
2016-03-04 | [Hexagon] Fix lowering of calls with the return type of i1 | Krzysztof Parzyszek | 1 | -10/+30 |
2016-02-18 | [Hexagon] Implement TLS support | Krzysztof Parzyszek | 1 | -1/+155 |