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path: root/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
AgeCommit message (Expand)AuthorFilesLines
2014-12-19[Hexagon] Removing old variants of instructions and updating references.Colin LeMahieu1-1/+1
2014-12-19[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.Colin LeMahieu1-6/+6
2014-12-18Reverting 224550, was not ready for commit.Colin LeMahieu1-6/+6
2014-12-18[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.Colin LeMahieu1-6/+6
2014-12-16[Hexagon] Updating doubleword shift usages to new versions.Colin LeMahieu1-1/+1
2014-12-10[Hexagon] Adding encodings for JR class instructions. Updating complier usages.Colin LeMahieu1-2/+2
2014-12-09[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.Colin LeMahieu1-4/+4
2014-11-26[Hexagon] Adding cmp* immediate form instructions.Colin LeMahieu1-3/+3
2014-11-25[Hexagon] Replacing cmp* instructions with ones that contain encoding bits.Colin LeMahieu1-3/+3
2014-11-21[Hexagon] Removing SUB_rr and replacing with A2_sub.Colin LeMahieu1-1/+1
2014-08-28Minor spelling correction.Sid Manning1-1/+1
2014-08-04Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher1-3/+6
2014-04-29[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final...Craig Topper1-3/+3
2014-04-25[C++] Use 'nullptr'. Target edition.Craig Topper1-49/+49
2014-04-22[Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth1-1/+2
2014-03-13Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changingOwen Anderson1-5/+5
2014-03-02[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer1-5/+5
2014-01-24Fix known typosAlp Toker1-2/+2
2014-01-07Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth1-3/+2
2013-09-15Replace some unnecessary vector copies with references.Benjamin Kramer1-1/+1
2013-07-14Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector s...Craig Topper1-4/+4
2013-05-01Hexagon: Use multiclass for Jump instructions.Jyotsna Verma1-2/+2
2013-04-23Hexagon: Remove assembler mapped instruction definitions.Jyotsna Verma1-6/+0
2013-04-01Remove unused typedef.Duncan Sands1-1/+0
2013-03-27Switch to LLVM support function abs64 to keep VS2008 happy.Tim Northover1-1/+1
2013-02-11Extend Hexagon hardware loop generation to handle various additional cases:Krzysztof Parzyszek1-382/+1283
2013-01-02Move all of the header files which are involved in modelling the LLVM IRChandler Carruth1-1/+1
2012-12-07In hexagon convertToHardwareLoop, don't deref end() iteratorMatthew Curtis1-7/+14
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth1-3/+3
2012-08-08Don't use getNextOperandForReg().Jakob Stoklund Olesen1-1/+4
2012-06-02Fix typos found by http://github.com/lyda/misspell-checkBenjamin Kramer1-1/+1
2012-04-20Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper1-1/+1
2012-03-17Reorder includes in Target backends to following coding standards. Remove som...Craig Topper1-2/+2
2012-02-15Optimize redundant sign extends and negation of predicates.Sirish Pande1-2/+2
2012-02-15Revert "Optimize redundant sign extends and negation of predicates"Eric Christopher1-2/+2
2012-02-15Optimize redundant sign extends and negation of predicatesSirish Pande1-2/+2
2011-12-12Hexagon backend supportTony Linthicum1-0/+644
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