aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp
AgeCommit message (Expand)AuthorFilesLines
2016-08-25MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compu...Matthias Braun1-1/+1
2016-07-29[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFCKrzysztof Parzyszek1-2/+2
2016-07-12Hexagon: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith1-6/+6
2016-05-13[scan-build] fix dead store warnings emitted on LLVM Hexagon code baseKrzysztof Parzyszek1-1/+0
2016-04-26Add optimization bisect opt-in calls for Hexagon passesAndrew Kaylor1-0/+2
2016-04-04Add MachineFunctionProperty checks for AllVRegsAllocated for target passesDerek Schuff1-0/+5
2015-06-23Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko1-1/+1
2015-06-19Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko1-1/+1
2015-06-15[Hexagon] Moving pass declarations out of header and in to implementation fil...Colin LeMahieu1-0/+1
2015-04-27[Hexagon] Use constant extenders to fix up hardware loopsBrendon Cahoon1-67/+69
2015-04-22[Hexagon] Some cleanup of instruction selection codeKrzysztof Parzyszek1-1/+1
2014-12-19[Hexagon] Removing old variants of instructions and updating references.Colin LeMahieu1-3/+3
2014-12-19[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.Colin LeMahieu1-2/+2
2014-12-18Reverting 224550, was not ready for commit.Colin LeMahieu1-2/+2
2014-12-18[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.Colin LeMahieu1-2/+2
2014-12-09[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.Colin LeMahieu1-1/+1
2014-08-05Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher1-2/+1
2014-08-04Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher1-1/+2
2014-04-29[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final...Craig Topper1-3/+5
2014-01-07Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth1-2/+2
2013-02-11Extend Hexagon hardware loop generation to handle various additional cases:Krzysztof Parzyszek1-0/+183
generated by cgit v1.1 at 2025-10-17 14:40:59 +0000