| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2014-08-20 | Lower thumbv4t & thumbv5 lo->lo copies through a push-pop sequence | Jonathan Roelofs | 1 | -2/+23 |
| 2014-08-02 | [ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly | Akira Hatanaka | 1 | -3/+3 |
| 2014-07-25 | [stack protector] Fix a potential security bug in stack protector where the | Akira Hatanaka | 1 | -0/+9 |
| 2014-03-22 | Prune includes in ARM target. | Craig Topper | 1 | -1/+0 |
| 2013-06-07 | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 1 | -1/+1 |
| 2012-12-03 | Use the new script to sort the includes of every file under lib. | Chandler Carruth | 1 | -1/+1 |
| 2012-04-20 | Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s... | Craig Topper | 1 | -4/+4 |
| 2012-03-27 | Prune some includes | Craig Topper | 1 | -1/+0 |
| 2012-03-17 | Reorder includes to match coding standards. Fix an issue or two exposed by that. | Craig Topper | 1 | -1/+0 |
| 2012-02-28 | ARM implement TargetInstrInfo::getNoopForMachoTarget() | Jim Grosbach | 1 | -1/+10 |
| 2012-02-18 | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 1 | -1/+1 |
| 2011-11-15 | Make use of MachinePointerInfo::getFixedStack. This removes all mention | Jay Foad | 1 | -5/+2 |
| 2011-06-30 | Refact ARM Thumb1 tMOVr instruction family. | Jim Grosbach | 1 | -11/+1 |
| 2011-06-30 | Thumb1 register to register MOV instruction is predicable. | Jim Grosbach | 1 | -2/+2 |
| 2011-06-29 | Refactor away tSpill and tRestore pseudos in ARM backend. | Jim Grosbach | 1 | -2/+2 |
| 2011-06-28 | Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc | Evan Cheng | 1 | -1/+0 |
| 2010-11-27 | Move callee-saved regs spills / reloads to TFI | Anton Korobeynikov | 1 | -74/+0 |
| 2010-09-21 | convert targets to the new MF.getMachineMemOperand interface. | Chris Lattner | 1 | -4/+6 |
| 2010-07-11 | RISC architectures get their memory operand folding for free. | Jakob Stoklund Olesen | 1 | -76/+0 |
| 2010-07-11 | Replace copyRegToReg with copyPhysReg for ARM. | Jakob Stoklund Olesen | 1 | -24/+17 |
| 2010-06-22 | Thumb1 functions using @llvm.returnaddress were not saving the incoming LR. | Bob Wilson | 1 | -3/+3 |
| 2010-06-15 | Next round of tail call changes. Register used in a tail | Dale Johannesen | 1 | -3/+3 |
| 2010-05-22 | Implement @llvm.returnaddress. rdar://8015977. | Evan Cheng | 1 | -5/+21 |
| 2010-05-06 | Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it | Dan Gohman | 1 | -4/+2 |
| 2010-05-06 | Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. | Evan Cheng | 1 | -8/+10 |
| 2010-04-02 | use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() | Chris Lattner | 1 | -4/+4 |
| 2010-03-22 | Don't leak a MachineInstruction from Thumb1InstrInfo::restoreCalleeSavedRegis... | Jeffrey Yasskin | 1 | -0/+2 |
| 2010-03-13 | Change ARM ld/st multiple instructions to have variant instructions for | Bob Wilson | 1 | -2/+0 |
| 2010-01-15 | Update Thumb1 storeRegToStackSlot() and loadRegFromStackSlot() to properly | Jim Grosbach | 1 | -2/+6 |
| 2009-12-16 | Silence a clang warning about the deprecated (but perfectly reasonable in | John McCall | 1 | -2/+2 |
| 2009-12-05 | Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of | Dan Gohman | 1 | -19/+0 |
| 2009-11-08 | Refactor code. | Evan Cheng | 1 | -55/+0 |
| 2009-11-07 | 80-column cleanup of file header comments | Jim Grosbach | 1 | -1/+1 |
| 2009-11-07 | t2ldrpci_pic can be used for blockaddress as well. | Evan Cheng | 1 | -3/+14 |
| 2009-11-06 | - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative | Evan Cheng | 1 | -1/+45 |
| 2009-11-02 | Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls,... | Anton Korobeynikov | 1 | -1/+2 |
| 2009-11-01 | Fix a couple more places where we are creating ld / st instructions without m... | Evan Cheng | 1 | -2/+18 |
| 2009-10-28 | Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate the | Bob Wilson | 1 | -0/+1 |
| 2009-10-02 | Forgot about ARM::tPUSH. It also has a new writeback operand. | Evan Cheng | 1 | -0/+1 |
| 2009-10-01 | ARM::tPOP and tPOP_RET each has an extra writeback operand now. | Evan Cheng | 1 | -0/+1 |
| 2009-08-13 | It's ok to spill a tGPR register as long as it's still allocated a low register. | Evan Cheng | 1 | -6/+14 |
| 2009-08-11 | Shrinkify Thumb2 load / store multiple instructions. | Evan Cheng | 1 | -5/+11 |
| 2009-08-02 | Move the getInlineAsmLength virtual method from TAI to TII, where | Chris Lattner | 1 | -2/+1 |
| 2009-07-28 | - More refactoring. This gets rid of all of the getOpcode calls. | Evan Cheng | 1 | -12/+0 |
| 2009-07-27 | More DCE. | Evan Cheng | 1 | -4/+0 |
| 2009-07-27 | Get rid of more dead code. | Evan Cheng | 1 | -2/+0 |
| 2009-07-27 | Get rid of some more getOpcode calls. | Evan Cheng | 1 | -3/+0 |
| 2009-07-27 | Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate m... | Evan Cheng | 1 | -2/+0 |
| 2009-07-27 | Merge isLoadFromStackSlot into one since it behaves the same regardless of su... | Evan Cheng | 1 | -32/+0 |
| 2009-07-27 | Just use a single isMoveInstr to catch all the cases. | Evan Cheng | 1 | -23/+0 |
