Age | Commit message (Expand) | Author | Files | Lines |
2016-09-11 | [CodeGen] Split out the notions of MI invariance and MI dereferenceability. | Justin Lebar | 1 | -1/+3 |
2016-07-15 | [CodeGen] Take a MachineMemOperand::Flags in MachineFunction::getMachineMemOp... | Justin Lebar | 1 | -2/+2 |
2016-06-28 | Don't pass a Reloc::Model to GVIsIndirectSymbol. | Rafael Espindola | 1 | -2/+1 |
2016-06-28 | Don't pass Reloc::Model to places that already have it. NFC. | Rafael Espindola | 1 | -8/+9 |
2015-10-26 | ARM/ELF: Better codegen for global variable addresses. | Peter Collingbourne | 1 | -70/+0 |
2015-09-22 | ARMInstrInfo.cpp: Reformat. | NAKAMURA Takumi | 1 | -66/+65 |
2015-08-11 | PseudoSourceValue: Replace global manager with a manager in a machine function. | Alex Lorenz | 1 | -1/+1 |
2015-07-16 | Move most user of TargetMachine::getDataLayout to the Module one | Mehdi Amini | 1 | -1/+1 |
2015-06-23 | Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) | Alexander Kornienko | 1 | -1/+1 |
2015-06-19 | Fixed/added namespace ending comments using clang-tidy. NFC | Alexander Kornienko | 1 | -1/+1 |
2015-05-13 | MC: Modernize MCOperand API naming. NFC. | Jim Grosbach | 1 | -8/+8 |
2015-03-12 | Remove the need to cache the subtarget in the ARM TargetRegisterInfo | Eric Christopher | 1 | -2/+1 |
2015-03-05 | Cleanup and remove a chunk of getARMSubtarget calls in the | Eric Christopher | 1 | -0/+4 |
2015-02-20 | Get the cached subtarget off the MachineFunction rather than | Eric Christopher | 1 | -1/+1 |
2015-01-30 | Remove calls to bare getSubtarget and clean up the functions | Eric Christopher | 1 | -9/+6 |
2015-01-29 | Migrate ARM except for TTI, AsmPrinter, and frame lowering | Eric Christopher | 1 | -5/+5 |
2015-01-26 | Move DataLayout back to the TargetMachine from TargetSubtargetInfo | Eric Christopher | 1 | -3/+2 |
2014-10-23 | [ARM, stack protector] If supported, use armv7 instructions. | Akira Hatanaka | 1 | -4/+39 |
2014-08-22 | [ARM] Move the implementation of the target hooks related to copy-related | Quentin Colombet | 1 | -69/+0 |
2014-08-21 | [ARM] Mark VSETLNi32 with the InsertSubreg property and implement the related | Quentin Colombet | 1 | -0/+23 |
2014-08-20 | [ARM] Mark VMOVRRD with the ExtractSubreg property and implement the related | Quentin Colombet | 1 | -0/+21 |
2014-08-11 | [ARM] Mark VMOVDRR with the RegSequence property and implement the related | Quentin Colombet | 1 | -0/+25 |
2014-08-04 | Remove the TargetMachine forwards for TargetSubtargetInfo based | Eric Christopher | 1 | -3/+4 |
2014-08-02 | [ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly | Akira Hatanaka | 1 | -3/+3 |
2014-07-25 | [stack protector] Fix a potential security bug in stack protector where the | Akira Hatanaka | 1 | -0/+8 |
2014-03-10 | [C++11] Add 'override' keyword to virtual methods that override their base cl... | Craig Topper | 1 | -3/+3 |
2013-09-10 | ARM: Use the PICADD opcode calculated. | Jim Grosbach | 1 | -2/+6 |
2013-08-26 | ARM: Fix ELF global base reg intialization. | Jim Grosbach | 1 | -3/+8 |
2013-08-16 | When initializing the PIC global base register on ARM/ELF add pc to fix the a... | Benjamin Kramer | 1 | -0/+4 |
2013-07-27 | Create a constant pool symbol for the GOT in the ARMCGBR the same way we | Chandler Carruth | 1 | -7/+8 |
2013-06-07 | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 1 | -1/+1 |
2013-01-02 | Move all of the header files which are involved in modelling the LLVM IR | Chandler Carruth | 1 | -2/+2 |
2012-10-08 | Move TargetData to DataLayout. | Micah Villmow | 1 | -1/+1 |
2012-09-27 | [arm-fast-isel] Add support for ELF PIC. | Jush Lu | 1 | -0/+62 |
2012-06-18 | ARM: Define generic HINT instruction. | Jim Grosbach | 1 | -1/+2 |
2012-02-28 | ARM implement TargetInstrInfo::getNoopForMachoTarget() | Jim Grosbach | 1 | -0/+17 |
2012-02-18 | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 1 | -1/+1 |
2011-08-26 | invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We w... | Owen Anderson | 1 | -2/+4 |
2011-07-26 | Split am2offset into register addend and immediate addend forms, necessary fo... | Owen Anderson | 1 | -6/+12 |
2011-07-20 | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A... | Evan Cheng | 1 | -1/+1 |
2011-06-28 | Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc | Evan Cheng | 1 | -1/+0 |
2010-11-12 | Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+o... | Evan Cheng | 1 | -24/+0 |
2010-10-29 | Convert ARM::MOVi2pieces to a true pseudo-instruction and expand it in | Jim Grosbach | 1 | -2/+1 |
2010-10-27 | Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like | Jim Grosbach | 1 | -2/+2 |
2010-10-27 | Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on | Jim Grosbach | 1 | -1/+1 |
2010-10-26 | First part of refactoring ARM addrmode2 (load/store) instructions to be more | Jim Grosbach | 1 | -1/+1 |
2010-06-02 | Slightly change the meaning of the reMaterialize target hook when the original | Jakob Stoklund Olesen | 1 | -1/+1 |
2009-12-05 | Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of | Dan Gohman | 1 | -19/+0 |
2009-11-14 | - Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo. | Evan Cheng | 1 | -3/+3 |
2009-11-08 | Refactor code. | Evan Cheng | 1 | -11/+8 |