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path: root/llvm/lib/Target/ARM/ARMFrameLowering.cpp
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2020-03-02[ARM][ConstantIslands] Fix stack mis-alignment caused by undoLRSpillRestore.Huihui Zhang1-5/+2
2020-02-29ArrayRef'ize restoreCalleeSavedRegisters. NFCI.Benjamin Kramer1-6/+5
2020-02-08ArrayRef'ize spillCalleeSavedRegisters. NFCI.Benjamin Kramer1-9/+7
2020-01-06[ARM] Use the correct opcodes for Thumb2 segmented stack frame loweringDavid Green1-2/+4
2019-11-29Revert "[ARM] Allocatable Global Register Variables for ARM"Carey Williams1-15/+2
2019-11-18[ARM] Allocatable Global Register Variables for ARMAnna Welker1-2/+15
2019-10-29Reland [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (Take 2)Sander de Smalen1-0/+6
2019-10-29Revert rG70f5aecedef9a6e347e425eb5b843bf797b95319 - "Reland [AArch64][DebugIn...Simon Pilgrim1-6/+0
2019-10-28Reland [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (Take 2)Sander de Smalen1-0/+6
2019-10-21Reverted r375425 as it broke some buildbots.Sander de Smalen1-6/+0
2019-10-21[AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (Take 2)Sander de Smalen1-0/+6
2019-10-21Use Align for TFL::TransientStackAlignmentGuillaume Chatelet1-1/+1
2019-09-18Revert "[AArch64][DebugInfo] Do not recompute CalleeSavedStackSize"Krasimir Georgiev1-6/+0
2019-09-18[AArch64][DebugInfo] Do not recompute CalleeSavedStackSizeSander de Smalen1-0/+6
2019-09-17[ARM] Reserve an emergency spill slot for fp16 addressing modes that need itDavid Green1-1/+14
2019-09-17[ARM] Fix for MVE load/store stack accessesDavid Green1-7/+26
2019-08-15Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders1-3/+3
2019-08-05Reland: Fix and test inter-procedural register allocation for ARMOliver Stannard1-2/+1
2019-08-02Revert Fix and test inter-procedural register allocation for ARMDouglas Yung1-1/+2
2019-08-02Fix and test inter-procedural register allocation for ARMOliver Stannard1-2/+1
2019-07-22[IPRA][ARM] Make use of the "returned" parameter attributeOliver Stannard1-0/+6
2019-06-26[ARM] Don't reserve R12 on Thumb1 as an emergency spill slot.Eli Friedman1-17/+81
2019-03-19[ARM] Make sure to save/restore LR when we use tBfar.Eli Friedman1-3/+9
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
2019-01-14Replace "no-frame-pointer-*" function attributes with "frame-pointer"Francis Visoiu Mistrih1-3/+2
2018-12-07ARM: use correct offset from base pointer (r6) in call frame regions.Tim Northover1-0/+1
2018-11-26Notify the linker when a TU compiled with split-stack has a function without ...Sterling Augustine1-2/+8
2018-09-27llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)Fangrui Song1-3/+2
2018-09-07ARM: fix Thumb2 CodeGen for ldrex with folded frame-index.Tim Northover1-0/+1
2018-08-22[AArch64] Add Tiny Code Model for AArch64David Green1-0/+2
2018-08-08[ARM] Avoid spilling lr with Thumb1 tail calls.Eli Friedman1-2/+7
2018-07-30Remove trailing spaceFangrui Song1-1/+1
2018-06-26[X86,ARM] Retain split-stack prolog check for sibling callsThan McIntosh1-2/+4
2018-05-14[ARM] Back up R4 and LR if calling the stack probe functionMartin Storsjo1-0/+11
2018-05-14Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen1-32/+36
2018-04-07Reapply ARM: Do not spill CSR to stack on entry to noreturn functionsTim Northover1-0/+12
2018-04-07Revert "ARM: Do not spill CSR to stack on entry to noreturn functions"Vitaly Buka1-11/+0
2018-04-05[ARM] Change std::sort to llvm::sort in response to r327219Mandeep Singh Grang1-3/+3
2018-04-05ARM: Do not spill CSR to stack on entry to noreturn functionsTim Northover1-0/+11
2018-03-05Fix location of comment in EmitPopInstThomas Preud'homme1-1/+1
2018-03-02[ARM] Fix access to stack arguments when re-aligning SP in Armv6mMomchil Velikov1-3/+5
2018-02-23Support for the mno-stack-arg-probe flagHans Wennborg1-1/+2
2017-12-15MachineFunction: Return reference from getFunction(); NFCMatthias Braun1-10/+10
2017-11-28[CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih1-4/+4
2017-11-28[CodeGen] Rename functions PrintReg* to printReg*Francis Visoiu Mistrih1-7/+7
2017-11-28ARM: Fix PR32578Matthias Braun1-1/+1
2017-11-17Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie1-3/+3
2017-11-08Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie1-1/+1
2017-10-22[ARM] Dynamic stack alignment for 16-bit ThumbMomchil Velikov1-7/+7
2017-09-28ARM: Fix cases where CSI Restored bit is not clearedMatthias Braun1-8/+5
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