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path: root/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
AgeCommit message (Expand)AuthorFilesLines
2017-12-22[AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registersDmitry Preobrazhensky1-0/+3
2017-12-13AMDGPU: Partially fix disassembly of MIMG instructionsMatt Arsenault1-3/+9
2017-12-11[AMDGPU][MC][GFX9] Corrected encoding of ttmp registers, disabled tba/tmaDmitry Preobrazhensky1-1/+6
2017-08-10[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use war...Eugene Zelenko1-5/+3
2017-07-21AMDGPU: Add instruction definitions for some scratch_* instructionsMatt Arsenault1-0/+1
2017-07-18[AMDGPU][MC] Corrected disassembler for proper decoding of v_mqsad_u32_u8Dmitry Preobrazhensky1-0/+1
2017-06-21[AMDGPU] SDWA: merge VI and GFX9 pseudo instructionsSam Kolton1-4/+6
2017-06-06Sort the remaining #include lines in include/... and lib/....Chandler Carruth1-1/+1
2017-05-26[AMDGPU] SDWA: add disassembler support for GFX9Sam Kolton1-0/+5
2017-05-19[AMDGPU][MC] Corrected disassembler to decode instructions with 2 literalsDmitry Preobrazhensky1-0/+2
2017-02-27AMDGPU: Add VOP3P instruction formatMatt Arsenault1-0/+2
2016-12-10AMDGPU: Fix handling of 16-bit immediatesMatt Arsenault1-1/+3
2016-12-09[AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What Yo...Eugene Zelenko1-4/+9
2016-11-29AMDGPU: Disallow exec as SMEM instruction operandMatt Arsenault1-1/+2
2016-11-15AMDGPU: Replace assert(false) with unreachableMatt Arsenault1-3/+1
2016-11-01AMDGPU: Whitespace fixesMatt Arsenault1-1/+1
2016-10-06[AMDGPU] Disassembler: print label names in branch instructionsSam Kolton1-66/+97
2016-09-26Revert "[AMDGPU] Disassembler: print label names in branch instructions"Sam Kolton1-97/+66
2016-09-26[AMDGPU] Disassembler: print label names in branch instructionsSam Kolton1-66/+97
2016-05-24[AMDGPU][llvm-mc] Disassembler: support for TTMP/TBA/TMA registers.Artem Tamazov1-2/+11
2016-04-29Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rewor...Artem Tamazov1-1/+1
2016-04-27Revert "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for ...Chad Rosier1-1/+0
2016-04-27[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD.Artem Tamazov1-0/+1
2016-04-18[NFC] Header cleanupMehdi Amini1-0/+1
2016-03-01[AMDGPU] Disassembler code refactored + error messages.Nikolay Haustov1-38/+41
2016-02-25[AMDGPU] Disassembler: Support for all VOP1 instructions.Nikolay Haustov1-12/+35
2016-02-18[AMDGPU] Disassembler: Added basic disassembler for AMDGPU targetTom Stellard1-0/+57
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