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path: root/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
AgeCommit message (Expand)AuthorFilesLines
2016-09-09AMDGPU/SI: Make sure llvm.amdgcn.implicitarg.ptr() is 8-byte aligned for HSATom Stellard1-1/+2
2016-08-31AMDGPU: Fix introducing stack access on unaligned v16i8Matt Arsenault1-1/+8
2016-08-31AMDGPU/SI: Make sure llvm.amdgcn.implicitarg.ptr() is at least 4-byte alignedTom Stellard1-1/+1
2016-08-29AMDGPU/R600: Remove MergeVectorStores from legalizationJan Vesely1-59/+0
2016-08-27AMDGPU: Select mulhi 24-bit instructionsMatt Arsenault1-6/+121
2016-08-04[X86] Heuristic to selectively build Newton-Raphson SQRT estimationNikolai Bozhenov1-2/+0
2016-07-28AMDGPU : Add intrinsics for compare with the full wavefront resultWei Ding1-0/+1
2016-07-28AMDGPU: Turn dead checks into assertsMatt Arsenault1-9/+5
2016-07-26AMDGPU: Make AMDGPUMachineFunction fields privateMatt Arsenault1-19/+3
2016-07-26AMDGPU: Add fp legacy instruction intrinsicsMatt Arsenault1-0/+2
2016-07-25AMDGPU: Delete dead codeMatt Arsenault1-8/+0
2016-07-23AMDGPU: Delete dead codeMatt Arsenault1-93/+0
2016-07-19AMDGPU: Only use legal inline immediates with kill pseudoMatt Arsenault1-0/+1
2016-07-18AMDGPU: Fix missing switch case warningMatt Arsenault1-0/+1
2016-07-15AMDGPU: Remove brev intrinsicMatt Arsenault1-3/+0
2016-07-15AMDGPU: Remove AMDGPU.ldexpMatt Arsenault1-4/+0
2016-07-15[SelectionDAG] Get rid of bool parameters in SelectionDAG::getLoad, getStore,...Justin Lebar1-42/+24
2016-07-14AMDGPU: Remove dead codeMatt Arsenault1-9/+0
2016-07-13AMDGPU: Remove last AMDIL intrinsicsMatt Arsenault1-5/+1
2016-07-01AMDGPU: Expand unaligned accesses earlyMatt Arsenault1-20/+47
2016-07-01AMDGPU: Improve load/store of illegal types.Matt Arsenault1-37/+97
2016-06-24AMDGPU: Cleanup subtarget handling.Matt Arsenault1-1/+1
2016-06-23[AMDGPU] Remove exit-on-error in test (PR27761)Diana Picus1-1/+2
2016-06-22AMDGPU: Fix verifier errors in SILowerControlFlowMatt Arsenault1-2/+3
2016-06-18AMDGPU: Fix kernel argument alignment impacting stack sizeMatt Arsenault1-7/+9
2016-06-14AMDGPU/SI: Refactor fixup handling for constant addrspace variablesTom Stellard1-0/+1
2016-06-14Revert "AMDGPU/SI: Refactor fixup handling for constant addrspace variables"Tom Stellard1-1/+0
2016-06-14AMDGPU/SI: Refactor fixup handling for constant addrspace variablesTom Stellard1-0/+1
2016-06-12Pass DebugLoc and SDLoc by const ref.Benjamin Kramer1-22/+17
2016-06-02AMDGPU: Temporary fix for broken store combineMatt Arsenault1-0/+2
2016-05-25AMDGPU: Fix inconsistent lowering of select of vectorsMatt Arsenault1-1/+9
2016-05-21AMDGPU: Cleanup lowering actionsMatt Arsenault1-121/+169
2016-05-21AMDGPU: Fix high bits after division optimizationMatt Arsenault1-17/+36
2016-05-19AMDGPU: Remove pointless conversionsMatt Arsenault1-30/+10
2016-05-18AMDGPU: Fix assert when erroring on a callMatt Arsenault1-1/+5
2016-05-13AMDGPU: Unify LowerGlobalAddressJan Vesely1-0/+5
2016-05-02AMDGPU: Move R600 specific code out of AMDGPUISelLowering.cppTom Stellard1-39/+0
2016-04-28[CodeGen] Default CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to Expand in TargetLowering...Craig Topper1-8/+2
2016-04-26[CodeGen] Add getBuildVector and getSplatBuildVector helpers. NFCI.Ahmed Bougacha1-20/+14
2016-04-25AMDGPU: Add DAG to debug dumpMatt Arsenault1-2/+2
2016-04-22AMDGPU: Re-visit nodes in performAndCombineMatt Arsenault1-0/+5
2016-04-14AMDGPU: Remove custom load/store scalarizationMatt Arsenault1-78/+4
2016-04-14AMDGPU: Fold bitcasts of scalar constants to vectorsMatt Arsenault1-0/+34
2016-04-12AMDGPU: Add atomic_inc + atomic_dec intrinsicsMatt Arsenault1-0/+2
2016-04-01AMDGPU: Implement {BUFFER,FLAT}_ATOMIC_CMPSWAP{,_X2}Tom Stellard1-0/+1
2016-03-30Silencing warnings from MSVC 2015 Update 2. All of these changes silence "C43...Aaron Ballman1-1/+1
2016-03-11AMDGPU: R600 code splitting cleanupMatt Arsenault1-14/+0
2016-03-07AMDGPU: Move function only used by R600Matt Arsenault1-17/+0
2016-03-02AMDGPU: Simplify boolean conditional return statementsMatt Arsenault1-4/+1
2016-03-01AMDGPU: Don't emit build_pair during udivrem legalizationMatt Arsenault1-6/+11
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