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path: root/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
AgeCommit message (Expand)AuthorFilesLines
2019-08-28[FPEnv] Add fptosi and fptoui constrained intrinsics.Kevin P. Neal1-2/+10
2019-08-11[SelectionDAG] Widen vector results of SMULFIX/UMULFIX/SMULFIXSATBjorn Pettersson1-0/+7
2019-08-06[Strict FP] Allow custom operation actionsUlrich Weigand1-6/+17
2019-06-25[VectorLegalizer] ExpandANY_EXTEND_VECTOR_INREG/ExpandZERO_EXTEND_VECTOR_INRE...Simon Pilgrim1-0/+26
2019-05-21[Intrinsic] Signed Fixed Point Saturation Multiplication IntrinsicLeonard Chan1-0/+1
2019-05-20[SDAG] Vector op legalization for overflow opsNikita Popov1-0/+38
2019-05-13Add constrained fptrunc and fpext intrinsics.Kevin P. Neal1-1/+3
2019-05-10[LegalizeVectorOps] Remove calls to LegalizeOp on the return value from Expan...Craig Topper1-2/+2
2019-05-10[SDAG] Recursively legalize both vector mulo resultsNikita Popov1-3/+7
2019-03-11[SDAG][AArch64] Legalize VECREDUCENikita Popov1-6/+34
2019-02-22[LegalizeVectorOps] Improve the placement of ANDs in the ExpandLoad path for ...Craig Topper1-6/+7
2019-02-22[LegalizeVectorOps] Simplify the non-byte sized load handling VectorLegalizer...Craig Topper1-11/+8
2019-02-20[SDAG] Support vector UMULO/SMULONikita Popov1-0/+16
2019-02-04[Intrinsic] Unsigned Fixed Point Multiplication IntrinsicLeonard Chan1-1/+3
2019-01-31[Intrinsic] Expand SMULFIX to MUL, MULH[US], or [US]MUL_LOHI on vector argumentsLeonard Chan1-0/+9
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
2019-01-15Reapply "[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectors"Nikita Popov1-0/+12
2019-01-14Revert "[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectors"Nikita Popov1-12/+0
2019-01-14[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectorsNikita Popov1-0/+12
2019-01-12[X86][AARCH64] Improve ISD::ABS supportSimon Pilgrim1-0/+19
2019-01-06[LegalizeVectorOps] Add FSHL/FSHR to the list of vector operations that shoul...Craig Topper1-0/+2
2018-12-13[TargetLowering] Add ISD::ROTL/ROTR vector expansionSimon Pilgrim1-0/+12
2018-12-12[Intrinsic] Signed Fixed Point Multiplication IntrinsicLeonard Chan1-0/+6
2018-12-05[SelectionDAG] Initial support for FSHL/FSHR funnel shift opcodes (PR39467)Simon Pilgrim1-38/+50
2018-12-05Remove superfluous comments. NFCI.Simon Pilgrim1-44/+38
2018-11-29[SelectionDAG][AArch64][X86] Move legalization of vector MULHS/MULHU from Leg...Craig Topper1-0/+2
2018-11-16[LegalizeVectorOps] After custom legalizing an extending load or a truncating...Craig Topper1-2/+10
2018-11-05[FPEnv] Add constrained CEIL/FLOOR/ROUND/TRUNC intrinsicsCameron McInally1-0/+8
2018-11-04[SelectionDAG] Remove special methods for creating *_EXTEND_VECTOR_INREG node...Craig Topper1-1/+1
2018-11-01[LegalizeDAG] Add generic vector CTPOP expansion (PR32655)Simon Pilgrim1-0/+13
2018-10-30[FPEnv] [FPEnv] Add constrained intrinsics for MAXNUM and MINNUMCameron McInally1-0/+4
2018-10-29[Intrinsic] Signed and Unsigned Saturation Subtraction IntirnsicsLeonard Chan1-0/+2
2018-10-28[VectorLegalizer] Enable TargetLowering::expandFP_TO_UINT support.Simon Pilgrim1-3/+16
2018-10-25[TargetLowering] Improve vXi64 UINT_TO_FP vXf64 support (P38226)Simon Pilgrim1-0/+5
2018-10-24[NFC] Rename minnan and maxnan to minimum and maximumThomas Lively1-2/+2
2018-10-23[LegalizeDAG] Share Vector/Scalar CTLZ ExpansionSimon Pilgrim1-17/+4
2018-10-23[LegalizeDAG] Remove unused variableBenjamin Kramer1-2/+0
2018-10-23[LegalizeDAG] Share Vector/Scalar CTTZ ExpansionSimon Pilgrim1-16/+4
2018-10-22[Intrinsic] Unigned Saturation Addition IntrinsicLeonard Chan1-0/+1
2018-10-22DAG: Change behavior of fminnum/fmaxnum nodesMatt Arsenault1-0/+12
2018-10-16[Intrinsic] Signed Saturation Addition IntrinsicLeonard Chan1-0/+1
2018-10-13[X86][SSE] Begin removing vector CTTZ custom lowering and use LegalizeDAG ins...Simon Pilgrim1-3/+15
2018-10-12Pull out repeated value types. NFCI.Simon Pilgrim1-3/+5
2018-10-12[SelectionDAG] Move VectorLegalizer::ExpandCTLZ codegen into SelectionDAGLega...Simon Pilgrim1-23/+4
2018-10-08[LegalizeDAG] Move legalization of scatter and masked store from LegalizeVect...Craig Topper1-11/+2
2018-10-07[LegalizeVectorOps] Make ExpandStrictFPOp return the result corresponding to ...Craig Topper1-1/+1
2018-10-04[X86][LegalizeVectorOps] Use MERGE_VALUES to return two results from LowerLoa...Craig Topper1-11/+3
2018-08-20[FPEnv] Support constrained FREM intrinsicCameron McInally1-0/+2
2018-07-30Remove trailing spaceFangrui Song1-9/+9
2018-07-25Fix corruption of result number in LegalizeVectorOps.cppUlrich Weigand1-1/+2
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