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11 days[CodeGen][NewPM] Port `ReachingDefAnalysis` to new pass manager. (#159572)Mikhail Gudim1-90/+134
In this commit: (1) Added new pass manager support for `ReachingDefAnalysis`. (2) Added printer pass. (3) Make old pass manager use `ReachingDefInfoWrapperPass`
2025-08-30[CodeGen] Remove a dead assignment (NFC) (#156202)Kazu Hirata1-1/+0
TRI is set to the same value a couple of lines below.
2025-03-02[CodeGen] Use MCRegister and Register. NFCCraig Topper1-1/+1
2025-02-04[ReachingDefAnalysis] Fix management of MBBFrameObjsReachingDefs (#124943)Michael Maitland1-12/+7
MBBFrameObjsReachingDefs was not being built correctly since we were not inserting into a reference of Frame2InstrIdx. If there was multiple stack slot defs in the same basic block, then the bug would occur. This PR fixes this problem while simplifying the insertion logic. Additionally, when lookup into MBBFrameObjsReachingDefs was occurring, there was a chance that there was no entry in the map, in the case that there was no reaching def. This was causing us to return a default value, which may or may not have been correct. This patch returns the correct value now.
2025-02-02[ReachingDefAnalysis] Fix LLVM_ENABLE_REVERSE_ITERATION bot after #118097Fangrui Song1-2/+6
2025-01-29[ReachingDefAnalysis] Use non-state Register::isPhysical. NFCCraig Topper1-3/+3
2025-01-29[CodeGen] Add Register::stackSlotIndex(). Replace uses of ↵Craig Topper1-4/+4
Register::stackSlot2Index. NFC (#125028)
2025-01-29Revert "[ReachingDefAnalysis][NFC] Use at instead of lookup for DenseMap access"Michael Maitland1-2/+2
This reverts commit 3ce97e4aa98ad6a3502528818ff11eee89ef2fae. Pushed to main prematurley.
2025-01-29[ReachingDefAnalysis][NFC] Use at instead of lookup for DenseMap accessMichael Maitland1-2/+2
`at` has an assert that the key exists. Since we are assuming the key exists, use `at` instead of `lookup`.
2025-01-29[ReachingDefAnalysis] Extend the analysis to stack objects. (#118097)Mikhail Gudim1-3/+100
We track definitions of stack objects, the implementation is identical to tracking of registers. Also, added printing of all found reaching definitions for testing purposes. --------- Co-authored-by: Michael Maitland <michaeltmaitland@gmail.com>
2025-01-21[ReachingDefAnalysis][NFC] Replace MCRegister with Register (#123626)Mikhail Gudim1-27/+22
This is preparation for extending ReachingDefAnalysis to stack slots. We should use `Register`, not `MCRegister` for something that can be a physical register or a stack slot.
2025-01-08[ReachingDefAnalysis][NFC] Rename `PhysReg` to `Reg`. (#122112)Mikhail Gudim1-74/+70
This is in order to prepare for future MR where we will extend `ReachingDefAnalysis` to stack slots.
2024-12-10[ReachingDefAnalysis] Fix typo. (#119329)Mikhail Gudim1-1/+1
"reaching-deps-analysis" -> "reaching-defs-analysis".
2024-09-29[ReachingDefAnalysis] Turn MBBReachingDefsInfo into a proper class (NFC) ↵Kazu Hirata1-19/+21
(#110432) I'm trying to speed up the reaching def analysis by changing the underlying data structure. Turning MBBReachingDefsInfo into a proper class decouples the data structure and its users. This patch does not change the existing three-dimensional vector structure. --------- Co-authored-by: Nikita Popov <github@npopov.com>
2024-03-08Reapply "Convert many LivePhysRegs uses to LiveRegUnits" (#84338)AtariDreams1-12/+12
This only converts the instances where all that is needed is to change the variable type name. Basically, anything that involves a function that LiveRegUnits does not directly have was skipped to play it safe. Reverts https://github.com/llvm/llvm-project/commit/7a0e222a17058a311b69153d0b6f1b4459414778
2024-03-07Revert "Convert many LivePhysRegs uses to LiveRegUnits (#83905)"Jay Foad1-12/+12
This reverts commit 2a13422b8bcee449405e3ebff957b4020805f91c. It was causing test failures on the expensive check builders.
2024-03-06Convert many LivePhysRegs uses to LiveRegUnits (#83905)AtariDreams1-12/+12
2023-09-01[llvm] Fix duplicate word typos. NFCFangrui Song1-1/+1
Those fixes were taken from https://reviews.llvm.org/D137338
2023-06-16[MC] Add MCRegisterInfo::regunits for iteration over register unitsSergei Barannikov1-13/+12
Reviewed By: foad Differential Revision: https://reviews.llvm.org/D152098
2022-07-17[CodeGen] Qualify auto variables in for loops (NFC)Kazu Hirata1-1/+1
2022-02-26Use RegisterInfo::regsOverlaps instead of checking aliasesBenjamin Kramer1-12/+2
This is both less code and faster since it doesn't have to expand all the sub & superreg sets. NFCI.
2021-09-19[llvm] Use pop_back_val (NFC)Kazu Hirata1-2/+1
2021-08-04[RDA] Attempt to make RDA subreg awareDavid Green1-14/+30
This attempts to make more of RDA aware of potentially overlapping subregisters. Some of this was already in place, with it iterating through MCRegUnitIterators. This also replaces calls to LiveRegs.contains(..) with !LiveRegs.available(..), and updates the isValidRegUseOf and isValidRegDefOf to search subregs. Differential Revision: https://reviews.llvm.org/D107351
2021-05-18[RDA] Fix printing of regs / reg units. NFCDavid Green1-1/+1
It was printing RegUnits as Regs, leading to much confusion in the debug logs.
2021-02-28[llvm] Use set_is_subset (NFC)Kazu Hirata1-7/+4
2020-12-31[CodeGen] Construct SmallVector with iterator ranges (NFC)Kazu Hirata1-3/+1
2020-12-28[CodeGen] Use llvm::append_range (NFC)Kazu Hirata1-2/+1
2020-10-22[NFC][MC] Use MCRegister for ReachingDefAnalysis APIsMircea Trofin1-37/+43
Also updated the users of the APIs; and a drive-by small change to RDFRegister.cpp Differential Revision: https://reviews.llvm.org/D89912
2020-10-10[ARM] Attempt to make Tail predication / RDA more resilient to empty blocksDavid Green1-9/+15
There are a number of places in RDA where we assume the block will not be empty. This isn't necessarily true for tail predicated loops where we have removed instructions. This attempt to make the pass more resilient to empty blocks, not casting pointers to machine instructions where they would be invalid. The test contains a case that was previously failing, but recently been hidden on trunk. It contains an empty block to begin with to show a similar error. Differential Revision: https://reviews.llvm.org/D88926
2020-09-30[RDA] isSafeToDefRegAt: Look at global usesSam Parker1-1/+1
We weren't looking at global uses of a value, so we could happily overwrite the register incorrectly. Differential Revision: https://reviews.llvm.org/D88554
2020-09-30[ARM][LowOverheadLoops] TryRemove helper.Sam Parker1-0/+3
Make a helper function that wraps around RDA::isSafeToRemove and utilises the existing DCE IT block checks.
2020-09-30[RDA] Switch isSafeToMove iteratorsSam Parker1-3/+13
So forwards is forwards and backwards is reverse. Also add a check so that we know the instructions are in the expected order. Differential Revision: https://reviews.llvm.org/D88419
2020-09-25[ARM] Find VPT implicitly predicated by VCTPSam Parker1-1/+0
On failing to find a VCTP in the list of instructions that explicitly predicate the entry of a VPT block, inspect whether the block is controlled via VPT which is implicitly predicated due to it's predicated operand(s). Differential Revision: https://reviews.llvm.org/D87819
2020-09-16[RDA] Fix getUniqueReachingDef for self loopsSam Parker1-10/+6
We've fixed the case where this could return an instruction after the given instruction, but also means that we can falsely return a 'unique' def when they could be one coming from the backedge of a loop. Differential Revision: https://reviews.llvm.org/D87751
2020-08-28[ARM][LowOverheadLoops] Liveouts and reductionsSam Parker1-0/+13
Remove the code that tried to look for reduction patterns, since the vectorizer and isel can now produce predicated arithmetic instructios within the loop body. This has required some reorganisation and fixes around live-out and predication checks, as well as looking for cases where an input/output is initialised to zero. Differential Revision: https://reviews.llvm.org/D86613
2020-08-26[RDA] Don't visit the BB of the instruction in getReachingUniqueMIDefSam Tebbs1-1/+3
If the basic block of the instruction passed to getUniqueReachingMIDef is a transitive predecessor of itself and has a definition of the register, the function will return that definition even if it is after the instruction given to the function. This patch stops the function from scanning the instruction's basic block to prevent this. Differential Revision: https://reviews.llvm.org/D86607
2020-08-25[NFC][RDA] Add explicit def checkSam Parker1-2/+4
Explicitly check that there is a local def prior to the given instruction in getReachingLocalMIDef instead of just relying on a nullptr return from getInstFromId.
2020-08-11[RDA] Fix DBG_VALUE issuesSam Parker1-18/+18
We skip debug instructions in RDA so we cannot attempt to look them up in our instruction map without causing a crash. But some of the methods select the last instruction in the block and this instruction may be a debug instruction... So, use getLastNonDebugInstr instead of calling back on a MachineBasicBlock. MachineBasicBlock iterators have also been updated to use instructionsWithoutDebug so we can avoid the manual checks for debug instructions. Differential Revision: https://reviews.llvm.org/D85658
2020-07-01[ARM][LowOverheadLoops] Handle reductionsSam Parker1-0/+6
While validating live-out values, record instructions that look like a reduction. This will comprise of a vector op (for now only vadd), a vorr (vmov) which store the previous value of vadd and then a vpsel in the exit block which is predicated upon a vctp. This vctp will combine the last two iterations using the vmov and vadd into a vector which can then be consumed by a vaddv. Once we have determined that it's safe to perform tail-predication, we need to change this sequence of instructions so that the predication doesn't produce incorrect code. This involves changing the register allocation of the vadd so it updates itself and the predication on the final iteration will not update the falsely predicated lanes. This mimics what the vmov, vctp and vpsel do and so we then don't need any of those instructions. Differential Revision: https://reviews.llvm.org/D75533
2020-04-28[NFC] Correct spelling of "ambiguous"Casey Carter1-1/+1
2020-04-07[RDA] Avoid full reprocessing of blocks in loops (NFCI)Nikita Popov1-3/+62
RDA sometimes needs to visit blocks twice, to take into account reaching defs coming in along loop back edges. Currently it handles repeated visitation the same way as usual, which means that it will scan through all instructions and their reg unit defs again. Not only is this very inefficient, it also means that all reaching defs in loops are going to be inserted twice. We can do much better than this. The only thing we need to handle is a new reaching def from a predecessor, which either needs to be prepended to the reaching definitions (if there was no reaching def from a predecessor), or needs to replace an existing predecessor reaching def, if it is more recent. Since D77508 we only store the most recent predecessor reaching def, so that's the only one that may need updating. This also has the nice side-effect that reaching definitions are now automatically sorted and unique, so drop the llvm::sort() call in favor of an assertion. Differential Revision: https://reviews.llvm.org/D77511
2020-04-07[RDA] Don't pass down TraversedMBB (NFC)Nikita Popov1-14/+11
Only pass the MachineBasicBlock itself down to helper methods, they don't need to know about traversal. Move the debug print into the main method.
2020-04-07[RDA] Avoid inserting duplicate reaching defs (NFCI)Nikita Popov1-5/+9
An instruction may define the same reg unit multiple times, avoid inserting the same reaching def multiple times in that case. Also print the reg unit, rather than the super-register, in the debug code.
2020-04-06[RDA] Only store most recent reaching def from predecessors (NFCI)Nikita Popov1-5/+7
When entering a basic block, RDA inserts reaching definitions coming from predecessor blocks (which will be negative numbers) in a rather peculiar way. If you have incoming reaching definitions -4, -3, -2, -1, it will insert those. If you have incoming reaching definitions -1, -2, -3, -4, it will insert -1, -1, -1, -1, as the max is taken at each step. That's probably not what was intended... However, RDA only actually cares about the most recent reaching definition from a predecessor (to calculate clearance), so this ends up working fine as far as behavior is concerned. It does waste memory on unnecessary reaching definitions though. This patch changes the implementation to first compute the most recent reaching definition in one loop, and then insert only that one in a separate loop. Differential Revision: https://reviews.llvm.org/D77508
2020-04-06[RDA] Don't adjust ReachingDefDefaultVal (NFCI)Nikita Popov1-1/+2
At the end of a basic block, RDA adjusts all the reaching defs it found to be relative to the end of the basic block, rather than the start of it. However, it also does this to registers which don't have a reaching def, indicated by ReachingDefDefaultVal. This means that code checking against ReachingDefDefaultVal will not skip them, and may insert them into the reaching definition list. This is ultimately harmless, but causes unnecessary work and is logically not right. Differential Revision: https://reviews.llvm.org/D77506
2020-03-10Give helpers internal linkage. NFC.Benjamin Kramer1-5/+5
2020-03-03[RDA][ARM] collectKilledOperands across multiple blocksSam Parker1-10/+6
Use MIOperand in collectLocalKilledOperands to make the search global, as we already have to search for global uses too. This allows us to delete more dead code when tail predicating. Differential Revision: https://reviews.llvm.org/D75167
2020-03-03[ARM][RDA] Allow multiple killed usersSam Parker1-2/+5
In RDA, check against the already decided dead instructions when looking at users. This allows an instruction to be removed if it has multiple users, but they're all dead. This means that IT instructions can be considered killed once all the itstate using instructions are dead. Differential Revision: https://reviews.llvm.org/D75245
2020-02-28[RDA] Track implicit-defsSam Parker1-18/+40
Ensure that we're recording implicit defs, as well as visiting implicit uses and implicit defs when we're walking through operands. Differential Revision: https://reviews.llvm.org/D75185
2020-02-26[ARM][RDA] add getUniqueReachingMIDefSam Parker1-5/+58
Add getUniqueReachingMIDef to RDA which performs a global search for a machine instruction that produces a unique definition of a given register at a given point. Also add two helper functions (getMIOperand) that wrap around this functionality to get the incoming definition uses of a given instruction. These now replace the uses of getReachingMIDef in ARMLowOverheadLoops. getReachingMIDef has been renamed to getReachingLocalMIDef and has been made private along with getInstFromId. Differential Revision: https://reviews.llvm.org/D74605
generated by cgit v1.1 at 2025-09-30 14:24:02 +0000