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path: root/llvm/lib/CodeGen/MachineScheduler.cpp
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2017-12-15MachineFunction: Return reference from getFunction(); NFCMatthias Braun1-2/+2
The Function can never be nullptr so we can return a reference. llvm-svn: 320884
2017-12-15Recommit CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.valueYaxun Liu1-2/+6
The regression on ppc64 was not due to this commit. llvm-svn: 320788
2017-12-14Revert CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.valueYaxun Liu1-6/+2
This commit might have caused regression on ppc64. Revert it to verify that. llvm-svn: 320712
2017-12-13CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.valueYaxun Liu1-2/+6
Two issues were found about machine inst scheduler when compiling ProRender with -g for amdgcn target: GCNScheduleDAGMILive::schedule tries to update LiveIntervals for DBG_VALUE, which it should not since DBG_VALUE is not mapped in LiveIntervals. when DBG_VALUE is the last instruction of MBB, ScheduleDAGInstrs::buildSchedGraph and ScheduleDAGMILive::scheduleMI does not move RPTracker properly, which causes assertion. This patch fixes that. Differential Revision: https://reviews.llvm.org/D41132 llvm-svn: 320650
2017-12-13Rename LiveIntervalAnalysis.h to LiveIntervals.hMatthias Braun1-1/+1
Headers/Implementation files should be named after the class they declare/define. Also eliminated an `#include "llvm/CodeGen/LiveIntervalAnalysis.h"` in favor of `class LiveIntarvals;` llvm-svn: 320546
2017-12-04[CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih1-15/+14
As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-11-28[CodeGen] Rename functions PrintReg* to printReg*Francis Visoiu Mistrih1-2/+2
LLVM Coding Standards: Function names should be verb phrases (as they represent actions), and command-like function should be imperative. The name should be camel case, and start with a lower case letter (e.g. openFile() or isFoo()). Differential Revision: https://reviews.llvm.org/D40416 llvm-svn: 319168
2017-11-17Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie1-3/+3
All these headers already depend on CodeGen headers so moving them into CodeGen fixes the layering (since CodeGen depends on Target, not the other way around). llvm-svn: 318490
2017-11-08Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie1-1/+1
This header includes CodeGen headers, and is not, itself, included by any Target headers, so move it into CodeGen to match the layering of its implementation. llvm-svn: 317647
2017-10-25[MachineScheduler] Minor refactoring.Jonas Paulsson1-13/+18
Duplicated code found in three places put into a new static function: /// Given a Count of resource usage and a Latency value, return true if a /// SchedBoundary becomes resource limited. static bool checkResourceLimit(unsigned LFactor, unsigned Count, unsigned Latency) { return (int)(Count - (Latency * LFactor)) > (int)LFactor; } Review: Florian Hahn, Matthias Braun https://reviews.llvm.org/D39235 llvm-svn: 316560
2017-10-15Reverting r315590; it did not include changes for llvm-tblgen, which is ↵Aaron Ballman1-4/+4
causing link errors for several people. Error LNK2019 unresolved external symbol "public: void __cdecl `anonymous namespace'::MatchableInfo::dump(void)const " (?dump@MatchableInfo@?A0xf4f1c304@@QEBAXXZ) referenced in function "public: void __cdecl `anonymous namespace'::AsmMatcherEmitter::run(class llvm::raw_ostream &)" (?run@AsmMatcherEmitter@?A0xf4f1c304@@QEAAXAEAVraw_ostream@llvm@@@Z) llvm-tblgen D:\llvm\2017\utils\TableGen\AsmMatcherEmitter.obj 1 llvm-svn: 315854
2017-10-12[dump] Remove NDEBUG from test to enable dump methods [NFC]Don Hinton1-4/+4
Summary: Add LLVM_FORCE_ENABLE_DUMP cmake option, and use it along with LLVM_ENABLE_ASSERTIONS to set LLVM_ENABLE_DUMP. Remove NDEBUG and only use LLVM_ENABLE_DUMP to enable dump methods. Move definition of LLVM_ENABLE_DUMP from config.h to llvm-config.h so it'll be picked up by public headers. Differential Revision: https://reviews.llvm.org/D38406 llvm-svn: 315590
2017-10-10CodeGen: Minor cleanups to use MachineInstr::getMF. NFCJustin Bogner1-1/+1
Since r315388 we have a shorter way to say this, so we'll replace MI->getParent()->getParent() with MI->getMF() in a few places. llvm-svn: 315390
2017-10-03[MiSched] - Simplify ProcResEntry accessJaved Absar1-6/+8
Reviewed by: @MatzeB Differential Revision: https://reviews.llvm.org/D38447 llvm-svn: 314775
2017-09-27[Misched]: Remove double call getMicroOpFactor.NFC.Javed Absar1-1/+1
Reviewed by: @MatzeB Differential Revision: https://reviews.llvm.org/D38176 llvm-svn: 314296
2017-09-13Allow target to decide when to cluster loads/stores in mischedStanislav Mekhanoshin1-6/+2
MachineScheduler when clustering loads or stores checks if base pointers point to the same memory. This check is done through comparison of base registers of two memory instructions. This works fine when instructions have separate offset operand. If they require a full calculated pointer such instructions can never be clustered according to such logic. Changed shouldClusterMemOps to accept base registers as well and let it decide what to do about it. Differential Revision: https://reviews.llvm.org/D37698 llvm-svn: 313208
2017-09-13[MachineScheduler] Put SchedRegion in an anonymous namespace.Mikael Holmen1-0/+2
Summary: It pollutes the global namespace otherwise. Patch by: Bevin Hansson Reviewers: jonpa Reviewed By: jonpa Subscribers: MatzeB, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D37555 llvm-svn: 313148
2017-09-11[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use ↵Eugene Zelenko1-8/+8
warnings; other minor fixes (NFC). llvm-svn: 312971
2017-08-17[SystemZ, MachineScheduler] Improve post-RA scheduling.Jonas Paulsson1-36/+84
The idea of this patch is to continue the scheduler state over an MBB boundary in the case where the successor block has only one predecessor. This means that the scheduler will continue in the successor block (after emitting any branch instructions) with e.g. maintained processor resource counters. Benchmarks have been confirmed to benefit from this. The algorithm in MachineScheduler.cpp that extracts scheduling regions of an MBB has been extended so that the strategy may optionally reverse the order of processing the regions themselves. This is controlled by a new method doMBBSchedRegionsTopDown(), which defaults to false. Handling the top-most region of an MBB first also means that a top-down scheduler can continue the scheduler state across any scheduling boundary between to regions inside MBB. Review: Ulrich Weigand, Matthias Braun, Andy Trick. https://reviews.llvm.org/D35053 llvm-svn: 311072
2017-06-21Mark dump() methods as const. NFCSam Clegg1-3/+3
Add const qualifier to any dump() method where adding one was trivial. Differential Revision: https://reviews.llvm.org/D34481 llvm-svn: 305963
2017-06-21Use range-loop in machine-scheduler. NFCI.Javed Absar1-94/+72
Converts to range-loop usage in machine scheduler. This makes the code neater and easier to read, and also keeps pace of the machine scheduler implementation with C++11 features. Reviewed by: Matthias Braun Differential Revision: https://reviews.llvm.org/D34320 llvm-svn: 305887
2017-06-06Sort the remaining #include lines in include/... and lib/....Chandler Carruth1-4/+4
I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). llvm-svn: 304787
2017-05-27ScheduleDAGInstrs: Fix fixupKills()Matthias Braun1-1/+1
Rewrite fixupKills() to use the LivePhysRegs class. Simplifies the code and fixes a bug where the CSR registers in return blocks where missed leading to invalid kill flags. Also remove the unnecessary rule that we wouldn't set kill flags on tied operands. No tests as I have an upcoming commit improving MachineVerifier checks to catch these cases in multiple existing lit tests. llvm-svn: 304055
2017-05-25CodeGen: Rename DEBUG_TYPE to match passnamesMatthias Braun1-3/+3
Rename the DEBUG_TYPE to match the names of corresponding passes where it makes sense. Also establish the pattern of simply referencing DEBUG_TYPE instead of repeating the passname where possible. llvm-svn: 303921
2017-05-23[AArch64] Make instruction fusion more aggressive. Florian Hahn1-0/+6
Summary: This patch makes instruction fusion more aggressive by * adding artificial edges between the successors of FirstSU and SecondSU, similar to BaseMemOpClusterMutation::clusterNeighboringMemOps. * updating PostGenericScheduler::tryCandidate to keep clusters together, similar to GenericScheduler::tryCandidate. This change increases the number of AES instruction pairs generated on Cortex-A57 and Cortex-A72. This doesn't change code at all in most benchmarks or general code, but we've seen improvement on kernels using AESE/AESMC and AESD/AESIMC. Reviewers: evandro, kristof.beyls, t.p.northover, silviu.baranga, atrick, rengolin, MatzeB Reviewed By: evandro Subscribers: aemerson, rengolin, MatzeB, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D33230 llvm-svn: 303618
2017-04-12MachineScheduler: Skip acyclic latency heuristic for in-order coresMatthias Braun1-1/+1
The current heuristic is triggered on `InFlightCount > BufferLimit` which isn't really helpful on in-order cores where BufferLimit is zero. Note that we already get latency hiding effects for in order cores by instructions staying in the pending queue on stalls; The additional latency scheduling heuristics only have minimal effects after that while occasionally increasing register pressure too much resulting in extra spills. My motivation here is additional spills/reloads ending up in a loop in 464.h264ref / BlockMotionSearch function resulting in a 4% overal regression on an in order core. rdar://30264380 llvm-svn: 300083
2017-03-27Improve machine schedulers for in-order processorsJaved Absar1-0/+28
This patch enables schedulers to specify instructions that cannot be issued with any other instructions. It also fixes BeginGroup/EndGroup. Reviewed by: Andrew Trick Differential Revision: https://reviews.llvm.org/D30744 llvm-svn: 298885
2017-03-24[MachineScheduler] Add missing machine pass dependency.Davide Italiano1-0/+1
llvm-svn: 298736
2017-02-24Revert "Correct register pressure calculation in presence of subregs"Stanislav Mekhanoshin1-2/+2
This reverts commit r296009. It broke one out of tree target and also does not account for all partial lines added or removed when calculating PressureDiff. llvm-svn: 296182
2017-02-23Correct register pressure calculation in presence of subregsStanislav Mekhanoshin1-2/+2
If a subreg is used in an instruction it counts as a whole superreg for the purpose of register pressure calculation. This patch corrects improper register pressure calculation by examining operand's lane mask. Differential Revision: https://reviews.llvm.org/D29835 llvm-svn: 296009
2017-02-23Fix signed/unsigned comparison warning on MSVCSimon Pilgrim1-1/+1
llvm-svn: 295962
2017-02-22[CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko1-42/+95
other minor fixes (NFC). llvm-svn: 295893
2017-02-01[CodeGen] Move MacroFusion to the targetEvandro Menezes1-74/+0
This patch moves the class for scheduling adjacent instructions, MacroFusion, to the target. In AArch64, it also expands the fusion to all instructions pairs in a scheduling block, beyond just among the predecessors of the branch at the end. Differential revision: https://reviews.llvm.org/D28489 llvm-svn: 293737
2017-01-28Cleanup dump() functions.Matthias Braun1-5/+9
We had various variants of defining dump() functions in LLVM. Normalize them (this should just consistently implement the things discussed in http://lists.llvm.org/pipermail/cfe-dev/2014-January/034323.html For reference: - Public headers should just declare the dump() method but not use LLVM_DUMP_METHOD or #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) - The definition of a dump method should look like this: #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DUMP_METHOD void MyClass::dump() { // print stuff to dbgs()... } #endif llvm-svn: 293359
2016-12-16Implement LaneBitmask::any(), use it to replace !none(), NFCIKrzysztof Parzyszek1-2/+2
llvm-svn: 289974
2016-12-15Extract LaneBitmask into a separate typeKrzysztof Parzyszek1-3/+3
Specifically avoid implicit conversions from/to integral types to avoid potential errors when changing the underlying type. For example, a typical initialization of a "full" mask was "LaneMask = ~0u", which would result in a value of 0x00000000FFFFFFFF if the type was extended to uint64_t. Differential Revision: https://reviews.llvm.org/D27454 llvm-svn: 289820
2016-11-28MachineScheduler: Export function to construct "default" scheduler.Matthias Braun1-20/+12
This makes the createGenericSchedLive() function that constructs the default scheduler available for the public API. This should help when you want to get a scheduler and the default list of DAG mutations. This also shrinks the list of default DAG mutations: {Load|Store}ClusterDAGMutation and MacroFusionDAGMutation are no longer added by default. Targets can easily add them if they need them. It also makes it easier for targets to add alternative/custom macrofusion or clustering mutations while staying with the default createGenericSchedLive(). It also saves the callback back and forth in TargetInstrInfo::enableClusterLoads()/enableClusterStores(). Differential Revision: https://reviews.llvm.org/D26986 llvm-svn: 288057
2016-11-11Revert "(origin/master, origin/HEAD) MachineScheduler/ScheduleDAG: Add ↵Matthias Braun1-7/+0
support to skipping a node." Revert accidentally committed change. This reverts commit r286655. llvm-svn: 286656
2016-11-11MachineScheduler/ScheduleDAG: Add support to skipping a node.Matthias Braun1-0/+7
The DAG mutators in the scheduler cannot really remove DAG nodes as additional anlysis information such as ScheduleDAGToplogicalSort are already computed at this point and rely on a fixed number of DAG nodes. Alleviate the missing removal with a new flag: Setting the new skip flag on a node ignores it during scheduling. llvm-svn: 286655
2016-11-11ScheduleDAGInstrs: Move VRegUses to ScheduleDAGMILive; NFCIMatthias Braun1-0/+43
Push VRegUses/collectVRegUses() down the class hierarchy towards its only user ScheduleDAGMILive. NFCI: The initialization of the map happens at a later point but that should not matter. This is in preparation to allow DAG mutators to merge nodes, which relies on this map getting computed later. llvm-svn: 286654
2016-11-11MachineScheduler: Dump EntrySU/ExitSU if possibleMatthias Braun1-2/+12
llvm-svn: 286653
2016-11-11ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps()Matthias Braun1-30/+20
addSchedBarrierDeps() is supposed to add use operands to the ExitSU node. The current implementation adds uses for calls/barrier instruction and the MBB live-outs in all other cases. The use operands of conditional jump instructions were missed. Also added code to macrofusion to set the latencies between nodes to zero to avoid problems with the fusing nodes lingering around in the pending list now. Differential Revision: https://reviews.llvm.org/D25140 llvm-svn: 286544
2016-11-09[MachineScheduler] Comments fixing.Jonas Paulsson1-1/+2
The name/comment of the third argument to the ScheduleDAGMI constructor is RemoveKillFlags and not IsPostRA. Only the comments are changed. Review: A Trick llvm-svn: 286350
2016-11-04Comment rewording in MachineScheduler.cpp.Jonas Paulsson1-3/+2
Author: A Trick llvm-svn: 285991
2016-10-18Fix differences in codegen between Linux and Windows toolchainsMandeep Singh Grang1-1/+2
Summary: There are differences in codegen between Linux and Windows due to: 1. Using std::sort which uses quicksort which is a non-stable sort. 2. Iterating over Set data structure where the iteration order is non deterministic. Reviewers: arsenm, grosbach, junbuml, zinob, MatzeB Subscribers: MatzeB, wdng Differential Revision: https://reviews.llvm.org/D25695 llvm-svn: 284441
2016-09-22MachineScheduler: Slightly simplify release nodeMatthias Braun1-14/+0
llvm-svn: 282201
2016-09-22MachineScheduler: Remove ineffective heuristic; NFCMatthias Braun1-11/+0
Currently all nodes get added to the NextSU list when they are released, so any candidate must be in that list, making the heuristic ineffective. Remove it for now, we can add it back later in a working fashion if necessary. llvm-svn: 282200
2016-08-19MachineScheduler: Add constructor functions for the DAGMutationsTom Stellard1-4/+40
Summary: This way they can be re-used by target-specific schedulers. Reviewers: atrick, MatzeB, kparzysz Subscribers: kparzysz, llvm-commits, MatzeB Differential Revision: https://reviews.llvm.org/D23678 llvm-svn: 279305
2016-08-16CodeGen: Avoid dereferencing end() when unconstifying iteratorsDuncan P. N. Exon Smith1-8/+4
Rather than doing a funny dance that relies on dereferencing end() not crashing, add some API to MachineInstrBundleIterator to get a non-const version of the iterator. llvm-svn: 278870
2016-08-11CodeGen: Avoid dereferencing end() in MachineSchedulerDuncan P. N. Exon Smith1-2/+3
Check MachineInstr::isDebugValue for the same instruction as we're calling isSchedBoundary, avoiding the possibility of dereferencing end(). This is a functionality change even when I!=end(). Matthias had a look and agrees this is the right resolution (as opposed to checking for end()). This is triggered by a huge number of tests, but they happen to magically pass right now. I found this because WIP patches for PR26753 convert them into crashes. llvm-svn: 278394
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