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| author | Yaxun Liu <Yaxun.Liu@amd.com> | 2017-12-14 16:12:04 +0000 |
|---|---|---|
| committer | Yaxun Liu <Yaxun.Liu@amd.com> | 2017-12-14 16:12:04 +0000 |
| commit | f902ef0a5d07db499eb3f9dab00cc3ca9362b9fe (patch) | |
| tree | e2709876e27f95e0938f6ae2cd89538a6d38ffae /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | 14e36ee5c385a5368b77eea7a6b0ae8cc3bb40c2 (diff) | |
| download | llvm-f902ef0a5d07db499eb3f9dab00cc3ca9362b9fe.zip llvm-f902ef0a5d07db499eb3f9dab00cc3ca9362b9fe.tar.gz llvm-f902ef0a5d07db499eb3f9dab00cc3ca9362b9fe.tar.bz2 | |
Revert CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.value
This commit might have caused regression on ppc64. Revert it to verify that.
llvm-svn: 320712
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineScheduler.cpp | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp index 6be1373..f3017ac 100644 --- a/llvm/lib/CodeGen/MachineScheduler.cpp +++ b/llvm/lib/CodeGen/MachineScheduler.cpp @@ -1053,10 +1053,7 @@ void ScheduleDAGMILive::initRegPressure() { dumpRegSetPressure(BotRPTracker.getRegSetPressureAtPos(), TRI); ); - assert((BotRPTracker.getPos() == RegionEnd || - (RegionEnd->isDebugValue() && - BotRPTracker.getPos() == priorNonDebug(RegionEnd, RegionBegin))) && - "Can't find the region bottom"); + assert(BotRPTracker.getPos() == RegionEnd && "Can't find the region bottom"); // Cache the list of excess pressure sets in this region. This will also track // the max pressure in the scheduled code for these sets. @@ -1462,8 +1459,7 @@ void ScheduleDAGMILive::scheduleMI(SUnit *SU, bool IsTopNode) { RegOpers.detectDeadDefs(*MI, *LIS); } - if (BotRPTracker.getPos() != CurrentBottom) - BotRPTracker.recedeSkipDebugValues(); + BotRPTracker.recedeSkipDebugValues(); SmallVector<RegisterMaskPair, 8> LiveUses; BotRPTracker.recede(RegOpers, &LiveUses); assert(BotRPTracker.getPos() == CurrentBottom && "out of sync"); |