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path: root/llvm/lib/CodeGen/MachineRegisterInfo.cpp
AgeCommit message (Expand)AuthorFilesLines
2011-06-27Remove RegClass2VRegMap from MachineRegisterInfo.Evan Cheng1-14/+0
2011-06-02Make it possible to have unallocatable register classes.Jakob Stoklund Olesen1-0/+2
2011-02-21Revert r124611 - "Keep track of incoming argument's location while emitting L...Devang Patel1-8/+1
2011-01-31Keep track of incoming argument's location while emitting LiveIns.Devang Patel1-1/+8
2011-01-09Use IndexedMap for MachineRegisterInfo as well. No functional change.Jakob Stoklund Olesen1-19/+22
2010-10-06Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE.Jakob Stoklund Olesen1-0/+14
2010-07-10Replace copyRegToReg with COPY everywhere in lib/CodeGen except for FastISel.Jakob Stoklund Olesen1-6/+3
2010-06-24Teach EmitLiveInCopies to omit copies for unused virtual registers,Dan Gohman1-14/+25
2010-06-18Don't leak RegClass2VRegMap, which is now a new[] array instead of aDan Gohman1-0/+1
2010-06-18Start TargetRegisterClass indices at 0 instead of 1, so thatDan Gohman1-2/+2
2010-05-29Remove unused function.Benjamin Kramer1-69/+0
2010-05-29Remove schedule-livein-copies. It's not being used.Evan Cheng1-30/+12
2010-05-24Avoid adding duplicate function live-in's.Evan Cheng1-0/+9
2010-05-13Add a utility function for conservatively clearing kill flags, and makeDan Gohman1-0/+9
2010-05-11Silence warningJakob Stoklund Olesen1-1/+1
2010-05-11Simplify the tracking of used physregs to a bulk bitor followed by a transitiveJakob Stoklund Olesen1-0/+9
2010-05-06Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman1-2/+4
2010-04-28Replace r102368 with code that's less fragile. This creates DBG_VALUE instruc...Evan Cheng1-28/+9
2010-04-26Insert dbg_value instructions for function entry block liveins (i.e. function...Evan Cheng1-1/+30
2010-04-14Move the code for initialing the entry block livein set out ofDan Gohman1-0/+5
2010-04-14Move the code for emitting livein copies out of SelectionDAGISel.Dan Gohman1-0/+106
2010-04-13Move MachineRegisterInfo's isLiveIn and isLiveOut out of line.Dan Gohman1-0/+14
2010-03-03Add MachineRegisterInfo::hasOneUse and hasOneNonDBGUse.Evan Cheng1-0/+13
2009-09-25Simplify a few more uses of reg_iterator.Dan Gohman1-5/+3
2009-06-15Part 1.Evan Cheng1-1/+1
2009-06-14Move register allocation preference (or hint) from LiveInterval to MachineReg...Evan Cheng1-0/+2
2009-04-15Move MachineRegisterInfo::setRegClass out of line.Dan Gohman1-0/+20
2008-12-08Move createVirtualRegister out-of-line.Dan Gohman1-0/+18
2008-10-20Add a register class -> virtual registers map.Evan Cheng1-0/+1
2008-07-07Assert that all MachineInstrs update PhysRegUseDefLists inDan Gohman1-0/+3
2008-02-13Added debugging routine dumpUses.Evan Cheng1-0/+8
2008-02-10Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman1-5/+5
2008-01-01switch the register iterator to act more like hte LLVM value iterator: derefe...Chris Lattner1-2/+16
2008-01-01Add a trivial but handy function to efficiently return the machine Chris Lattner1-0/+15
2008-01-01Implement automatically updated def/use lists for all MachineInstr register Chris Lattner1-1/+27
2007-12-31Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner1-0/+20
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