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path: root/llvm/lib/CodeGen/MachineInstrBundle.cpp
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2016-10-24CodeGen/Passes: Pass MachineFunction as functor arg; NFCMatthias Braun1-4/+6
Passing a MachineFunction as argument is more natural and avoids an unnecessary round-trip through the logic determining the correct Subtarget because MachineFunction already has a reference anyway. llvm-svn: 285039
2016-06-12Move instances of std::function.Benjamin Kramer1-1/+1
Or replace with llvm::function_ref if it's never stored. NFC intended. llvm-svn: 272513
2016-05-27Apply clang-tidy's misc-move-constructor-init throughout LLVM.Benjamin Kramer1-1/+2
No functionality change intended, maybe a tiny performance improvement. llvm-svn: 270997
2016-04-27[MachineInstrBundle] Actually set the PartialDeadDef flag only when the registerQuentin Colombet1-1/+1
is defined! The users were checking the proper thing (Defined + PartialDeadDef), but the information may have been wrong for other use cases, so fix that. llvm-svn: 267641
2016-04-26[MachineInstrBundle] Improvement the recognition of dead definitions.Quentin Colombet1-3/+7
Now, it is possible to know that partial definitions are dead definitions and recognize that clobbered registers are also dead. llvm-svn: 267621
2016-01-05MachineInstrBundle: Fix reversed isSuperRegisterEq() callMatthias Braun1-1/+1
Unfortunately this fix had the effect of exposing the -verify-machineinstrs FIXME of X86InstrInfo.cpp in two testcases for which I disabled it for now. Two testcases also have additional pushq/popq where the corrected code cannot prove that %rax is dead any longer. Looking at the examples, this could potentially be fixed by improving computeRegisterLiveness() to check the live-in lists of the successors blocks when reaching the end of a block. This fixes http://llvm.org/PR25951. llvm-svn: 256799
2015-12-11CodeGen: Redo analyzePhysRegs() and computeRegisterLiveness()Matthias Braun1-23/+20
computeRegisterLiveness() was broken in that it reported dead for a register even if a subregister was alive. I assume this was because the results of analayzePhysRegs() are hard to understand with respect to subregisters. This commit: Changes the results of analyzePhysRegs (=struct PhysRegInfo) to be clearly understandable, also renames the fields to avoid silent breakage of third-party code (and improve the grammar). Fix all (two) users of computeRegisterLiveness() in llvm: By reenabling it and removing workarounds for the bug. This fixes http://llvm.org/PR24535 and http://llvm.org/PR25033 Differential Revision: http://reviews.llvm.org/D15320 llvm-svn: 255362
2015-08-10x86: Emit LAHF/SAHF instead of PUSHF/POPFJF Bastien1-1/+1
NaCl's sandbox doesn't allow PUSHF/POPF out of security concerns (priviledged emulators have forgotten to mask system bits in the past, and EFLAGS's DF bit is a constant source of hilarity). Commit r220529 fixed PR20376 by saving cmpxchg's flags result using EFLAGS, this commit now generated LAHF/SAHF instead, for all of x86 (not just NaCl) because it leads to an overall performance gain over PUSHF/POPF. As with the previous patch this code generation is pretty bad because it occurs very later, after register allocation, and in many cases it rematerializes flags which were already available (e.g. already in a register through SETE). Fortunately it's somewhat rare that this code needs to fire. I did [[ https://github.com/jfbastien/benchmark-x86-flags | a bit of benchmarking ]], the results on an Intel Haswell E5-2690 CPU at 2.9GHz are: | Time per call (ms) | Runtime (ms) | Benchmark | | 0.000012514 | 6257 | sete.i386 | | 0.000012810 | 6405 | sete.i386-fast | | 0.000010456 | 5228 | sete.x86-64 | | 0.000010496 | 5248 | sete.x86-64-fast | | 0.000012906 | 6453 | lahf-sahf.i386 | | 0.000013236 | 6618 | lahf-sahf.i386-fast | | 0.000010580 | 5290 | lahf-sahf.x86-64 | | 0.000010304 | 5152 | lahf-sahf.x86-64-fast | | 0.000028056 | 14028 | pushf-popf.i386 | | 0.000027160 | 13580 | pushf-popf.i386-fast | | 0.000023810 | 11905 | pushf-popf.x86-64 | | 0.000026468 | 13234 | pushf-popf.x86-64-fast | Clearly `PUSHF`/`POPF` are suboptimal. It doesn't really seems to be worth teaching LLVM about individual flags, at least not for this purpose. Reviewers: rnk, jvoung, t.p.northover Subscribers: llvm-commits Differential revision: http://reviews.llvm.org/D6629 llvm-svn: 244503
2015-08-05Revert "Fix MO's analyzePhysReg, it was confusing sub- and super-registers. ↵JF Bastien1-1/+1
Problem pointed out by Michael Hordijk." I mistakenly committed the patch for D6629, and was trying to commit another. Reverting until it gets proper signoff. llvm-svn: 244121
2015-08-05Fix MO's analyzePhysReg, it was confusing sub- and super-registers. Problem ↵JF Bastien1-1/+1
pointed out by Michael Hordijk. llvm-svn: 244120
2015-06-08[ARM] Pass a callback to FunctionPass constructors to enable skipping executionAkira Hatanaka1-1/+12
on a per-function basis. Previously some of the passes were conditionally added to ARM's pass pipeline based on the target machine's subtarget. This patch makes changes to add those passes unconditionally and execute them conditonally based on the predicate functor passed to the pass constructors. This enables running different sets of passes for different functions in the module. rdar://problem/20542263 Differential Revision: http://reviews.llvm.org/D8717 llvm-svn: 239325
2014-11-19Update SetVector to rely on the underlying set's insert to return a ↵David Blaikie1-4/+4
pair<iterator, bool> This is to be consistent with StringSet and ultimately with the standard library's associative container insert function. This lead to updating SmallSet::insert to return pair<iterator, bool>, and then to update SmallPtrSet::insert to return pair<iterator, bool>, and then to update all the existing users of those functions... llvm-svn: 222334
2014-10-14Have MachineInstrBundle use the MachineFunction for subtargetEric Christopher1-5/+5
access rather than the TargetMachine. llvm-svn: 219662
2014-08-04Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher1-2/+3
information and update all callers. No functional change. llvm-svn: 214781
2014-03-07[C++11] Add 'override' keyword to virtual methods that override their base ↵Craig Topper1-2/+2
class. llvm-svn: 203220
2014-03-02[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer1-2/+2
Remove the old functions. llvm-svn: 202636
2013-01-04Move an assertion so it doesn't dereference end().Jakob Stoklund Olesen1-4/+3
The R600 target has test cases that exercises this code. llvm-svn: 171538
2012-12-13Use the new MI bundling API in MachineInstrBundle itself.Jakob Stoklund Olesen1-4/+5
The new API is higher level than just manipulating the bundle flags directly, and the setIsInsideBundle() function will disappear soon. llvm-svn: 170159
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth1-3/+3
Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
2012-11-20Fix physical register liveness calculations:Tim Northover1-2/+4
+ Take account of clobbers + Give outputs priority over inputs since they happen later. llvm-svn: 168360
2012-09-17Increase the static sizes of some SmallSets. finalizeBundle() is very ↵Michael Ilseman1-4/+4
frequently called for some backends, and growing into an std::set is overkill for these numbers. llvm-svn: 164044
2012-09-17whitespaceMichael Ilseman1-1/+1
llvm-svn: 164043
2012-09-12Add an analyzePhysReg() function to MachineOperandIteratorBase that analyses ↵James Molloy1-2/+52
an instruction's use of a physical register, analogous to analyzeVirtReg. Rename RegInfo to VirtRegInfo so as not to be confused with the new PhysRegInfo. llvm-svn: 163694
2012-06-01Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen1-2/+2
No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). llvm-svn: 157854
2012-03-06Avoid finalizeBundles infinite looping.Evan Cheng1-0/+2
llvm-svn: 152089
2012-03-05Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce ↵Craig Topper1-1/+1
static data size. llvm-svn: 152016
2012-02-29Add an analyzeVirtReg() function.Jakob Stoklund Olesen1-0/+33
This function does more or less the same as MI::readsWritesVirtualRegister(), but it supports bundles as well. It also determines if any constraint requires reading and writing operands to use the same register. Most clients want to know. Use the more modern MO.readsReg() instead of trying to sort out undefs and partial redefines. Stop supporting the extra full <imp-def> operand as an alternative to <def,undef> sub-register defines. llvm-svn: 151690
2012-02-08Codegen pass definition cleanup. No functionality.Andrew Trick1-8/+2
Moving toward a uniform style of pass definition to allow easier target configuration. Globally declare Pass ID. Globally declare pass initializer. Use INITIALIZE_PASS consistently. Add a call to the initializer from CodeGen.cpp. Remove redundant "createPass" functions and "getPassName" methods. While cleaning up declarations, cleaned up comments (sorry for large diff). llvm-svn: 150100
2012-01-19More bundle related API additions.Evan Cheng1-1/+52
llvm-svn: 148465
2012-01-19Enhance finalizeBundle to return end of bundle iterator because it makes sense.Evan Cheng1-3/+6
llvm-svn: 148462
2012-01-19- Slight change to finalizeBundle() interface. LastMI is not exclusive (pointingEvan Cheng1-3/+18
to instruction right after the last instruction in the bundle. - Add a finalizeBundle() variant that doesn't specify LastMI. Instead, the code will find the last instruction in the bundle by following the 'InsideBundle' marker. This is useful in case bundles are formed early (i.e. during MI scheduling) but finalized later (i.e. after register allocator has finished rewriting virtual registers with physical registers). llvm-svn: 148444
2012-01-19Rename Finalizebundle to finalizeBundle to conform to coding guideline.Evan Cheng1-2/+2
llvm-svn: 148440
2011-12-14- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a functionEvan Cheng1-0/+180
to finalize MI bundles (i.e. add BUNDLE instruction and computing register def and use lists of the BUNDLE instruction) and a pass to unpack bundles. - Teach more of MachineBasic and MachineInstr methods to be bundle aware. - Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to prevent IT blocks from being broken apart. llvm-svn: 146542
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