aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/CodeGen/MachineInstrBundle.cpp
diff options
context:
space:
mode:
authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-02-29 01:40:37 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-02-29 01:40:37 +0000
commit9e821456a354807c098cdea25b649c2b02dfa1ba (patch)
treeacd215a2eda1f93517c87d6de7f5e49de1ab5443 /llvm/lib/CodeGen/MachineInstrBundle.cpp
parent340cf24be11ad2cbd7841f3716a6325c0b24bb73 (diff)
downloadllvm-9e821456a354807c098cdea25b649c2b02dfa1ba.zip
llvm-9e821456a354807c098cdea25b649c2b02dfa1ba.tar.gz
llvm-9e821456a354807c098cdea25b649c2b02dfa1ba.tar.bz2
Add an analyzeVirtReg() function.
This function does more or less the same as MI::readsWritesVirtualRegister(), but it supports bundles as well. It also determines if any constraint requires reading and writing operands to use the same register. Most clients want to know. Use the more modern MO.readsReg() instead of trying to sort out undefs and partial redefines. Stop supporting the extra full <imp-def> operand as an alternative to <def,undef> sub-register defines. llvm-svn: 151690
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstrBundle.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineInstrBundle.cpp33
1 files changed, 33 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/MachineInstrBundle.cpp b/llvm/lib/CodeGen/MachineInstrBundle.cpp
index d8b2b3a..81d2abe 100644
--- a/llvm/lib/CodeGen/MachineInstrBundle.cpp
+++ b/llvm/lib/CodeGen/MachineInstrBundle.cpp
@@ -241,3 +241,36 @@ bool llvm::finalizeBundles(MachineFunction &MF) {
return Changed;
}
+
+//===----------------------------------------------------------------------===//
+// MachineOperand iterator
+//===----------------------------------------------------------------------===//
+
+MachineOperandIteratorBase::RegInfo
+MachineOperandIteratorBase::analyzeVirtReg(unsigned Reg,
+ SmallVectorImpl<std::pair<MachineInstr*, unsigned> > *Ops) {
+ RegInfo RI = { false, false, false };
+ for(; isValid(); ++*this) {
+ MachineOperand &MO = deref();
+ if (!MO.isReg() || MO.getReg() != Reg)
+ continue;
+
+ // Remember each (MI, OpNo) that refers to Reg.
+ if (Ops)
+ Ops->push_back(std::make_pair(MO.getParent(), getOperandNo()));
+
+ // Both defs and uses can read virtual registers.
+ if (MO.readsReg()) {
+ RI.Reads = true;
+ if (MO.isDef())
+ RI.Tied = true;
+ }
+
+ // Only defs can write.
+ if (MO.isDef())
+ RI.Writes = true;
+ else if (!RI.Tied && MO.getParent()->isRegTiedToDefOperand(getOperandNo()))
+ RI.Tied = true;
+ }
+ return RI;
+}