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path: root/llvm/lib/CodeGen/MachineCSE.cpp
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2016-10-28MachineRegisterInfo: Remove unused arg from isConstantPhysReg(); NFCMatthias Braun1-1/+1
2016-09-10[CodeGen] Rename MachineInstr::isInvariantLoad to isDereferenceableInvariantL...Justin Lebar1-1/+1
2016-06-30CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith1-4/+3
2016-04-22Re-commit optimization bisect support (r267022) without new pass manager supp...Andrew Kaylor1-1/+1
2016-04-22Revert "Initial implementation of optimization bisect support."Vedant Kumar1-1/+1
2016-04-21Initial implementation of optimization bisect support.Andrew Kaylor1-1/+1
2016-04-19[SSP, 2/2] Create llvm.stackguard() intrinsic and lower it to LOAD_STACK_GUARDTim Shen1-0/+6
2016-01-06rangify; NFCISanjay Patel1-24/+14
2015-09-09[PM/AA] Rebuild LLVM's alias analysis infrastructure in a way compatibleChandler Carruth1-3/+3
2015-05-09MachineCSE: Add a target query for the LookAheadLimit heurisiticTom Stellard1-2/+3
2015-03-23Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.Benjamin Kramer1-0/+1
2015-02-04MachineCSE: Clear dead-def flag on CSE.Matthias Braun1-2/+9
2014-12-02[MachineCSE] Clear kill-flag on registers imp-def'd by the CSE'd instruction.Ahmed Bougacha1-0/+31
2014-08-11In Machine CSE pass, the source register of a COPY machine instruction canJiangning Liu1-11/+19
2014-08-05Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher1-2/+2
2014-08-04Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher1-2/+3
2014-07-29Add TargetInstrInfo interface isAsCheapAsAMove.Jiangning Liu1-1/+1
2014-04-22[Modules] Remove potential ODR violations by sinking the DEBUG_TYPEChandler Carruth1-1/+2
2014-03-31Disable each MachineFunctionPass for 'optnone' functions, unless thatPaul Robinson1-0/+3
2014-03-17Switch a number of loops in lib/CodeGen over to range-based for-loops, now thatOwen Anderson1-17/+9
2014-03-13Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changingOwen Anderson1-17/+17
2014-03-07[C++11] Add 'override' keyword to virtual methods that override their base cl...Craig Topper1-3/+3
2014-03-07Replace PROLOG_LABEL with a new CFI_INSTRUCTION.Rafael Espindola1-2/+2
2014-03-02[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer1-2/+2
2013-12-17Disabled subregister copy coalescing during MachineCSE.Andrew Trick1-5/+15
2013-12-17Allow MachineCSE to coalesce trivial subregister copies the same way that it ...Andrew Trick1-3/+8
2013-12-16Revert "Allow MachineCSE to coalesce trivial subregister copies the same way ...Rafael Espindola1-8/+3
2013-12-16Allow MachineCSE to coalesce trivial subregister copies the same wayAndrew Trick1-3/+8
2013-12-16whitespaceAndrew Trick1-1/+1
2013-07-14Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector s...Craig Topper1-4/+4
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth1-5/+5
2012-11-27CSE: allow PerformTrivialCoalescing to check copies across basic blockManman Ren1-2/+0
2012-11-26Don't use iterator after being erased.Jakub Staszak1-1/+1
2012-11-13Do not consider a machine instruction that uses and defines the sameUlrich Weigand1-16/+44
2012-10-16Remove unused BitVectors from getAllocatableSet().Jakob Stoklund Olesen1-3/+0
2012-10-15Switch most getReservedRegs() clients to the MRI equivalent.Jakob Stoklund Olesen1-4/+1
2012-08-11MachineCSE: Hoist isConstantPhysReg out of the loop, it checks for overlaps a...Benjamin Kramer1-4/+3
2012-08-11PR13578: Teach MachineCSE that instructions that use a constant register can ...Benjamin Kramer1-2/+5
2012-08-08X86: enable CSE between CMP and SUBManman Ren1-2/+18
2012-08-07MachineCSE: Update the heuristics for isProfitableToCSE.Manman Ren1-0/+23
2012-07-19Remove tabs.Bill Wendling1-1/+1
2012-07-05Remove ParentMap. You can just ask the domnode for its parent. No functionalityNick Lewycky1-11/+8
2012-06-01Switch some getAliasSet clients to MCRegAliasIterator.Jakob Stoklund Olesen1-3/+2
2012-03-04Use uint16_t to store register overlaps to reduce static data.Craig Topper1-1/+1
2012-02-28Handle regmasks in MachineCSE.Jakob Stoklund Olesen1-0/+6
2012-02-17Re-enable 150652 and 150654 - Make FPSCR non-reserved, and make MachineCSE ba...Lang Hames1-3/+9
2012-02-16Oop - r150653 + r150654 broke one of my test cases. Backing out for now...Lang Hames1-9/+3
2012-02-16MachineCSE shouldn't extend the live ranges of reserved or allocatable regist...Lang Hames1-3/+9
2012-02-08Codegen pass definition cleanup. No functionality.Andrew Trick1-2/+1
2012-02-08whitespaceAndrew Trick1-2/+2
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