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6 daysRevert "[DebugInfo][DwarfDebug] Separate creation and population of abstract ↵Vladislav Dzhidzhoev1-1/+1
subprogram DIEs" (#160349) Reverts llvm/llvm-project#159104 due to the issues reported in https://github.com/llvm/llvm-project/issues/160197.
12 days[DebugInfo][DwarfDebug] Separate creation and population of abstract ↵Vladislav Dzhidzhoev1-1/+1
subprogram DIEs (#159104) With this change, construction of abstract subprogram DIEs is split in two stages/functions: creation of DIE (in DwarfCompileUnit::getOrCreateAbstractSubprogramDIE) and its population with children (in DwarfCompileUnit::constructAbstractSubprogramScopeDIE). With that, abstract subprograms can be created/referenced from DwarfDebug::beginModule, which should solve the issue with static local variables DIE creation of inlined functons with optimized-out definitions. It fixes https://github.com/llvm/llvm-project/issues/29985. LexicalScopes class now stores mapping from DISubprograms to their corresponding llvm::Function's. It is supposed to be built before processing of each function (so, now LexicalScopes class has a method for "module initialization" alongside the method for "function initialization"). It is used by DwarfCompileUnit to determine whether a DISubprogram needs an abstract DIE before DwarfDebug::beginFunction is invoked. DwarfCompileUnit::getOrCreateSubprogramDIE method is added, which can create an abstract or a concrete DIE for a subprogram. It accepts llvm::Function* argument to determine whether a concrete DIE must be created. This is a temporary fix for https://github.com/llvm/llvm-project/issues/29985. Ideally, it will be fixed by moving global variables and types emission to DwarfDebug::endModule (https://reviews.llvm.org/D144007, https://reviews.llvm.org/D144005). Some code proposed by Ellis Hoag <ellis.sparky.hoag@gmail.com> in https://github.com/llvm/llvm-project/pull/90523 was taken for this commit.
2025-03-18[LiveDebugValues][NFC] Remove TargetPassConfig from LDVImpl (#131562)Akshat Oke1-15/+10
TPC is only used to access the option `ShouldEmitDebugEntryValues`.
2025-03-03[CodeGen] Avoid repeated hash lookups (NFC) (#129465)Kazu Hirata1-3/+2
2025-01-19[CodeGen] Remove some implict conversions of MCRegister to unsigned by ↵Craig Topper1-2/+2
using(). NFC Many of these are indexing BitVectors or something where we can't using MCRegister and need the register number.
2024-11-12[CodeGen] Remove unused includes (NFC) (#115996)Kazu Hirata1-1/+0
Identified with misc-include-cleaner.
2024-10-08[LiveDebugValues][NVPTX]VarLocBasedImpl handle vregs, enable for NVPTX (#111456)William G Hatch1-5/+20
This patch handles virtual registers in the VarLocBasedImpl of the LiveDebugVariables pass, allowing it to be used on architectures that depend on virtual registers in debugging, like NVPTX. It enables the pass for NVPTX.
2024-09-21[LiveDebugValues] Avoid repeated hash lookups (NFC) (#109509)Kazu Hirata1-5/+3
2024-09-02[CodeGen] Update a few places that were passing Register to ↵Craig Topper1-2/+2
raw_ostream::operator<< (#106877) These would implicitly cast the register to `unsigned`. Switch most of them to use printReg will give a more readable output. Change some others to use Register::id() so we can eventually remove the implicit cast to `unsigned`.
2024-08-23[llvm] Use range-based for loops (NFC) (#105861)Kazu Hirata1-1/+1
2024-05-15Fix typo "indicies" (#92232)Jay Foad1-1/+1
2023-12-14 [AArch64] ORRWrs is copy instruction when there's no implicit def of the X ↵DianQK1-2/+2
register (#75184) Follows https://github.com/llvm/llvm-project/pull/74682#issuecomment-1850268782. Fixes #74680.
2023-10-02Revert "CodeGen: Disable isCopyInstrImpl if there are implicit operands"Matt Arsenault1-2/+2
This reverts commit bc7d88faf1a595ab59952a2054418cdd0d9eeee8. This is broken with 414ff812d6241b728754ce562081419e7fc091eb reverted.
2023-10-02CodeGen: Disable isCopyInstrImpl if there are implicit operandsMatt Arsenault1-2/+2
This is a conservative workaround for broken liveness tracking of SUBREG_TO_REG to speculatively fix all targets. The current reported failures are on X86 only, but this issue should appear for all targets that use SUBREG_TO_REG. The next minimally correct refinement would be to disallow only implicit defs. The coalescer now introduces implicit-defs of the super register to track the dependency on other subregisters. If we see such an implicit operand, we cannot simply treat the subregister def as the result operand in case downstream users depend on the implicitly defined parts. Really target implementations should be considering the implicit defs and trying to interpret them appropriately (maybe with some generic helpers). The full implicit def could possibly be reported as the move result, rather than the subregister def but that requires additional work. Hopefully fixes #64060 as well. This needs to be applied to the release branch. https://reviews.llvm.org/D156346
2023-06-01[CodeGen] Make use of MachineInstr::all_defs and all_uses. NFCI.Jay Foad1-2/+2
Differential Revision: https://reviews.llvm.org/D151424
2023-05-28use ref to avoid copy in range for-loopWang, Xin101-1/+1
Use big obj copy in range for-loop will call copy constructor every time, which can be avoided by use ref instead. Reviewed By: skan Differential Revision: https://reviews.llvm.org/D150024
2023-05-05[Coverity] Big parameter passed by value.Luo, Yuanke1-1/+1
2023-03-14[CodeGen] Use *{Set,Map}::contains (NFC)Kazu Hirata1-1/+1
2023-01-31[LiveDebugValues] Allow EntryValue with OP_deref expressionsFelipe de Azevedo Piovezan1-1/+3
With D68945, more DBG_VALUEs were created without the indirect operand, instead relying on OP_deref to accomplish the same effect. At the time, however, we were not able to handle arbitrary expressions in combination with OP_LLVM_entry_value, so D71416 prevented the use of such operation in the presence of expressions. As per the comment in DIExpression::isValid, "we support only entry values of a simple register location." As such, a simple deref operation should be supported. In fact, D80345 added support for indirect DBG_VALUEs. Taken the patches above into consideration, this commit relaxes the restrictions on which expressions are allowed for entry value candidates: the expression must be either empty or a single dereference operator. This patch is useful for D141381, which adds support for storing the address of ABI-indirect parameters on the stack. Depends on D142160 Differential Revision: https://reviews.llvm.org/D142654
2023-01-13[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFCCraig Topper1-4/+2
Use isPhysical/isVirtual methods. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D141715
2023-01-10[WebAssembly][LiveDebugValues] Handle target index defsHeejin Ahn1-11/+73
This adds the missing handling for defs for target index operands, as is already done for registers. There are two kinds of target indices: local indices and stack operands. - Locals are something similar to registers in Wasm-land. For local indices, we can check for local-defining instructions (`local.set` or `local.tee`). - Wasm is a stack machine, so we have values in certain Wasm value stack location, which change when Wasm instructions produce or consume values. So basically any value-producing instrucion, i.e., instruction with defs, can change values in the Wasm stack. But I think we don't need to worry about this here, because `WebAssemblyDebugFixup`, which runs right before this analysis, makes sure to insert terminating `DBG_VALUE $noreg` instructions whenever a stack value gets popped. After `WebAssemblyDebugFixup`, there shouldn't be any `DBG_VALUE`s for stack operands that don't have a terminating `DBG_VALUE $noreg` within the same BB. So this CL only works on `DBG_VALUE`s for locals. When we encounter a `local.set` or `local.tee` instructions, we delete `DBG_VALUE`s for those target index locations from the open range set, so they will not be availble in `OutLocs`. For example, ``` bb.0: successors: %bb.1 DBG_VALUE target-index(wasm-local) + 2, $noreg, "var", ... ... local.set 2 ... bb.1: ; predecessors: %bb.0 ; We shouldn't add `DBG_VALUE target (wasm-local) + 2 here because ; it was killed by 'local.set' in bb.0 ``` After disabling register coalescing at -O1, the average PC ranges covered for Emscripten core benchmarks is currently 20.6% in the LLVM tot. After applying D138943 and this CL, the coverage goes up to 57%. This also enables LiveDebugValues analysis in the Wasm pipeline by default. Reviewed By: dschuff, jmorse Differential Revision: https://reviews.llvm.org/D140373
2023-01-10[WebAssembly] Use LiveDebugValues analysisHeejin Ahn1-12/+59
This enables `LiveDebugValues` analysis for Wasm. `DBG_VALUE`s expire at the end of a BB, and this is the analysis extends their lifetime when possible, greatly increasing the coverage of variable debug info. Specifically, this removes the current constraint that this analysis is only used with physical registers, which was first introduced in D18421, because Wasm uses only virtual registers. I don't think there's anything inherent in this analysis that only applies to physical registers; it was just because all targets using this analysis ran this at the end of their compiliation pipeline, at which point all their vregs had been allocated, and Wasm's debug info infrastructure was not really set up yet, so it was not using it. This adds supports to Wasm-specific target-index operands, defined in https://github.com/llvm/llvm-project/blob/2166d9529a60d1cdedb733d2e4134c971f0969ec/llvm/lib/Target/WebAssembly/WebAssembly.h#L87-L100. Among these, `TI_LOCAL`, `TI_LOCAL_INDIRECT`, and `TI_OPERAND_STACK` are used by Wasm `DBG_VALUE` instructions. This does not yet handle mutable target indices, i.e., this does not terminate a `DBG_VALUE` for a local index when we encounter a new `local.set` or `local.tee`. It will be implemented as a follow-up. Reviewed By: dschuff, jmorse Differential Revision: https://reviews.llvm.org/D138943
2022-12-21[LiveDebugValues] Remove LexicalScope param from VarLoc (NFC)Heejin Ahn1-12/+10
It doesn't seem to be used anymore. Reviewed By: dschuff Differential Revision: https://reviews.llvm.org/D140258
2022-12-13[CodeGen] llvm::Optional => std::optionalFangrui Song1-9/+9
2022-12-04DebugInfoMetadata: convert Optional to std::optionalKrzysztof Parzyszek1-1/+2
2022-12-02[CodeGen] Use std::nullopt instead of None (NFC)Kazu Hirata1-3/+3
This patch mechanically replaces None with std::nullopt where the compiler would warn if None were deprecated. The intent is to reduce the amount of manual work required in migrating from Optional to std::optional. This is part of an effort to migrate from llvm::Optional to std::optional: https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
2022-11-08Reland "[llvm][NFC] Use c++17 style variable type traits"Nathan James1-2/+1
This reverts commit 632a389f96355cbe7ed8fa7b8d2ed6267c92457c. This relands commit 1834a310d060d55748ca38d4ae0482864c2047d8. Differential Revision: https://reviews.llvm.org/D137493
2022-11-08Revert "[llvm][NFC] Use c++17 style variable type traits"Nathan James1-1/+2
This reverts commit 1834a310d060d55748ca38d4ae0482864c2047d8.
2022-11-08[llvm][NFC] Use c++17 style variable type traitsNathan James1-2/+1
This was done as a test for D137302 and it makes sense to push these changes Reviewed By: dblaikie Differential Revision: https://reviews.llvm.org/D137493
2022-07-17[CodeGen] Qualify auto variables in for loops (NFC)Kazu Hirata1-3/+3
2022-03-20[CodeGen] Apply clang-tidy fixes for readability-redundant-smartptr-get (NFC)Kazu Hirata1-4/+4
2022-03-16Cleanup codegen includesserge-sans-paille1-9/+1
This is a (fixed) recommit of https://reviews.llvm.org/D121169 after: 1061034926 before: 1063332844 Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup Differential Revision: https://reviews.llvm.org/D121681
2022-03-10Revert "Cleanup codegen includes"Nico Weber1-1/+9
This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20. Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang, and many LLVM tests, see comments on https://reviews.llvm.org/D121169
2022-03-10Cleanup codegen includesserge-sans-paille1-9/+1
after: 1061034926 before: 1063332844 Differential Revision: https://reviews.llvm.org/D121169
2022-02-06[CodeGen] Use = default (NFC)Kazu Hirata1-2/+2
Identified with modernize-use-equals-default
2022-01-30[CodeGen] Use default member initialization (NFC)Kazu Hirata1-3/+2
Identified with modernize-use-default-member-init.
2021-12-03[CodeGen] Use range-based for loops (NFC)Kazu Hirata1-8/+8
2021-10-24[llvm] Call *(Set|Map)::erase directly (NFC)Kazu Hirata1-4/+2
We can erase an item in a set or map without checking its membership first.
2021-10-13[DebugInfo][InstrRef] Use PHI placement utilities for machine locationsJeremy Morse1-4/+7
InstrRefBasedLDV used to try and determine which values are in which registers using a lattice approach; however this is hard to understand, and broken in various ways. This patch replaces that approach with a standard SSA approach using existing LLVM utilities. PHIs are placed at dominance frontiers; value propagation then eliminates un-necessary PHIs. This patch also adds a bunch of unit tests that should cover many of the weirder forms of control flow. Differential Revision: https://reviews.llvm.org/D110173
2021-10-07[MachineInstr] Move MIParser's DBG_VALUE RegState::Debug invariant into ↵Jack Andersen1-2/+0
MachineInstr::addOperand Based on the reasoning of D53903, register operands of DBG_VALUE are invariably treated as RegState::Debug operands. This change enforces this invariant as part of MachineInstr::addOperand so that all passes emit this flag consistently. RegState::Debug is inconsistently set on DBG_VALUE registers throughout LLVM. This runs the risk of a filtering iterator like MachineRegisterInfo::reg_nodbg_iterator to process these operands erroneously when not parsed from MIR sources. This issue was observed in the development of the llvm-mos fork which adds a backend that relies on physical register operands much more than existing targets. Physical RegUnit 0 has the same numeric encoding as $noreg (indicating an undef for DBG_VALUE). Allowing debug operands into the machine scheduler correlates $noreg with RegUnit 0 (i.e. a collision of register numbers with different zero semantics). Eventually, this causes an assert where DBG_VALUE instructions are prohibited from participating in live register ranges. Reviewed By: MatzeB, StephenTozer Differential Revision: https://reviews.llvm.org/D110105
2021-10-01Fix ambiguous overload build failureMarcelo Juchem1-1/+1
LLVM (llvmorg-14-init) under Debian sid using latest gcc (Debian 10.3.0-9) 10.3.0 fails due to ambiguous overload on operators == and !=: /root/src/llvm/src/llvm/tools/obj2yaml/elf2yaml.cpp:212:22: error: ambiguous overload for 'operator!=' (operand types are 'llvm::ELFYAML::ELF_SHF' and 'int') /root/src/llvm/src/llvm/tools/obj2yaml/elf2yaml.cpp:204:32: error: ambiguous overload for 'operator!=' (operand types are 'const llvm::yaml::Hex64' and 'int') /root/src/llvm/src/llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp:629:35: error: ambiguous overload for 'operator==' (operand types are 'const uint64_t' {aka 'const long unsigned int'} and 'llvm::Register') Reviewed by: StephenTozer, jmorse, Higuoxing Differential Revision: https://reviews.llvm.org/D109534
2021-09-17[CodeGen] LiveDebug - Use const-ref iterator in for-range loop. NFCI.Simon Pilgrim1-1/+1
Avoid unnecessary copies, reported by MSVC static analyzer.
2021-09-08[LiveDebugValues] Handle spills of indirect debug values correctlyEvgeny Leviant1-3/+4
When handling register spill for indirect debug value LiveDebugValues pass doesn't add DW_OP_deref operator which may in some cases cause debugger to return value address, instead of value while machine register holding that address is spilled. Differential revision: https://reviews.llvm.org/D109142
2021-08-30[LiveDebugValues] Cleanup Transfers when removing Entry ValueDjordje Todorovic1-61/+151
If we encounter a new debug value, describing the same parameter, we should stop tracking the parameter's Entry Value. At that point, in some cases, the Transfer which uses the parameter's Entry Value, is already emitted. Thanks to the RemoveRedundantDebugValues pass, many problems with incorrect instruction order and number of DBG_VALUEs are fixed. However, we still cannot rely on the rule that each new debug value is set by the previous non-debug instruction in Machine Basic Block. When new parameter debug value triggers removal of Backup Entry Value for the same parameter, do the cleanup of Transfers emitted from Backup Entry Values. Get the Transfer Instruction which created the new debug value and search for debug values already emitted from the to-be-deleted Backup Entry Value and attached to the Transfer Instruction. If found, delete the Transfer and remove "primary" Entry Value Var Loc from OpenRanges. This patch fixes PR47628. Patch by Nikola Tesic. Differential revision: https://reviews.llvm.org/D106856
2021-08-17[DebugInfo][InstrRef] Honour too-much-debug-info cutoutsJeremy Morse1-15/+6
This reapplies 54a61c94f93, its follow up in 547b712500e, which were reverted 95fe61e63954. Original commit message: VarLoc based LiveDebugValues will abandon variable location propagation if there are too many blocks and variable assignments in the function. If it didn't, and we had (say) 1000 blocks and 1000 variables in scope, we'd end up with 1 million DBG_VALUEs just at the start of blocks. Instruction-referencing LiveDebugValues should honour this limitation too (because the same limitation applies to it). Hoist the relevant command line options into LiveDebugValues.cpp and pass it down into the implementation classes as an argument to ExtendRanges. I've duplicated all the run-lines in live-debug-values-cutoffs.mir to have an instruction-referencing flavour. Differential Revision: https://reviews.llvm.org/D107823
2021-08-16Revert 54a61c94f93 and its follow up in 547b712500eJeremy Morse1-6/+15
These were part of D107823, however asan has found something excitingly wrong happening: https://lab.llvm.org/buildbot/#/builders/5/builds/10543/steps/13/logs/stdio
2021-08-16[DebugInfo][InstrRef] Honour too-much-debug-info cutoutsJeremy Morse1-15/+6
VarLoc based LiveDebugValues will abandon variable location propagation if there are too many blocks and variable assignments in the function. If it didn't, and we had (say) 1000 blocks and 1000 variables in scope, we'd end up with 1 million DBG_VALUEs just at the start of blocks. Instruction-referencing LiveDebugValues should honour this limitation too (because the same limitation applies to it). Hoist the relevant command line options into LiveDebugValues.cpp and pass it down into the implementation classes as an argument to ExtendRanges. I've duplicated all the run-lines in live-debug-values-cutoffs.mir to have an instruction-referencing flavour. Differential Revision: https://reviews.llvm.org/D107823
2021-03-09[DebugInfo] Process DBG_VALUE_LIST in LiveDebugValuesgbtozers1-332/+565
This patch implements DBG_VALUE_LIST handling to the LiveDebugValues pass. This is a substantial change, and makes a few fundamental changes to the existing logic. We still use the basic model of a VarLocMap that is indexed by a LocIndex, with a VarLocSet (a CoalescingBitVector underneath) giving us efficient lookups of existing variable locations for a given location type. The main change is that the VarLocMap may contain a given VarLoc multiple times (once for each unique location operand), so that a VarLoc can be looked up from any of the registers that it uses. This means that each VarLoc has multiple corresponding LocIndexes; to allow us to iterate through the set of VarLocs (previously we would iterate through the VarLocSet), we now also maintain a single entry in the VarLocMap that contains every VarLoc exactly once. The VarLoc class itself is also changed; this change is much simpler, refactoring out location-specific members into a MachineLocation class and adding a vector of these locations. Differential Revision: https://reviews.llvm.org/D83890
2021-02-13[CodeGen] Use range-based for loops (NFC)Kazu Hirata1-3/+3
2021-01-27[llvm] Use append_range (NFC)Kazu Hirata1-2/+1