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2025-06-25[IfConversion] Fix bug related to !HasFallThrough (#145471)Björn Pettersson1-7/+28
We can not trust that !HasFallThrough implies that there is not fallthrough exit in cases when analyzeBranch failed. Adding a new blockNeverFallThrough helper to make the tests on !HasFallThrough safe by also checking IsBrAnalyzable. We also try to prove no-fallthrough by inspecting the successor list. If the textual successor isn't in the successor list we know that there is no fallthrough. The bug has probably been around for years. Found it when working on an out-of-tree target.
2025-05-22[LLVM][CodeGen] Add convenience accessors for MachineFunctionProperties ↵users/pcc/spr/main.elf-add-branch-to-branch-optimizationRahul Joshi1-2/+1
(#140002) Add per-property has<Prop>/set<Prop>/reset<Prop> functions to MachineFunctionProperties.
2025-03-23[CodeGen] Use *Set::insert_range (NFC) (#132651)Kazu Hirata1-6/+3
We can use *Set::insert_range to collapse: for (auto Elem : Range) Set.insert(E); down to: Set.insert_range(Range);
2025-03-02[IfConversion] Use MCRegister. NFCCraig Topper1-11/+9
2025-01-13[aarch64][win] Update Called Globals info when updating Call Site info (#122762)Daniel Paoliello1-9/+9
Fixes the "use after poison" issue introduced by #121516 (see <https://github.com/llvm/llvm-project/pull/121516#issuecomment-2585912395>). The root cause of this issue is that #121516 introduced "Called Global" information for call instructions modeling how "Call Site" info is stored in the machine function, HOWEVER it didn't copy the copy/move/erase operations for call site information. The fix is to rename and update the existing copy/move/erase functions so they also take care of Called Global info.
2024-11-12[CodeGen] Remove unused includes (NFC) (#115996)Kazu Hirata1-1/+0
Identified with misc-include-cleaner.
2024-07-26[CodeGen] Remove AA parameter of isSafeToMove (#100691)Pengcheng Wang1-1/+1
This `AA` parameter is not used and for most uses they just pass a nullptr. The use of `AA` was removed since 8d0383e.
2024-07-12[CodeGen][NewPM] Port `machine-block-freq` to new pass manager (#98317)paperchalice1-2/+3
- Add `MachineBlockFrequencyAnalysis`. - Add `MachineBlockFrequencyPrinterPass`. - Use `MachineBlockFrequencyInfoWrapperPass` in legacy pass manager. - `LazyMachineBlockFrequencyInfo::print` is empty, drop it due to new pass manager migration.
2024-06-28Reapply "[CodeGen][NewPM] Port machine-branch-prob to new pass manager" ↵paperchalice1-3/+3
(#96858) (#96869) This reverts commit ab58b6d58edf6a7c8881044fc716ca435d7a0156. In `CodeGen/Generic/MachineBranchProb.ll`, `llc` crashed with dumped MIR when targeting PowerPC. Move test to `llc/new-pm`, which is X86 specific.
2024-06-27Revert "[CodeGen][NewPM] Port machine-branch-prob to new pass manager" (#96858)paperchalice1-3/+3
Reverts llvm/llvm-project#96389 Some ppc bots failed.
2024-06-27[CodeGen][NewPM] Port machine-branch-prob to new pass manager (#96389)paperchalice1-3/+3
Like IR version `print<branch-prob>`, there is also a `print<machine-branch-prob>`.
2023-08-07[X86][NFC]Remove dead code in IfConversion.cppXinWang101-7/+6
In line 544, if we go in to isFalse, then the Kind could be ICTriangleFalse and isRev must be False, so we never go into the true branch in line 545, better to remove it. Reviewed By: skan, pengfei Differential Revision: https://reviews.llvm.org/D157260
2023-04-23Clean come dead codeWang, Xin101-3/+0
These codes deleted are dead code, we never go into it. 1. In AggressiveAntiDepBreaker.cpp, have assert AntiDepReg != 0. 2. IfConversion.cpp, Kind can only be one unique value, so isFalse && isRev can never be true. 3. DAGCombiner.cpp, at line 3675, we have considered the condition like ``` // fold (sub x, c) -> (add x, -c) if (N1C) { return DAG.getNode(ISD::ADD, DL, VT, N0, DAG.getConstant(-N1C->getAPIntValue(), DL, VT)); } ``` 4. ScheduleDAGSDNodes.cpp, we have Latency > 1 at line 663 5. MasmParser.cpp, code exists in a switch-case block which decided by the value FirstTokenKind, at line 1621, FirstTokenKind could only be one of AsmToken::Dollar, AsmToken::At and AsmToken::Identifier. Reviewed By: skan Differential Revision: https://reviews.llvm.org/D148610
2023-04-20Fix uninitialized class membersAkshay Khadse1-2/+2
Reviewed By: LuoYuanke Differential Revision: https://reviews.llvm.org/D148692
2023-04-18[MC] Simplify uses of subregs/superregs. NFC.Jay Foad1-12/+2
2023-04-18[MC] Use subregs/superregs instead of MCSubRegIterator/MCSuperRegIterator. NFC.Jay Foad1-8/+6
Differential Revision: https://reviews.llvm.org/D148613
2023-04-17Fix uninitialized pointer members in CodeGenAkshay Khadse1-5/+5
This change initializes the members TSI, LI, DT, PSI, and ORE pointer feilds of the SelectOptimize class to nullptr. Reviewed By: LuoYuanke Differential Revision: https://reviews.llvm.org/D148303
2023-02-07[llvm][IfConversion] update successor list when merging INLINEASM_BRNick Desaulniers1-0/+9
If this successor list is not correct, then branch-folding may incorrectly think that the indirect target is dead and remove it. This results in a dangling reference to the removed block as an operand to the INLINEASM_BR, which later will get AsmPrinted into code that doesn't assemble. This was made more obvious by, but is not a regression of https://reviews.llvm.org/D130316. Fixes: https://github.com/llvm/llvm-project/issues/60346 Reviewed By: efriedma, void Differential Revision: https://reviews.llvm.org/D142924
2022-03-16Cleanup codegen includesserge-sans-paille1-3/+1
This is a (fixed) recommit of https://reviews.llvm.org/D121169 after: 1061034926 before: 1063332844 Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup Differential Revision: https://reviews.llvm.org/D121681
2022-03-10Revert "Cleanup codegen includes"Nico Weber1-1/+3
This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20. Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang, and many LLVM tests, see comments on https://reviews.llvm.org/D121169
2022-03-10Cleanup codegen includesserge-sans-paille1-3/+1
after: 1061034926 before: 1063332844 Differential Revision: https://reviews.llvm.org/D121169
2022-01-30[CodeGen] Use default member initialization (NFC)Kazu Hirata1-2/+2
Identified with modernize-use-default-member-init.
2021-07-11[IfCvt] Don't use pristine register for counting liveins for predicated ↵David Green1-6/+6
instructions. The test case here hits machine verifier problems. There are volatile long loads that the results of do not get used, loading into two dead registers. IfCvt will predicate them and as it does will add implicit uses of the predicating registers due to thinking they are live in. As nothing has used the register, the machine verifier disagrees that they are really live and we end up with a failure. The registers come from Pristine regs that LivePhysRegs counts as live. This patch adds a addLiveInsNoPristines method to be used instead in IfCvt, so that only really live in regs need to be added as implicit operands. Differential Revision: https://reviews.llvm.org/D90965
2021-05-15IfConverter::MeetIfcvtSizeLimit - Fix uninitialized variable warnings. NFCI.Simon Pilgrim1-1/+1
Ensure the duplication instruction counts are initialized to zero (even though they aren't used) to silence static analysis warnings.
2021-04-19[CSSPGO] Flip SkipPseudoOp to true for MIR APIs.Hongtao Yu1-8/+8
Flipping the default value of SkipPseudoOp to true for those MIR APIs to favor maximum performance. Note that certain spots like branch folding and MIR if-conversion is are disabled for better counts quality. For these two optimizations, this is a no-diff change. The counts quality with SPEC2017 before/after this change is unchanged. Reviewed By: wmi Differential Revision: https://reviews.llvm.org/D100332
2020-12-31[CodeGen] Construct SmallVector with iterator ranges (NFC)Kazu Hirata1-2/+1
2020-10-21Add "SkipDead" parameter to TargetInstrInfo::DefinesPredicateNicholas Guy1-2/+2
Some instructions may be removable through processes such as IfConversion, however DefinesPredicate can not be made aware of when this should be considered. This parameter allows DefinesPredicate to distinguish these removable instructions on a per-call basis, allowing for more fine-grained control from processes like ifConversion. Renames DefinesPredicate to ClobbersPredicate, to better reflect it's purpose Differential Revision: https://reviews.llvm.org/D88494
2020-07-01[NFC] Clean up uses of MachineModuleInfoWrapperPassYuanfang Chen1-8/+2
2020-05-07Correctly modify the CFG in IfConverter, and then remove theJames Y Knight1-5/+7
CorrectExtraCFGEdges function. The latter was a workaround for "Various pieces of code" leaving bogus extra CFG edges in place. Where by "various" it meant only IfConverter::MergeBlocks, which failed to clear all of the successors of dead blocks it emptied out. This wouldn't matter a whole lot, except that the dead blocks remained listed as predecessors of still-useful blocks, inhibiting optimizations. This fix slightly changed two thumb tests, because the correct CFG successors allowed for the "diamond" if-conversion pattern to be detected, when it could only use "simple" before. Additionally, the removal of a now-redundant call to analyzeBranch (with AllowModify=true) in BranchFolder::OptimizeFunction caused a later check for an empty block in BranchFolder::OptimizeBlock to fail. Correct this by moving the call to analyzeBranch in OptimizeBlock higher. Differential Revision: https://reviews.llvm.org/D79527
2020-04-20BranchFolding.h - cleanup includes and forward declarations. NFC.Simon Pilgrim1-0/+1
Push MBFIWrapper.h include down to BranchFolding.cpp/IfConversion.cpp
2020-04-08[IfConversion] Disallow TrueBB == FalseBB for valid diamondsMikael Holmen1-0/+5
Summary: This fixes PR45302. Previously the case BB1 / \ | | TBB FBB | | \ / BB2 was treated as a valid diamond also when TBB and FBB was the same basic block. This then lead to a failed assertion in IfConvertDiamond. Since TBB == FBB is quite a degenerated case of a diamond, we now don't treat it as a valid diamond anymore, and thus we will avoid the trouble of making IfConvertDiamond handle it correctly. Reviewers: efriedma, kparzysz Reviewed By: efriedma Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D77651
2020-02-27[CallSiteInfo] Handle bundles when updating call site infoDjordje Todorovic1-2/+2
This will address the issue: P8198 and P8199 (from D73534). The methods was not handle bundles properly. Differential Revision: https://reviews.llvm.org/D74904
2020-02-10[CSInfo] Use isCandidateForCallSiteEntry() when updating the CSInfoDjordje Todorovic1-4/+4
Use the isCandidateForCallSiteEntry(). This should mostly be an NFC, but there are some parts ensuring the moveCallSiteInfo() and copyCallSiteInfo() operate with call site entry candidates (both Src and Dest should be the call site entry candidates). Differential Revision: https://reviews.llvm.org/D74122
2020-01-28[MBFI] Move BranchFolding::MBFIWrapper to its own files. NFC.Hiroshi Yamauchi1-1/+1
Summary: To avoid header file circular dependency issues in passing updated MBFI (in MBFIWrapper) to the interface of profile guided size optimizations. A prep step for (and split off of) D73381. Reviewers: davidxl Subscribers: mgorny, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73494
2019-12-09[PGO][PGSO] Instrument the code gen / target passes.Hiroshi Yamauchi1-2/+7
Summary: Split off of D67120. Add the profile guided size optimization instrumentation / queries in the code gen or target passes. This doesn't enable the size optimizations in those passes yet as they are currently disabled in shouldOptimizeForSize (for non-IR pass queries). A second try after reverted D71072. Reviewers: davidxl Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D71149
2019-12-06Revert "[PGO][PGSO] Instrument the code gen / target passes."Hiroshi Yamauchi1-7/+2
This reverts commit 9a0b5e14075a1f42a72eedb66fd4fde7985d37ac. This seems to break buildbots.
2019-12-06[PGO][PGSO] Instrument the code gen / target passes.Hiroshi Yamauchi1-2/+7
Summary: Split off of D67120. Add the profile guided size optimization instrumentation / queries in the code gen or target passes. This doesn't enable the size optimizations in those passes yet as they are currently disabled in shouldOptimizeForSize (for non-IR pass queries). Reviewers: davidxl Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D71072
2019-11-13Sink all InitializePasses.h includesReid Kleckner1-0/+2
This file lists every pass in LLVM, and is included by Pass.h, which is very popular. Every time we add, remove, or rename a pass in LLVM, it caused lots of recompilation. I found this fact by looking at this table, which is sorted by the number of times a file was changed over the last 100,000 git commits multiplied by the number of object files that depend on it in the current checkout: recompiles touches affected_files header 342380 95 3604 llvm/include/llvm/ADT/STLExtras.h 314730 234 1345 llvm/include/llvm/InitializePasses.h 307036 118 2602 llvm/include/llvm/ADT/APInt.h 213049 59 3611 llvm/include/llvm/Support/MathExtras.h 170422 47 3626 llvm/include/llvm/Support/Compiler.h 162225 45 3605 llvm/include/llvm/ADT/Optional.h 158319 63 2513 llvm/include/llvm/ADT/Triple.h 140322 39 3598 llvm/include/llvm/ADT/StringRef.h 137647 59 2333 llvm/include/llvm/Support/Error.h 131619 73 1803 llvm/include/llvm/Support/FileSystem.h Before this change, touching InitializePasses.h would cause 1345 files to recompile. After this change, touching it only causes 550 compiles in an incremental rebuild. Reviewers: bkramer, asbirlea, bollu, jdoerfert Differential Revision: https://reviews.llvm.org/D70211
2019-10-10[IfCvt][ARM] Optimise diamond if-conversion for code sizeOliver Stannard1-17/+116
Currently, the heuristics the if-conversion pass uses for diamond if-conversion are based on execution time, with no consideration for code size. This adds a new set of heuristics to be used when optimising for code size. This is mostly target-independent, because the if-conversion pass can see the code size of the instructions which it is removing. For thumb, there are a few passes (insertion of IT instructions, selection of narrow branches, and selection of CBZ instructions) which are run after if conversion and affect these heuristics, so I've added target hooks to better predict the code-size effect of a proposed if-conversion. Differential revision: https://reviews.llvm.org/D67350 llvm-svn: 374301
2019-10-08[DebugInfo][If-Converter] Update call site info during the optimizationNikola Prica1-0/+16
During the If-Converter optimization pay attention when copying or deleting call instructions in order to keep call site information in valid state. Reviewers: aprantl, vsk, efriedma Reviewed By: vsk, efriedma Differential Revision: https://reviews.llvm.org/D66955 llvm-svn: 374068
2019-09-30[NewPM] Port MachineModuleInfo to the new pass manager.Yuanfang Chen1-4/+8
Existing clients are converted to use MachineModuleInfoWrapperPass. The new interface is for defining a new pass manager API in CodeGen. Reviewers: fedor.sergeev, philip.pfaffe, chandlerc, arsenm Reviewed By: arsenm, fedor.sergeev Differential Revision: https://reviews.llvm.org/D64183 llvm-svn: 373240
2019-09-26 [IfConversion] Disallow TBB == FBB for valid trianglesMikael Holmen1-0/+3
Summary: Previously the case EBB | \_ | | | TBB | / FBB was treated as a valid triangle also when TBB and FBB was the same basic block. This could then lead to an invalid CFG when we removed the edge from EBB to TBB, since that meant we would also remove the edge from EBB to FBB. Since TBB == FBB is quite a degenerated case of a triangle, we now don't treat it as a valid triangle anymore, and thus we will avoid the trouble with updating the CFG. Reviewers: efriedma, dmgreen, kparzysz Reviewed By: efriedma Subscribers: bjope, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67832 llvm-svn: 372943
2019-09-09[IfConversion] Correctly handle cases where analyzeBranch fails.Eli Friedman1-0/+6
If analyzeBranch fails, on some targets, the out parameters point to some blocks in the function. But we can't use that information, so make sure to clear it out. (In some places in IfConversion, we assume that any block with a TrueBB is analyzable.) The change to the testcase makes it trigger a bug on builds without this fix: IfConvertDiamond tries to perform a followup "merge" operation, which isn't legal, and we somehow end up with a branch to a deleted MBB. I'm not sure how this doesn't crash the compiler. Differential Revision: https://reviews.llvm.org/D67306 llvm-svn: 371434
2019-09-05[IfConversion] Fix diamond conversion with unanalyzable branches.Eli Friedman1-2/+8
The code was incorrectly counting the number of identical instructions, and therefore tried to predicate an instruction which should not have been predicated. This could have various effects: a compiler crash, an assembler failure, a miscompile, or just generating an extra, unnecessary instruction. Instead of depending on TargetInstrInfo::removeBranch, which only works on analyzable branches, just remove all branch instructions. Fixes https://bugs.llvm.org/show_bug.cgi?id=43121 and https://bugs.llvm.org/show_bug.cgi?id=41121 . Differential Revision: https://reviews.llvm.org/D67203 llvm-svn: 371111
2019-08-15Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders1-2/+2
Summary: This clang-tidy check is looking for unsigned integer variables whose initializer starts with an implicit cast from llvm::Register and changes the type of the variable to llvm::Register (dropping the llvm:: where possible). Partial reverts in: X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister X86FixupLEAs.cpp - Some functions return unsigned and arguably should be MCRegister X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister HexagonBitSimplify.cpp - Function takes BitTracker::RegisterRef which appears to be unsigned& MachineVerifier.cpp - Ambiguous operator==() given MCRegister and const Register PPCFastISel.cpp - No Register::operator-=() PeepholeOptimizer.cpp - TargetInstrInfo::optimizeLoadInstr() takes an unsigned& MachineTraceMetrics.cpp - MachineTraceMetrics lacks a suitable constructor Manual fixups in: ARMFastISel.cpp - ARMEmitLoad() now takes a Register& instead of unsigned& HexagonSplitDouble.cpp - Ternary operator was ambiguous between unsigned/Register HexagonConstExtenders.cpp - Has a local class named Register, used llvm::Register instead of Register. PPCFastISel.cpp - PPCEmitLoad() now takes a Register& instead of unsigned& Depends on D65919 Reviewers: arsenm, bogner, craig.topper, RKSimon Reviewed By: arsenm Subscribers: RKSimon, craig.topper, lenary, aemerson, wuzish, jholewinski, MatzeB, qcolombet, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, wdng, nhaehnle, sbc100, jgravelle-google, kristof.beyls, hiraditya, aheejin, kbarton, fedor.sergeev, javed.absar, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, tpr, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, Jim, s.egerton, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65962 llvm-svn: 369041
2019-08-15[llvm] Migrate llvm::make_unique to std::make_uniqueJonas Devlieghere1-8/+8
Now that we've moved to C++14, we no longer need the llvm::make_unique implementation from STLExtras.h. This patch is a mechanical replacement of (hopefully) all the llvm::make_unique instances across the monorepo. llvm-svn: 369013
2019-04-23Use llvm::stable_sortFangrui Song1-1/+1
While touching the code, simplify if feasible. llvm-svn: 358996
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
2019-01-09[NFC] fix trivial typos in commentsHiroshi Inoue1-2/+2
llvm-svn: 350690
2018-11-06LivePhysRegs/IfConversion: Change some types from unsigned to MCPhysReg; NFCMatthias Braun1-10/+10
Change the type in a couple of lists and sets that only store physical registers from unsigned to MCPhysRegs. The later is only 16bits and saves us a bit of memory. llvm-svn: 346254