Age | Commit message (Collapse) | Author | Files | Lines | |
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10 days | [CodeGen][NewPM] Port `ReachingDefAnalysis` to new pass manager. (#159572) | Mikhail Gudim | 1 | -0/+1 | |
In this commit: (1) Added new pass manager support for `ReachingDefAnalysis`. (2) Added printer pass. (3) Make old pass manager use `ReachingDefInfoWrapperPass` | |||||
2025-07-23 | [CodeGen] Remove FinalizeMachineBundles pass (#149806) | Jay Foad | 1 | -1/+0 | |
Replace its only use in the AMDGPU R600 backend with a call to finalizeBundles. | |||||
2025-07-16 | [CodeGen][NPM] Port ProcessImplicitDefs to NPM (#148110) | Vikram Hegde | 1 | -1/+1 | |
same as https://github.com/llvm/llvm-project/pull/138829 Co-authored-by : Oke, Akshat <[Akshat.Oke@amd.com](mailto:Akshat.Oke@amd.com)> | |||||
2025-07-10 | [CodeGen][NewPM] Port "PostRAMachineSink" pass to NPM (#129690) | Vikram Hegde | 1 | -1/+1 | |
2025-07-09 | [CodeGen][NPM] Port InitUndef to NPM (#138495) | Akshat Oke | 1 | -1/+1 | |
2025-04-30 | [CodeGen][NPM] Port VirtRegRewriter to NPM (#130564) | Akshat Oke | 1 | -1/+1 | |
2025-04-30 | [CodeGen][NewPM] Port "ShrinkWrap" pass to NPM (#129880) | Vikram Hegde | 1 | -1/+1 | |
2025-04-29 | [CodeGen][NewPM] Port "PrologEpilogInserter" to NPM (#130550) | Vikram Hegde | 1 | -1/+1 | |
2025-04-18 | [CodeGen][NPM] Port UnreachableMachineBlockElim to NPM (#136127) | Akshat Oke | 1 | -1/+1 | |
2025-04-17 | [CodeGen][NPM] Port MachineBlockPlacementStats to NPM (#129853) | Akshat Oke | 1 | -1/+1 | |
2025-04-15 | [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM (#130070) | Akshat Oke | 1 | -1/+1 | |
2025-04-14 | [CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM (#130069) | Akshat Oke | 1 | -1/+1 | |
Didn't find a test for this (but there are tests for the `Function` version of this pass) | |||||
2025-04-14 | [CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM (#130068) | Akshat Oke | 1 | -1/+1 | |
2025-04-14 | [CodeGen][NPM] Port BranchRelaxation to NPM (#130067) | Akshat Oke | 1 | -1/+1 | |
This completes the PreEmitPasses. | |||||
2025-04-09 | [CodeGen][NPM] Port PostRAHazardRecognizer to NPM (#130066) | Akshat Oke | 1 | -1/+1 | |
2025-04-01 | [CodeGen][NPM] Port XRayInstrumentation to NPM (#129865) | Akshat Oke | 1 | -1/+1 | |
2025-03-28 | [CodeGen][StaticDataPartitioning]Place local-linkage global variables in hot ↵ | Mingming Liu | 1 | -0/+1 | |
or unlikely prefixed sections based on profile information (#125756) In this PR, static-data-splitter pass finds out the local-linkage global variables in {`.rodata`, `.data.rel.ro`, `bss`, `.data`} sections by analyzing machine instruction operands, and aggregates their accesses from code across functions. A follow-up item is to analyze global variable initializers and count for access from data. * This limitation is demonstrated by `bss2` and `data3` in `llvm/test/CodeGen/X86/global-variable-partition.ll`. Some stats of static-data-splitter with this patch: **section**|**bss**|**rodata**|**data** :-----:|:-----:|:-----:|:-----: hot-prefixed section coverage|99.75%|97.71%|91.30% unlikely-prefixed section size percentage|67.94%|39.37%|63.10% 1. The coverage is defined as `#perf-sample-in-hot-prefixed <data> section / #perf-sample in <data.*> section` for each <data> section. * The perf command samples `MEM_INST_RETIRED.ALL_LOADS:u:pinned:precise=2` events at a high frequency (`perf -c 2251`) for 30 seconds. The profiled binary is built as non-PIE so `data.rel.ro` coverage data is not available. 2. The unlikely-prefixed `<data>` section size percentage is defined as `unlikely <data> section size / the sum size of <data>.* sections` for each `<data>` section | |||||
2025-03-24 | [CodeGen][NPM] Port LiveDebugValues to NPM (#131563) | Akshat Oke | 1 | -1/+1 | |
2025-03-17 | [CodeGen][NPM] Port FEntryInserter to NPM (#129857) | Akshat Oke | 1 | -1/+1 | |
2025-03-14 | Rename ExpandLargeFpConvertPass to ExpandFpPass (#131128) | Frederik Harwath | 1 | -1/+1 | |
This is meant as a preparation for PR #130988 "[AMDGPU] Implement IR expansion for frem instruction" which implements the expansion of another instruction in this pass. The more general name seems more appropriate given this change and quite reasonable even without it. | |||||
2025-03-14 | [CodeGen][NPM] Port MachineBlockPlacement to NPM (#129828) | Akshat Oke | 1 | -1/+1 | |
2025-03-13 | [CodeGen][NPM] Port BranchFolder to NPM (#128858) | Akshat Oke | 1 | -1/+1 | |
EnableTailMerge is false by default and is handled by the pass builder. Passes are independent of target pipeline options. This completes the generic `MachineLateOptimization` passes for the NPM pipeline. | |||||
2025-03-12 | [CodeGen][NPM] Port PatchableFunction to NPM (#129866) | Akshat Oke | 1 | -1/+1 | |
2025-03-12 | [CodeGen][NPM] Port DetectDeadLanes to NPM (#130567) | Akshat Oke | 1 | -1/+1 | |
2025-03-04 | [CodeGen][NewPM] Port "FixupStatepointCallerSaved" pass to NPM (#129541) | Vikram Hegde | 1 | -1/+1 | |
2025-03-04 | [CodeGen][NPM] Port ExpandPostRAPseudos to NPM (#129509) | Akshat Oke | 1 | -1/+1 | |
2025-03-03 | [CodeGen][NewPM] Port "RemoveRedundantDebugValues" to NPM (#129005) | Vikram Hegde | 1 | -1/+1 | |
2025-03-03 | [CodeGen][NewPM] Port MachineSink to NPM (#115434) | Akshat Oke | 1 | -1/+1 | |
Targets can set the EnableSinkAndFold option in CGPassBuilderOptions for the NPM pipeline in buildCodeGenPipeline(... &Opts, ...) | |||||
2025-03-03 | [CodeGen][NewPM] Port MachineCycleInfo to NPM (#114745) | Akshat Oke | 1 | -1/+1 | |
2025-02-26 | [CodeGen][NewPM] Port RegAllocGreedy to NPM (#119540) | Akshat Oke | 1 | -1/+1 | |
Leaving out NPM command line support for the next patch. | |||||
2025-02-24 | [CodeGen][NPM] Port MachineLateInstrsCleanup to NPM (#128160) | Akshat Oke | 1 | -1/+1 | |
There are no standalone tests for this pass for backends implementing the NPM yet. | |||||
2025-02-12 | Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684) | Akshat Oke | 1 | -2/+2 | |
`RegisterClassInfo` was supposed to be kept alive between pass runs, which wasn't being done leading to recomputations increasing the compile time. Now the Impl class is a member of the legacy and new passes so that it is not reconstructed on every pass run. --------- Co-authored-by: Christudasan Devadasan <christudasan.devadasan@amd.com> | |||||
2025-02-08 | Revert "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126268) | Akshat Oke | 1 | -2/+2 | |
This reverts commit 5aa4979c47255770cac7b557f3e4a980d0131d69 while I investigate what's causing the compile-time regression. | |||||
2025-02-05 | [CodeGen][NewPM] Port StackSlotColoring to NPM. (#125876) | Christudasan Devadasan | 1 | -1/+1 | |
2025-02-05 | [CodeGen][NewPM] Port RenameIndependentSubregs to NPM (#125192) | Akshat Oke | 1 | -1/+1 | |
2025-02-05 | CodeGen][NewPM] Port PostRAScheduler to NPM. (#125798) | Christudasan Devadasan | 1 | -1/+1 | |
2025-02-05 | CodeGen][NewPM] Port MachineScheduler to NPM. (#125703) | Christudasan Devadasan | 1 | -2/+2 | |
2025-02-04 | [CodeGen][NewPM] Port MachineCopyPropagation to NPM (#125202) | Akshat Oke | 1 | -1/+1 | |
2025-02-03 | [CodeGen][NewPM] Port RegisterCoalescer to NPM (#124698) | Akshat Oke | 1 | -1/+1 | |
2025-01-22 | [CodeGen] Introduce Static Data Splitter pass (#122183) | Mingming Liu | 1 | -0/+1 | |
https://discourse.llvm.org/t/rfc-profile-guided-static-data-partitioning/83744 proposes to partition static data sections. This patch introduces a codegen pass. This patch produces jump table hotness in the in-memory states (machine jump table info and entries). Target-lowering and asm-printer consume the states and produce `.hot` section suffix. The follow up PR https://github.com/llvm/llvm-project/pull/122215 implements such changes. --------- Co-authored-by: Ellis Hoag <ellis.sparky.hoag@gmail.com> | |||||
2025-01-20 | [CodeGen] MachineFunctionSplitter: Add missing initializer (#123564) | Akshat Oke | 1 | -0/+1 | |
This registers the pass with PassRegistry so we can use -start-before and other options for machine-function-splitter. | |||||
2024-12-06 | [CodeGen][NewPM] Port LiveStacks analysis to NPM (#118778) | Akshat Oke | 1 | -1/+1 | |
2024-12-04 | [CodeGen][NewPM] Port LiveDebugVariables to NPM (#115468) | Akshat Oke | 1 | -1/+1 | |
The existing analysis was already a pimpl wrapper. I have extracted legacy pass logic to a LDVImpl wrapper named `LiveDebugVariables` which is the analysis::Result now. This controls whether to activate the LDV (depending on `-live-debug-variables` and DIsubprogram) itself. The legacy and new analysis only construct the LiveDebugVariables. VirtRegRewriter will test this. | |||||
2024-11-18 | [CodeGen][NewPM] Port PeepholeOptimizer to NPM (#116326) | Akshat Oke | 1 | -1/+1 | |
With this, all machine SSA optimization passes are available in the new codegen pipeline. | |||||
2024-11-15 | [CodeGen][NewPM] Port RegUsageInfoPropagation pass to NPM (#114010) | Akshat Oke | 1 | -1/+1 | |
2024-11-15 | [CodeGen][NewPM] Port RegUsageInfoCollector pass to NPM (#113874) | Akshat Oke | 1 | -1/+1 | |
2024-10-30 | [CodeGen][NewPM] Port TailDuplicate pass to NPM (#113293) | Akshat Oke | 1 | -2/+2 | |
2024-10-23 | [CodeGen][NewPM] Port OptimizePHIs to NPM (#113433) | Akshat Oke | 1 | -1/+1 | |
2024-10-22 | [NewPM][CodeGen] Port VirtRegMap to NPM (#109936) | Akshat Oke | 1 | -1/+1 | |
2024-10-16 | [CodeGen][NewPM] Port EarlyIfConversion pass to NPM. (#108508) | Christudasan Devadasan | 1 | -1/+1 | |