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-rw-r--r--llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp31
-rw-r--r--llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn1
-rw-r--r--llvm/utils/profcheck-xfail.txt12
3 files changed, 33 insertions, 11 deletions
diff --git a/llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp b/llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
index 10f0213..fd8ddb1 100644
--- a/llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
+++ b/llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
@@ -588,7 +588,12 @@ void RuntimeLibcallEmitter::emitSystemRuntimeLibrarySetCalls(
PredicateSorter.insert(
PredicateWithCC()); // No predicate or CC override first.
+ constexpr unsigned BitsPerStorageElt = 64;
DenseMap<PredicateWithCC, LibcallsWithCC> Pred2Funcs;
+
+ SmallVector<uint64_t, 32> BitsetValues(
+ divideCeil(RuntimeLibcallImplDefList.size(), BitsPerStorageElt));
+
for (const Record *Elt : *Elements) {
const RuntimeLibcallImpl *LibCallImpl = getRuntimeLibcallImpl(Elt);
if (!LibCallImpl) {
@@ -597,16 +602,24 @@ void RuntimeLibcallEmitter::emitSystemRuntimeLibrarySetCalls(
continue;
}
+ size_t BitIdx = LibCallImpl->getEnumVal();
+ uint64_t BitmaskVal = uint64_t(1) << (BitIdx % BitsPerStorageElt);
+ size_t BitsetIdx = BitIdx / BitsPerStorageElt;
+
auto It = Func2Preds.find(LibCallImpl);
if (It == Func2Preds.end()) {
+ BitsetValues[BitsetIdx] |= BitmaskVal;
Pred2Funcs[PredicateWithCC()].LibcallImpls.push_back(LibCallImpl);
continue;
}
for (const Record *Pred : It->second.first) {
const Record *CC = It->second.second;
- PredicateWithCC Key(Pred, CC);
+ AvailabilityPredicate SubsetPredicate(Pred);
+ if (SubsetPredicate.isAlwaysAvailable())
+ BitsetValues[BitsetIdx] |= BitmaskVal;
+ PredicateWithCC Key(Pred, CC);
auto &Entry = Pred2Funcs[Key];
Entry.LibcallImpls.push_back(LibCallImpl);
Entry.CallingConv = It->second.second;
@@ -614,6 +627,22 @@ void RuntimeLibcallEmitter::emitSystemRuntimeLibrarySetCalls(
}
}
+ OS << " static constexpr LibcallImplBitset SystemAvailableImpls({\n"
+ << indent(6);
+
+ ListSeparator LS;
+ unsigned EntryCount = 0;
+ for (uint64_t Bits : BitsetValues) {
+ if (EntryCount++ == 4) {
+ EntryCount = 1;
+ OS << ",\n" << indent(6);
+ } else
+ OS << LS;
+ OS << format_hex(Bits, 16);
+ }
+ OS << "\n });\n"
+ " AvailableLibcallImpls = SystemAvailableImpls;\n\n";
+
SmallVector<PredicateWithCC, 0> SortedPredicates =
PredicateSorter.takeVector();
diff --git a/llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn b/llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
index 92e596e..8d19d30 100644
--- a/llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
@@ -21,6 +21,7 @@ unittest("ADTTests") {
"BitTest.cpp",
"BitVectorTest.cpp",
"BitmaskEnumTest.cpp",
+ "BitsetTest.cpp",
"BreadthFirstIteratorTest.cpp",
"BumpPtrListTest.cpp",
"CoalescingBitVectorTest.cpp",
diff --git a/llvm/utils/profcheck-xfail.txt b/llvm/utils/profcheck-xfail.txt
index 8c41466..39ff476 100644
--- a/llvm/utils/profcheck-xfail.txt
+++ b/llvm/utils/profcheck-xfail.txt
@@ -10,7 +10,7 @@ CodeGen/AArch64/llvm-masked-gather-legal-for-sve.ll
CodeGen/AArch64/llvm-masked-scatter-legal-for-sve.ll
CodeGen/AArch64/selectopt-cast.ll
CodeGen/AArch64/selectopt.ll
-CodeGen/AMDGPU/amdgpu-attributor-no-agpr.ll
+CodeGen/AMDGPU/amdgpu-attributor-min-agpr-alloc.ll
CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.ll
CodeGen/AMDGPU/amdgpu-codegenprepare-sqrt.ll
CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-indirect-access-asan.ll
@@ -75,6 +75,7 @@ CodeGen/NVPTX/lower-ctor-dtor.ll
CodeGen/RISCV/zmmul.ll
CodeGen/SPIRV/hlsl-resources/UniqueImplicitBindingNumber.ll
CodeGen/WebAssembly/memory-interleave.ll
+CodeGen/X86/global-variable-partition-with-dap.ll
CodeGen/X86/masked_gather_scatter.ll
CodeGen/X86/nocfivalue.ll
DebugInfo/AArch64/ir-outliner.ll
@@ -84,7 +85,6 @@ DebugInfo/KeyInstructions/Generic/loop-unswitch.ll
DebugInfo/X86/asan_debug_info.ll
Instrumentation/AddressSanitizer/aarch64be.ll
Instrumentation/AddressSanitizer/adaptive_global_redzones.ll
-Instrumentation/AddressSanitizer/alloca-offset-lifetime.ll
Instrumentation/AddressSanitizer/AMDGPU/adaptive_constant_global_redzones.ll
Instrumentation/AddressSanitizer/AMDGPU/adaptive_global_redzones.ll
Instrumentation/AddressSanitizer/AMDGPU/asan_do_not_instrument_lds.ll
@@ -548,12 +548,6 @@ tools/UpdateTestChecks/update_test_checks/stable_ir_values_funcs.test
tools/UpdateTestChecks/update_test_checks/stable_ir_values.test
tools/UpdateTestChecks/update_test_checks/tbaa-semantics-checks.test
tools/UpdateTestChecks/update_test_checks/various_ir_values_dbgrecords.test
-Transforms/AggressiveInstCombine/lower-table-based-cttz-basics.ll
-Transforms/AggressiveInstCombine/lower-table-based-cttz-dereferencing-pointer.ll
-Transforms/AggressiveInstCombine/lower-table-based-cttz-non-argument-value.ll
-Transforms/AggressiveInstCombine/lower-table-based-cttz-zero-element.ll
-Transforms/AggressiveInstCombine/trunc_select_cmp.ll
-Transforms/AggressiveInstCombine/trunc_select.ll
Transforms/AtomicExpand/AArch64/atomicrmw-fp.ll
Transforms/AtomicExpand/AArch64/expand-atomicrmw-xchg-fp.ll
Transforms/AtomicExpand/AArch64/pcsections.ll
@@ -818,7 +812,6 @@ Transforms/InstCombine/AMDGPU/addrspacecast.ll
Transforms/InstCombine/and2.ll
Transforms/InstCombine/and-fcmp.ll
Transforms/InstCombine/and.ll
-Transforms/InstCombine/and-or-icmp-nullptr.ll
Transforms/InstCombine/and-or-icmps.ll
Transforms/InstCombine/and-or-implied-cond-not.ll
Transforms/InstCombine/apint-div1.ll
@@ -1259,7 +1252,6 @@ Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
Transforms/PhaseOrdering/AArch64/predicated-reduction.ll
Transforms/PhaseOrdering/AArch64/quant_4x4.ll
Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
-Transforms/PhaseOrdering/lower-table-based-cttz.ll
Transforms/PhaseOrdering/vector-select.ll
Transforms/PhaseOrdering/X86/blendv-select.ll
Transforms/PhaseOrdering/X86/merge-functions2.ll