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-rw-r--r--llvm/utils/TableGen/Basic/DirectiveEmitter.cpp73
-rw-r--r--llvm/utils/TableGen/Basic/TargetFeaturesEmitter.cpp36
-rw-r--r--llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp6
-rw-r--r--llvm/utils/TableGen/Common/CodeGenRegisters.cpp11
-rw-r--r--llvm/utils/TableGen/Common/InfoByHwMode.cpp8
-rw-r--r--llvm/utils/TableGen/Common/PredicateExpander.cpp4
-rw-r--r--llvm/utils/TableGen/CompressInstEmitter.cpp2
-rw-r--r--llvm/utils/TableGen/DXILEmitter.cpp22
-rw-r--r--llvm/utils/TableGen/DecoderEmitter.cpp4
-rw-r--r--llvm/utils/TableGen/ExegesisEmitter.cpp22
-rw-r--r--llvm/utils/TableGen/FastISelEmitter.cpp6
-rw-r--r--llvm/utils/TableGen/SubtargetEmitter.cpp31
-rw-r--r--llvm/utils/TableGen/X86DisassemblerShared.h4
-rw-r--r--llvm/utils/TableGen/X86FoldTablesEmitter.cpp18
-rw-r--r--llvm/utils/TableGen/X86InstrMappingEmitter.cpp4
-rw-r--r--llvm/utils/TableGen/X86MnemonicTables.cpp3
-rw-r--r--llvm/utils/TableGen/X86ModRMFilters.h8
-rw-r--r--llvm/utils/TableGen/X86RecognizableInstr.h4
18 files changed, 113 insertions, 153 deletions
diff --git a/llvm/utils/TableGen/Basic/DirectiveEmitter.cpp b/llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
index f0e2369..b4d816e 100644
--- a/llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
+++ b/llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
@@ -19,6 +19,7 @@
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/ADT/StringSwitch.h"
+#include "llvm/TableGen/CodeGenHelpers.h"
#include "llvm/TableGen/Error.h"
#include "llvm/TableGen/Record.h"
#include "llvm/TableGen/TableGenBackend.h"
@@ -30,26 +31,10 @@
using namespace llvm;
namespace {
-// Simple RAII helper for defining ifdef-undef-endif scopes.
-class IfDefScope {
-public:
- IfDefScope(StringRef Name, raw_ostream &OS) : Name(Name), OS(OS) {
- OS << "#ifdef " << Name << "\n"
- << "#undef " << Name << "\n";
- }
-
- ~IfDefScope() { OS << "\n#endif // " << Name << "\n\n"; }
-
-private:
- StringRef Name;
- raw_ostream &OS;
-};
-} // namespace
-
-namespace {
enum class Frontend { LLVM, Flang, Clang };
+} // namespace
-StringRef getFESpelling(Frontend FE) {
+static StringRef getFESpelling(Frontend FE) {
switch (FE) {
case Frontend::LLVM:
return "llvm";
@@ -60,7 +45,6 @@ StringRef getFESpelling(Frontend FE) {
}
llvm_unreachable("unknown FE kind");
}
-} // namespace
// Get the full namespace qualifier for the directive language.
static std::string getQualifier(const DirectiveLanguage &DirLang,
@@ -297,13 +281,8 @@ static void emitDirectivesDecl(const RecordKeeper &Records, raw_ostream &OS) {
OS << "#include <cstddef>\n"; // for size_t
OS << "#include <utility>\n"; // for std::pair
OS << "\n";
- OS << "namespace llvm {\n";
-
- // Open namespaces defined in the directive language
- SmallVector<StringRef, 2> Namespaces;
- SplitString(DirLang.getCppNamespace(), Namespaces, "::");
- for (auto Ns : Namespaces)
- OS << "namespace " << Ns << " {\n";
+ NamespaceEmitter LlvmNS(OS, "llvm");
+ NamespaceEmitter DirLangNS(OS, DirLang.getCppNamespace());
if (DirLang.hasEnableBitmaskEnumInNamespace())
OS << "\nLLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE();\n";
@@ -380,9 +359,7 @@ static void emitDirectivesDecl(const RecordKeeper &Records, raw_ostream &OS) {
OS << "\n";
}
- // Closing namespaces
- for (auto Ns : reverse(Namespaces))
- OS << "} // namespace " << Ns << "\n";
+ DirLangNS.close();
// These specializations need to be in ::llvm.
for (StringRef Enum : {"Association", "Category", "Directive", "Clause"}) {
@@ -392,9 +369,7 @@ static void emitDirectivesDecl(const RecordKeeper &Records, raw_ostream &OS) {
OS << " static constexpr bool is_iterable = true;\n";
OS << "};\n";
}
-
- OS << "} // namespace llvm\n";
-
+ LlvmNS.close();
OS << "#endif // LLVM_" << Lang << "_INC\n";
}
@@ -971,11 +946,10 @@ static void generateDirectiveClauseSets(const DirectiveLanguage &DirLang,
std::string IfDefName{"GEN_"};
IfDefName += getFESpelling(FE).upper();
IfDefName += "_DIRECTIVE_CLAUSE_SETS";
- IfDefScope Scope(IfDefName, OS);
+ IfDefEmitter Scope(OS, IfDefName);
StringRef Namespace =
getFESpelling(FE == Frontend::Flang ? Frontend::LLVM : FE);
- OS << "\n";
// The namespace has to be different for clang vs flang, as 2 structs with the
// same name but different layout is UB. So just put the 'clang' on in the
// clang namespace.
@@ -1016,9 +990,8 @@ static void generateDirectiveClauseMap(const DirectiveLanguage &DirLang,
std::string IfDefName{"GEN_"};
IfDefName += getFESpelling(FE).upper();
IfDefName += "_DIRECTIVE_CLAUSE_MAP";
- IfDefScope Scope(IfDefName, OS);
+ IfDefEmitter Scope(OS, IfDefName);
- OS << "\n";
OS << "{\n";
// The namespace has to be different for clang vs flang, as 2 structs with the
@@ -1062,9 +1035,7 @@ static void generateDirectiveClauseMap(const DirectiveLanguage &DirLang,
static void generateFlangClauseParserClass(const DirectiveLanguage &DirLang,
raw_ostream &OS) {
- IfDefScope Scope("GEN_FLANG_CLAUSE_PARSER_CLASSES", OS);
-
- OS << "\n";
+ IfDefEmitter Scope(OS, "GEN_FLANG_CLAUSE_PARSER_CLASSES");
for (const Clause Clause : DirLang.getClauses()) {
if (!Clause.getFlangClass().empty()) {
@@ -1089,9 +1060,8 @@ static void generateFlangClauseParserClass(const DirectiveLanguage &DirLang,
static void generateFlangClauseParserClassList(const DirectiveLanguage &DirLang,
raw_ostream &OS) {
- IfDefScope Scope("GEN_FLANG_CLAUSE_PARSER_CLASSES_LIST", OS);
+ IfDefEmitter Scope(OS, "GEN_FLANG_CLAUSE_PARSER_CLASSES_LIST");
- OS << "\n";
interleaveComma(DirLang.getClauses(), OS, [&](const Record *C) {
Clause Clause(C);
OS << Clause.getFormattedParserClassName() << "\n";
@@ -1102,9 +1072,8 @@ static void generateFlangClauseParserClassList(const DirectiveLanguage &DirLang,
static void generateFlangClauseDump(const DirectiveLanguage &DirLang,
raw_ostream &OS) {
- IfDefScope Scope("GEN_FLANG_DUMP_PARSE_TREE_CLAUSES", OS);
+ IfDefEmitter Scope(OS, "GEN_FLANG_DUMP_PARSE_TREE_CLAUSES");
- OS << "\n";
for (const Clause Clause : DirLang.getClauses()) {
OS << "NODE(" << DirLang.getFlangClauseBaseClass() << ", "
<< Clause.getFormattedParserClassName() << ")\n";
@@ -1116,10 +1085,9 @@ static void generateFlangClauseDump(const DirectiveLanguage &DirLang,
static void generateFlangClauseUnparse(const DirectiveLanguage &DirLang,
raw_ostream &OS) {
- IfDefScope Scope("GEN_FLANG_CLAUSE_UNPARSE", OS);
+ IfDefEmitter Scope(OS, "GEN_FLANG_CLAUSE_UNPARSE");
StringRef Base = DirLang.getFlangClauseBaseClass();
- OS << "\n";
for (const Clause Clause : DirLang.getClauses()) {
if (Clause.skipFlangUnparser())
@@ -1172,9 +1140,8 @@ static void generateFlangClauseUnparse(const DirectiveLanguage &DirLang,
static void generateFlangClauseCheckPrototypes(const DirectiveLanguage &DirLang,
raw_ostream &OS) {
- IfDefScope Scope("GEN_FLANG_CLAUSE_CHECK_ENTER", OS);
+ IfDefEmitter Scope(OS, "GEN_FLANG_CLAUSE_CHECK_ENTER");
- OS << "\n";
for (const Clause Clause : DirLang.getClauses()) {
OS << "void Enter(const parser::" << DirLang.getFlangClauseBaseClass()
<< "::" << Clause.getFormattedParserClassName() << " &);\n";
@@ -1186,12 +1153,11 @@ static void generateFlangClauseCheckPrototypes(const DirectiveLanguage &DirLang,
static void generateFlangClauseParserKindMap(const DirectiveLanguage &DirLang,
raw_ostream &OS) {
- IfDefScope Scope("GEN_FLANG_CLAUSE_PARSER_KIND_MAP", OS);
+ IfDefEmitter Scope(OS, "GEN_FLANG_CLAUSE_PARSER_KIND_MAP");
StringRef Prefix = DirLang.getClausePrefix();
std::string Qual = getQualifier(DirLang);
- OS << "\n";
for (const Record *R : DirLang.getClauses()) {
Clause C(R);
OS << "if constexpr (std::is_same_v<A, parser::"
@@ -1216,11 +1182,10 @@ static void generateFlangClausesParser(const DirectiveLanguage &DirLang,
llvm::sort(Names, [](const auto &A, const auto &B) {
return A.second.Name > B.second.Name;
});
- IfDefScope Scope("GEN_FLANG_CLAUSES_PARSER", OS);
+ IfDefEmitter Scope(OS, "GEN_FLANG_CLAUSES_PARSER");
StringRef Base = DirLang.getFlangClauseBaseClass();
unsigned LastIndex = Names.size() - 1;
- OS << "\n";
OS << "TYPE_PARSER(\n";
for (auto [Index, RecSp] : llvm::enumerate(Names)) {
auto [R, S] = RecSp;
@@ -1313,10 +1278,9 @@ static void emitDirectivesFlangImpl(const DirectiveLanguage &DirLang,
static void generateClauseClassMacro(const DirectiveLanguage &DirLang,
raw_ostream &OS) {
// Generate macros style information for legacy code in clang
- IfDefScope Scope("GEN_CLANG_CLAUSE_CLASS", OS);
+ IfDefEmitter Scope(OS, "GEN_CLANG_CLAUSE_CLASS");
StringRef Prefix = DirLang.getClausePrefix();
- OS << "\n";
OS << "#ifndef CLAUSE\n";
OS << "#define CLAUSE(Enum, Str, Implicit)\n";
@@ -1375,12 +1339,11 @@ static void generateClauseClassMacro(const DirectiveLanguage &DirLang,
// language. This code can be included in library.
void emitDirectivesBasicImpl(const DirectiveLanguage &DirLang,
raw_ostream &OS) {
- IfDefScope Scope("GEN_DIRECTIVES_IMPL", OS);
+ IfDefEmitter Scope(OS, "GEN_DIRECTIVES_IMPL");
StringRef DPrefix = DirLang.getDirectivePrefix();
StringRef CPrefix = DirLang.getClausePrefix();
- OS << "\n";
OS << "#include \"llvm/Frontend/Directive/Spelling.h\"\n";
OS << "#include \"llvm/Support/ErrorHandling.h\"\n";
OS << "#include <utility>\n";
diff --git a/llvm/utils/TableGen/Basic/TargetFeaturesEmitter.cpp b/llvm/utils/TableGen/Basic/TargetFeaturesEmitter.cpp
index 6b723bc..e2b5241 100644
--- a/llvm/utils/TableGen/Basic/TargetFeaturesEmitter.cpp
+++ b/llvm/utils/TableGen/Basic/TargetFeaturesEmitter.cpp
@@ -12,6 +12,7 @@
//===----------------------------------------------------------------------===//
#include "TargetFeaturesEmitter.h"
+#include "llvm/TableGen/CodeGenHelpers.h"
#include "llvm/TableGen/Error.h"
#include "llvm/TableGen/TableGenBackend.h"
#include "llvm/TargetParser/SubtargetFeature.h"
@@ -43,7 +44,7 @@ FeatureMapTy TargetFeaturesEmitter::enumeration(raw_ostream &OS) {
PrintFatalError(
"Too many subtarget features! Bump MAX_SUBTARGET_FEATURES.");
- OS << "namespace " << Target << " {\n";
+ NamespaceEmitter NS(OS, Target);
OS << "enum {\n";
@@ -58,9 +59,8 @@ FeatureMapTy TargetFeaturesEmitter::enumeration(raw_ostream &OS) {
OS << " " << "NumSubtargetFeatures = " << N << "\n";
- // Close enumeration and namespace
+ // Close enumeration.
OS << "};\n";
- OS << "} // end namespace " << Target << "\n";
return FeatureMap;
}
@@ -149,25 +149,23 @@ void TargetFeaturesEmitter::printCPUKeyValues(raw_ostream &OS,
void TargetFeaturesEmitter::run(raw_ostream &OS) {
OS << "// Autogenerated by TargetFeatureEmitter.cpp\n\n";
- OS << "\n#ifdef GET_SUBTARGETFEATURES_ENUM\n";
- OS << "#undef GET_SUBTARGETFEATURES_ENUM\n\n";
-
- OS << "namespace llvm {\n";
- auto FeatureMap = enumeration(OS);
- OS << "} // end namespace llvm\n\n";
- OS << "#endif // GET_SUBTARGETFEATURES_ENUM\n\n";
+ FeatureMapTy FeatureMap;
+ {
+ IfDefEmitter IfDef(OS, "GET_SUBTARGETFEATURES_ENUM");
+ NamespaceEmitter NS(OS, "llvm");
+ FeatureMap = enumeration(OS);
+ }
- OS << "\n#ifdef GET_SUBTARGETFEATURES_KV\n";
- OS << "#undef GET_SUBTARGETFEATURES_KV\n\n";
+ {
+ IfDefEmitter IfDef(OS, "GET_SUBTARGETFEATURES_KV");
+ NamespaceEmitter NS(OS, "llvm");
- OS << "namespace llvm {\n";
- printFeatureKeyValues(OS, FeatureMap);
- OS << "\n";
+ printFeatureKeyValues(OS, FeatureMap);
+ OS << "\n";
- printCPUKeyValues(OS, FeatureMap);
- OS << "\n";
- OS << "} // end namespace llvm\n\n";
- OS << "#endif // GET_SUBTARGETFEATURES_KV\n\n";
+ printCPUKeyValues(OS, FeatureMap);
+ OS << "\n";
+ }
}
static TableGen::Emitter::OptClass<TargetFeaturesEmitter>
diff --git a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
index 75bea77..8076ce2 100644
--- a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
@@ -246,16 +246,14 @@ bool TypeSetByHwMode::operator==(const TypeSetByHwMode &VTS) const {
return true;
}
-namespace llvm {
-raw_ostream &operator<<(raw_ostream &OS, const MachineValueTypeSet &T) {
+raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineValueTypeSet &T) {
T.writeToStream(OS);
return OS;
}
-raw_ostream &operator<<(raw_ostream &OS, const TypeSetByHwMode &T) {
+raw_ostream &llvm::operator<<(raw_ostream &OS, const TypeSetByHwMode &T) {
T.writeToStream(OS);
return OS;
}
-} // namespace llvm
LLVM_DUMP_METHOD
void TypeSetByHwMode::dump() const { dbgs() << *this << '\n'; }
diff --git a/llvm/utils/TableGen/Common/CodeGenRegisters.cpp b/llvm/utils/TableGen/Common/CodeGenRegisters.cpp
index 294f3af..8d0ec9a 100644
--- a/llvm/utils/TableGen/Common/CodeGenRegisters.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenRegisters.cpp
@@ -857,17 +857,6 @@ unsigned CodeGenRegisterClass::getWeight(const CodeGenRegBank &RegBank) const {
return (*Members.begin())->getWeight(RegBank);
}
-namespace llvm {
-
-raw_ostream &operator<<(raw_ostream &OS, const CodeGenRegisterClass::Key &K) {
- OS << "{ " << K.RSI;
- for (const auto R : *K.Members)
- OS << ", " << R->getName();
- return OS << " }";
-}
-
-} // end namespace llvm
-
// This is a simple lexicographical order that can be used to search for sets.
// It is not the same as the topological order provided by TopoOrderRC.
bool CodeGenRegisterClass::Key::operator<(
diff --git a/llvm/utils/TableGen/Common/InfoByHwMode.cpp b/llvm/utils/TableGen/Common/InfoByHwMode.cpp
index a6e2fc4..4c8197d 100644
--- a/llvm/utils/TableGen/Common/InfoByHwMode.cpp
+++ b/llvm/utils/TableGen/Common/InfoByHwMode.cpp
@@ -227,19 +227,17 @@ EncodingInfoByHwMode::EncodingInfoByHwMode(const Record *R,
}
}
-namespace llvm {
-raw_ostream &operator<<(raw_ostream &OS, const ValueTypeByHwMode &T) {
+raw_ostream &llvm::operator<<(raw_ostream &OS, const ValueTypeByHwMode &T) {
T.writeToStream(OS);
return OS;
}
-raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T) {
+raw_ostream &llvm::operator<<(raw_ostream &OS, const RegSizeInfo &T) {
T.writeToStream(OS);
return OS;
}
-raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfoByHwMode &T) {
+raw_ostream &llvm::operator<<(raw_ostream &OS, const RegSizeInfoByHwMode &T) {
T.writeToStream(OS);
return OS;
}
-} // namespace llvm
diff --git a/llvm/utils/TableGen/Common/PredicateExpander.cpp b/llvm/utils/TableGen/Common/PredicateExpander.cpp
index 09d9538..03252ed 100644
--- a/llvm/utils/TableGen/Common/PredicateExpander.cpp
+++ b/llvm/utils/TableGen/Common/PredicateExpander.cpp
@@ -14,7 +14,7 @@
#include "CodeGenSchedule.h" // Definition of STIPredicateFunction.
#include "llvm/TableGen/Record.h"
-namespace llvm {
+using namespace llvm;
void PredicateExpander::expandTrue(raw_ostream &OS) { OS << "true"; }
void PredicateExpander::expandFalse(raw_ostream &OS) { OS << "false"; }
@@ -553,5 +553,3 @@ void STIPredicateExpander::expandSTIPredicate(raw_ostream &OS,
expandEpilogue(OS, Fn);
}
}
-
-} // namespace llvm
diff --git a/llvm/utils/TableGen/CompressInstEmitter.cpp b/llvm/utils/TableGen/CompressInstEmitter.cpp
index ccf8385..d8c5ca7 100644
--- a/llvm/utils/TableGen/CompressInstEmitter.cpp
+++ b/llvm/utils/TableGen/CompressInstEmitter.cpp
@@ -167,7 +167,7 @@ bool CompressInstEmitter::validateRegister(const Record *Reg,
assert(RegClass->isSubClassOf("RegisterClass") &&
"RegClass record should be a RegisterClass");
const CodeGenRegisterClass &RC = Target.getRegisterClass(RegClass);
- const CodeGenRegister *R = Target.getRegisterByName(Reg->getName().lower());
+ const CodeGenRegister *R = Target.getRegBank().getReg(Reg);
assert(R != nullptr && "Register not defined!!");
return RC.contains(R);
}
diff --git a/llvm/utils/TableGen/DXILEmitter.cpp b/llvm/utils/TableGen/DXILEmitter.cpp
index 09ce9f3..9471959 100644
--- a/llvm/utils/TableGen/DXILEmitter.cpp
+++ b/llvm/utils/TableGen/DXILEmitter.cpp
@@ -37,15 +37,6 @@ struct DXILIntrinsicSelect {
SmallVector<const Record *> ArgSelectRecords;
};
-static StringRef StripIntrinArgSelectTypePrefix(StringRef Type) {
- StringRef Prefix = "IntrinArgSelect_";
- if (!Type.starts_with(Prefix)) {
- PrintFatalError("IntrinArgSelectType definintion must be prefixed with "
- "'IntrinArgSelect_'");
- }
- return Type.substr(Prefix.size());
-}
-
struct DXILOperationDesc {
std::string OpName; // name of DXIL operation
int OpCode; // ID of DXIL operation
@@ -66,6 +57,15 @@ struct DXILOperationDesc {
};
} // end anonymous namespace
+static StringRef stripIntrinArgSelectTypePrefix(StringRef Type) {
+ StringRef Prefix = "IntrinArgSelect_";
+ if (!Type.starts_with(Prefix)) {
+ PrintFatalError("IntrinArgSelectType definintion must be prefixed with "
+ "'IntrinArgSelect_'");
+ }
+ return Type.substr(Prefix.size());
+}
+
/// In-place sort TableGen records of class with a field
/// Version dxil_version
/// in the ascending version order.
@@ -449,7 +449,7 @@ static void emitDXILIntrinsicMap(ArrayRef<DXILOperationDesc> Ops,
ArgSelect->getValueAsDef("type")->getNameInitAsString();
int Value = ArgSelect->getValueAsInt("value");
OS << "(IntrinArgSelect{"
- << "IntrinArgSelect::Type::" << StripIntrinArgSelectTypePrefix(Type)
+ << "IntrinArgSelect::Type::" << stripIntrinArgSelectTypePrefix(Type)
<< "," << Value << "}), ";
}
OS << ")\n";
@@ -466,7 +466,7 @@ static void emitDXILIntrinsicArgSelectTypes(const RecordKeeper &Records,
OS << "#ifdef DXIL_OP_INTRINSIC_ARG_SELECT_TYPE\n";
for (const Record *Records :
Records.getAllDerivedDefinitions("IntrinArgSelectType")) {
- StringRef StrippedName = StripIntrinArgSelectTypePrefix(Records->getName());
+ StringRef StrippedName = stripIntrinArgSelectTypePrefix(Records->getName());
OS << "DXIL_OP_INTRINSIC_ARG_SELECT_TYPE(" << StrippedName << ")\n";
}
OS << "#undef DXIL_OP_INTRINSIC_ARG_SELECT_TYPE\n";
diff --git a/llvm/utils/TableGen/DecoderEmitter.cpp b/llvm/utils/TableGen/DecoderEmitter.cpp
index 961dc28..5d41b7d 100644
--- a/llvm/utils/TableGen/DecoderEmitter.cpp
+++ b/llvm/utils/TableGen/DecoderEmitter.cpp
@@ -194,10 +194,6 @@ private:
void parseInstructionEncodings();
};
-} // end anonymous namespace
-
-namespace {
-
struct EncodingIsland {
unsigned StartBit;
unsigned NumBits;
diff --git a/llvm/utils/TableGen/ExegesisEmitter.cpp b/llvm/utils/TableGen/ExegesisEmitter.cpp
index 1b4b072..bd69919 100644
--- a/llvm/utils/TableGen/ExegesisEmitter.cpp
+++ b/llvm/utils/TableGen/ExegesisEmitter.cpp
@@ -58,6 +58,14 @@ private:
const std::map<llvm::StringRef, unsigned> PfmCounterNameTable;
};
+struct ValidationCounterInfo {
+ int64_t EventNumber;
+ StringRef EventName;
+ unsigned PfmCounterID;
+};
+
+} // namespace
+
static std::map<llvm::StringRef, unsigned>
collectPfmCounters(const RecordKeeper &Records) {
std::map<llvm::StringRef, unsigned> PfmCounterNameTable;
@@ -106,14 +114,8 @@ ExegesisEmitter::ExegesisEmitter(const RecordKeeper &RK)
Target = Targets[0]->getName().str();
}
-struct ValidationCounterInfo {
- int64_t EventNumber;
- StringRef EventName;
- unsigned PfmCounterID;
-};
-
-bool EventNumberLess(const ValidationCounterInfo &LHS,
- const ValidationCounterInfo &RHS) {
+static bool EventNumberLess(const ValidationCounterInfo &LHS,
+ const ValidationCounterInfo &RHS) {
return LHS.EventNumber < RHS.EventNumber;
}
@@ -221,7 +223,7 @@ void ExegesisEmitter::emitPfmCounters(raw_ostream &OS) const {
emitPfmCountersInfo(*Def, IssueCountersTableOffset, OS);
OS << "\n";
-} // namespace
+}
void ExegesisEmitter::emitPfmCountersLookupTable(raw_ostream &OS) const {
std::vector<const Record *> Bindings =
@@ -249,7 +251,5 @@ void ExegesisEmitter::run(raw_ostream &OS) const {
emitPfmCountersLookupTable(OS);
}
-} // end anonymous namespace
-
static TableGen::Emitter::OptClass<ExegesisEmitter>
X("gen-exegesis", "Generate llvm-exegesis tables");
diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp
index 694d89a..dba8bde 100644
--- a/llvm/utils/TableGen/FastISelEmitter.cpp
+++ b/llvm/utils/TableGen/FastISelEmitter.cpp
@@ -52,11 +52,9 @@ struct InstructionMemo {
InstructionMemo(const InstructionMemo &Other) = delete;
InstructionMemo(InstructionMemo &&Other) = default;
};
-} // End anonymous namespace
/// ImmPredicateSet - This uniques predicates (represented as a string) and
/// gives them unique (small) integer ID's that start at 0.
-namespace {
class ImmPredicateSet {
DenseMap<TreePattern *, unsigned> ImmIDs;
std::vector<TreePredicateFn> PredsByName;
@@ -77,12 +75,10 @@ public:
iterator begin() const { return PredsByName.begin(); }
iterator end() const { return PredsByName.end(); }
};
-} // End anonymous namespace
/// OperandsSignature - This class holds a description of a list of operand
/// types. It has utility methods for emitting text based on the operands.
///
-namespace {
struct OperandsSignature {
class OpKind {
enum { OK_Reg, OK_FP, OK_Imm, OK_Invalid = -1 };
@@ -366,9 +362,7 @@ struct OperandsSignature {
Opnd.printManglingSuffix(OS, ImmPredicates, StripImmCodes);
}
};
-} // End anonymous namespace
-namespace {
class FastISelMap {
// A multimap is needed instead of a "plain" map because the key is
// the instruction's complexity (an int) and they are not unique.
diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp
index 0f42d49..2f15cc8 100644
--- a/llvm/utils/TableGen/SubtargetEmitter.cpp
+++ b/llvm/utils/TableGen/SubtargetEmitter.cpp
@@ -1586,6 +1586,24 @@ static void emitPredicates(const CodeGenSchedTransition &T,
continue;
}
+ if (Rec->isSubClassOf("FeatureSchedPredicate")) {
+ const Record *FR = Rec->getValueAsDef("Feature");
+ if (PE.shouldExpandForMC()) {
+ // MC version of this predicate will be emitted into
+ // resolveVariantSchedClassImpl, which accesses MCSubtargetInfo
+ // through argument STI.
+ SS << "STI.";
+ } else {
+ // Otherwise, this predicate will be emitted directly into
+ // TargetGenSubtargetInfo::resolveSchedClass, which can just access
+ // TargetSubtargetInfo / MCSubtargetInfo through `this`.
+ SS << "this->";
+ }
+ SS << "hasFeature(" << PE.getTargetName() << "::" << FR->getName()
+ << ")";
+ continue;
+ }
+
// Expand this legacy predicate and wrap it around braces if there is more
// than one predicate to expand.
SS << ((NumNonTruePreds > 1) ? "(" : "")
@@ -1618,7 +1636,8 @@ static void emitSchedModelHelperEpilogue(raw_ostream &OS,
static bool hasMCSchedPredicates(const CodeGenSchedTransition &T) {
return all_of(T.PredTerm, [](const Record *Rec) {
- return Rec->isSubClassOf("MCSchedPredicate");
+ return Rec->isSubClassOf("MCSchedPredicate") ||
+ Rec->isSubClassOf("FeatureSchedPredicate");
});
}
@@ -1761,7 +1780,7 @@ void SubtargetEmitter::emitSchedModelHelpers(const std::string &ClassName,
<< "\n::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI,"
<< " const MCInstrInfo *MCII, unsigned CPUID) const {\n"
<< " return " << Target << "_MC"
- << "::resolveVariantSchedClassImpl(SchedClass, MI, MCII, CPUID);\n"
+ << "::resolveVariantSchedClassImpl(SchedClass, MI, MCII, *this, CPUID);\n"
<< "} // " << ClassName << "::resolveVariantSchedClass\n\n";
STIPredicateExpander PE(Target, /*Indent=*/0);
@@ -1923,7 +1942,8 @@ void SubtargetEmitter::parseFeaturesFunction(raw_ostream &OS) {
void SubtargetEmitter::emitGenMCSubtargetInfo(raw_ostream &OS) {
OS << "namespace " << Target << "_MC {\n"
<< "unsigned resolveVariantSchedClassImpl(unsigned SchedClass,\n"
- << " const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) {\n";
+ << " const MCInst *MI, const MCInstrInfo *MCII, "
+ << "const MCSubtargetInfo &STI, unsigned CPUID) {\n";
emitSchedModelHelpersImpl(OS, /* OnlyExpandMCPredicates */ true);
OS << "}\n";
OS << "} // end namespace " << Target << "_MC\n\n";
@@ -1945,7 +1965,7 @@ void SubtargetEmitter::emitGenMCSubtargetInfo(raw_ostream &OS) {
<< " const MCInst *MI, const MCInstrInfo *MCII,\n"
<< " unsigned CPUID) const override {\n"
<< " return " << Target << "_MC"
- << "::resolveVariantSchedClassImpl(SchedClass, MI, MCII, CPUID);\n";
+ << "::resolveVariantSchedClassImpl(SchedClass, MI, MCII, *this, CPUID);\n";
OS << " }\n";
if (TGT.getHwModes().getNumModeIds() > 1) {
OS << " unsigned getHwModeSet() const override;\n";
@@ -2073,7 +2093,8 @@ void SubtargetEmitter::run(raw_ostream &OS) {
OS << "class DFAPacketizer;\n";
OS << "namespace " << Target << "_MC {\n"
<< "unsigned resolveVariantSchedClassImpl(unsigned SchedClass,"
- << " const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID);\n"
+ << " const MCInst *MI, const MCInstrInfo *MCII, "
+ << "const MCSubtargetInfo &STI, unsigned CPUID);\n"
<< "} // end namespace " << Target << "_MC\n\n";
OS << "struct " << ClassName << " : public TargetSubtargetInfo {\n"
<< " explicit " << ClassName << "(const Triple &TT, StringRef CPU, "
diff --git a/llvm/utils/TableGen/X86DisassemblerShared.h b/llvm/utils/TableGen/X86DisassemblerShared.h
index f60fd47..d5f936d 100644
--- a/llvm/utils/TableGen/X86DisassemblerShared.h
+++ b/llvm/utils/TableGen/X86DisassemblerShared.h
@@ -14,6 +14,8 @@
#include "llvm/Support/X86DisassemblerDecoderCommon.h"
+namespace llvm::X86Disassembler {
+
struct InstructionSpecifier {
llvm::X86Disassembler::OperandSpecifier
operands[llvm::X86Disassembler::X86_MAX_OPERANDS];
@@ -52,4 +54,6 @@ struct ContextDecision {
ContextDecision() { memset(opcodeDecisions, 0, sizeof(opcodeDecisions)); }
};
+} // namespace llvm::X86Disassembler
+
#endif
diff --git a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
index 1e1e4ab..6f523b5 100644
--- a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
+++ b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
@@ -30,22 +30,23 @@ struct ManualMapEntry {
const char *MemInstStr;
uint16_t Strategy;
};
+} // namespace
// List of instructions requiring explicitly aligned memory.
-const char *ExplicitAlign[] = {"MOVDQA", "MOVAPS", "MOVAPD", "MOVNTPS",
- "MOVNTPD", "MOVNTDQ", "MOVNTDQA"};
+static constexpr const char *ExplicitAlign[] = {
+ "MOVDQA", "MOVAPS", "MOVAPD", "MOVNTPS", "MOVNTPD", "MOVNTDQ", "MOVNTDQA"};
// List of instructions NOT requiring explicit memory alignment.
-const char *ExplicitUnalign[] = {"MOVDQU", "MOVUPS", "MOVUPD",
- "PCMPESTRM", "PCMPESTRI", "PCMPISTRM",
- "PCMPISTRI"};
+static constexpr const char *ExplicitUnalign[] = {
+ "MOVDQU", "MOVUPS", "MOVUPD", "PCMPESTRM",
+ "PCMPESTRI", "PCMPISTRM", "PCMPISTRI"};
-const ManualMapEntry ManualMapSet[] = {
+static const ManualMapEntry ManualMapSet[] = {
#define ENTRY(REG, MEM, FLAGS) {#REG, #MEM, FLAGS},
#include "X86ManualFoldTables.def"
};
-const std::set<StringRef> NoFoldSet = {
+static const std::set<StringRef> NoFoldSet = {
#define NOFOLD(INSN) #INSN,
#include "X86ManualFoldTables.def"
};
@@ -62,6 +63,7 @@ static bool isExplicitUnalign(const CodeGenInstruction *Inst) {
});
}
+namespace {
class X86FoldTablesEmitter {
const RecordKeeper &Records;
const CodeGenTarget Target;
@@ -230,6 +232,7 @@ private:
OS << "};\n\n";
}
};
+} // namespace
// Return true if one of the instruction's operands is a RST register class
static bool hasRSTRegClass(const CodeGenInstruction *Inst) {
@@ -318,6 +321,7 @@ static bool isNOREXRegClass(const Record *Op) {
// Function object - Operator() returns true if the given Reg instruction
// matches the Mem instruction of this object.
+namespace {
class IsMatch {
const CodeGenInstruction *MemInst;
const X86Disassembler::RecognizableInstrBase MemRI;
diff --git a/llvm/utils/TableGen/X86InstrMappingEmitter.cpp b/llvm/utils/TableGen/X86InstrMappingEmitter.cpp
index be5e2a7..2745ba7 100644
--- a/llvm/utils/TableGen/X86InstrMappingEmitter.cpp
+++ b/llvm/utils/TableGen/X86InstrMappingEmitter.cpp
@@ -66,6 +66,7 @@ private:
void printTable(ArrayRef<Entry> Table, StringRef Name, StringRef Macro,
raw_ostream &OS);
};
+} // namespace
void X86InstrMappingEmitter::printClassDef(raw_ostream &OS) {
OS << "struct X86TableEntry {\n"
@@ -106,6 +107,7 @@ void X86InstrMappingEmitter::printTable(ArrayRef<Entry> Table, StringRef Name,
printMacroEnd(Macro, OS);
}
+namespace {
class IsMatch {
const CodeGenInstruction *OldInst;
@@ -146,6 +148,7 @@ public:
return true;
}
};
+} // namespace
static bool isInteresting(const Record *Rec) {
// _REV instruction should not appear before encoding optimization
@@ -368,7 +371,6 @@ void X86InstrMappingEmitter::run(raw_ostream &OS) {
emitND2NonNDTable(Insts, OS);
emitSSE2AVXTable(Insts, OS);
}
-} // namespace
static TableGen::Emitter::OptClass<X86InstrMappingEmitter>
X("gen-x86-instr-mapping", "Generate X86 instruction mapping");
diff --git a/llvm/utils/TableGen/X86MnemonicTables.cpp b/llvm/utils/TableGen/X86MnemonicTables.cpp
index 85bd4df..7851919 100644
--- a/llvm/utils/TableGen/X86MnemonicTables.cpp
+++ b/llvm/utils/TableGen/X86MnemonicTables.cpp
@@ -30,6 +30,7 @@ public:
// Output X86 mnemonic tables.
void run(raw_ostream &OS);
};
+} // namespace
void X86MnemonicTablesEmitter::run(raw_ostream &OS) {
emitSourceFileHeader("X86 Mnemonic tables", OS);
@@ -83,7 +84,5 @@ void X86MnemonicTablesEmitter::run(raw_ostream &OS) {
OS << "} // end namespace X86\n} // end namespace llvm";
}
-} // namespace
-
static TableGen::Emitter::OptClass<X86MnemonicTablesEmitter>
X("gen-x86-mnemonic-tables", "Generate X86 mnemonic tables");
diff --git a/llvm/utils/TableGen/X86ModRMFilters.h b/llvm/utils/TableGen/X86ModRMFilters.h
index b579f22..7bf111f 100644
--- a/llvm/utils/TableGen/X86ModRMFilters.h
+++ b/llvm/utils/TableGen/X86ModRMFilters.h
@@ -19,9 +19,7 @@
#include <cstdint>
-namespace llvm {
-
-namespace X86Disassembler {
+namespace llvm::X86Disassembler {
/// ModRMFilter - Abstract base class for clases that recognize patterns in
/// ModR/M bytes.
@@ -135,8 +133,6 @@ public:
bool accepts(uint8_t modRM) const override { return (ModRM == modRM); }
};
-} // namespace X86Disassembler
-
-} // namespace llvm
+} // namespace llvm::X86Disassembler
#endif
diff --git a/llvm/utils/TableGen/X86RecognizableInstr.h b/llvm/utils/TableGen/X86RecognizableInstr.h
index b74e74d..52f9538 100644
--- a/llvm/utils/TableGen/X86RecognizableInstr.h
+++ b/llvm/utils/TableGen/X86RecognizableInstr.h
@@ -22,8 +22,6 @@
#include <string>
#include <vector>
-struct InstructionSpecifier;
-
namespace llvm {
class Record;
#define X86_INSTR_MRM_MAPPING \
@@ -179,6 +177,8 @@ enum { ExplicitREX2 = 1, ExplicitEVEX = 3 };
namespace X86Disassembler {
class DisassemblerTables;
+struct InstructionSpecifier;
+
/// Extract common fields of a single X86 instruction from a CodeGenInstruction
struct RecognizableInstrBase {
/// The OpPrefix field from the record
generated by cgit v1.1 at 2025-10-05 00:17:47 +0000