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-rw-r--r--llvm/utils/TableGen/CodeGenTarget.cpp40
1 files changed, 0 insertions, 40 deletions
diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp
index e9c0752..47e6934 100644
--- a/llvm/utils/TableGen/CodeGenTarget.cpp
+++ b/llvm/utils/TableGen/CodeGenTarget.cpp
@@ -295,46 +295,6 @@ CodeGenRegBank &CodeGenTarget::getRegBank() const {
return *RegBank;
}
-Optional<CodeGenRegisterClass *>
-CodeGenTarget::getSuperRegForSubReg(const ValueTypeByHwMode &ValueTy,
- CodeGenRegBank &RegBank,
- const CodeGenSubRegIndex *SubIdx) const {
- std::vector<CodeGenRegisterClass *> Candidates;
- auto &RegClasses = RegBank.getRegClasses();
-
- // Try to find a register class which supports ValueTy, and also contains
- // SubIdx.
- for (CodeGenRegisterClass &RC : RegClasses) {
- // Is there a subclass of this class which contains this subregister index?
- CodeGenRegisterClass *SubClassWithSubReg = RC.getSubClassWithSubReg(SubIdx);
- if (!SubClassWithSubReg)
- continue;
-
- // We have a class. Check if it supports this value type.
- if (llvm::none_of(SubClassWithSubReg->VTs,
- [&ValueTy](const ValueTypeByHwMode &ClassVT) {
- return ClassVT == ValueTy;
- }))
- continue;
-
- // We have a register class which supports both the value type and
- // subregister index. Remember it.
- Candidates.push_back(SubClassWithSubReg);
- }
-
- // If we didn't find anything, we're done.
- if (Candidates.empty())
- return None;
-
- // Find and return the largest of our candidate classes.
- llvm::sort(Candidates,
- [&](const CodeGenRegisterClass *A, const CodeGenRegisterClass *B) {
- return A->getMembers().size() > B->getMembers().size();
- });
-
- return Candidates[0];
-}
-
void CodeGenTarget::ReadRegAltNameIndices() const {
RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex");
llvm::sort(RegAltNameIndices, LessRecord());