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path: root/llvm/utils/TableGen/CodeGenRegisters.cpp
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Diffstat (limited to 'llvm/utils/TableGen/CodeGenRegisters.cpp')
-rw-r--r--llvm/utils/TableGen/CodeGenRegisters.cpp7
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp
index 65bcd6f..2c61be7 100644
--- a/llvm/utils/TableGen/CodeGenRegisters.cpp
+++ b/llvm/utils/TableGen/CodeGenRegisters.cpp
@@ -638,6 +638,7 @@ struct TupleExpander : SetTheory::Expander {
Def->getValueAsListOfStrings("RegAsmNames");
// Zip them up.
+ RecordKeeper &RK = Def->getRecords();
for (unsigned n = 0; n != Length; ++n) {
std::string Name;
Record *Proto = Lists[0][n];
@@ -654,13 +655,13 @@ struct TupleExpander : SetTheory::Expander {
SmallVector<Init *, 2> CostPerUse;
CostPerUse.insert(CostPerUse.end(), CostList->begin(), CostList->end());
- StringInit *AsmName = StringInit::get("");
+ StringInit *AsmName = StringInit::get(RK, "");
if (!RegNames.empty()) {
if (RegNames.size() <= n)
PrintFatalError(Def->getLoc(),
"Register tuple definition missing name for '" +
Name + "'.");
- AsmName = StringInit::get(RegNames[n]);
+ AsmName = StringInit::get(RK, RegNames[n]);
}
// Create a new Record representing the synthesized register. This record
@@ -699,7 +700,7 @@ struct TupleExpander : SetTheory::Expander {
// Composite registers are always covered by sub-registers.
if (Field == "CoveredBySubRegs")
- RV.setValue(BitInit::get(true));
+ RV.setValue(BitInit::get(RK, true));
// Copy fields from the RegisterTuples def.
if (Field == "SubRegIndices" ||