diff options
Diffstat (limited to 'llvm/unittests/CodeGen')
| -rw-r--r-- | llvm/unittests/CodeGen/InstrRefLDVTest.cpp | 2 | ||||
| -rw-r--r-- | llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp | 70 |
2 files changed, 71 insertions, 1 deletions
diff --git a/llvm/unittests/CodeGen/InstrRefLDVTest.cpp b/llvm/unittests/CodeGen/InstrRefLDVTest.cpp index ff87e7b..235a53d 100644 --- a/llvm/unittests/CodeGen/InstrRefLDVTest.cpp +++ b/llvm/unittests/CodeGen/InstrRefLDVTest.cpp @@ -1113,7 +1113,7 @@ TEST_F(InstrRefLDVTest, MLocDiamondSpills) { // Create a stack location and ensure it's tracked. SpillLoc SL = {getRegByName("RSP"), StackOffset::getFixed(-8)}; SpillLocationNo SpillNo = *MTracker->getOrTrackSpillLoc(SL); - ASSERT_EQ(MTracker->getNumLocs(), 13u); // Tracks all possible stack locs. + ASSERT_EQ(MTracker->getNumLocs(), 11u); // Tracks all possible stack locs. // Locations are: RSP, stack slots from 2^3 bits wide up to 2^9 for zmm regs, // then slots for sub_8bit_hi and sub_16bit_hi ({8, 8} and {16, 16}). // Finally, one for spilt fp80 registers. diff --git a/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp b/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp index aa56aaf..ceaee52 100644 --- a/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp +++ b/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp @@ -354,6 +354,76 @@ TEST_F(SelectionDAGPatternMatchTest, matchBinaryOp) { sd_match(InsertELT, m_InsertElt(m_Value(), m_Value(), m_SpecificInt(1)))); } +TEST_F(SelectionDAGPatternMatchTest, matchGenericTernaryOp) { + SDLoc DL; + auto Float32VT = EVT::getFloatingPointVT(32); + + SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Float32VT); + SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Float32VT); + SDValue Op2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Float32VT); + + SDValue FMA = DAG->getNode(ISD::FMA, DL, Float32VT, Op0, Op1, Op2); + SDValue FAdd = DAG->getNode(ISD::FADD, DL, Float32VT, Op0, Op1); + + using namespace SDPatternMatch; + SDValue A, B, C; + + EXPECT_TRUE(sd_match(FMA, m_TernaryOp(ISD::FMA, m_Specific(Op0), + m_Specific(Op1), m_Specific(Op2)))); + EXPECT_FALSE(sd_match(FMA, m_TernaryOp(ISD::FADD, m_Specific(Op0), + m_Specific(Op1), m_Specific(Op2)))); + EXPECT_FALSE( + sd_match(FAdd, m_TernaryOp(ISD::FMA, m_Value(), m_Value(), m_Value()))); + EXPECT_FALSE(sd_match(FMA, m_TernaryOp(ISD::FMA, m_Specific(Op1), + m_Specific(Op0), m_Specific(Op2)))); + + EXPECT_TRUE( + sd_match(FMA, m_TernaryOp(ISD::FMA, m_Value(A), m_Value(B), m_Value(C)))); + EXPECT_EQ(A, Op0); + EXPECT_EQ(B, Op1); + EXPECT_EQ(C, Op2); + + A = B = C = SDValue(); + + EXPECT_TRUE(sd_match(FMA, m_c_TernaryOp(ISD::FMA, m_Specific(Op0), + m_Specific(Op1), m_Specific(Op2)))); + EXPECT_TRUE(sd_match(FMA, m_c_TernaryOp(ISD::FMA, m_Specific(Op1), + m_Specific(Op0), m_Specific(Op2)))); + + EXPECT_FALSE(sd_match(FMA, m_c_TernaryOp(ISD::FMA, m_Specific(Op2), + m_Specific(Op1), m_Specific(Op0)))); + EXPECT_FALSE(sd_match(FMA, m_c_TernaryOp(ISD::FMA, m_Specific(Op2), + m_Specific(Op0), m_Specific(Op1)))); + + EXPECT_FALSE(sd_match(FMA, m_c_TernaryOp(ISD::FMA, m_Specific(Op0), + m_Specific(Op2), m_Specific(Op1)))); + EXPECT_FALSE(sd_match(FMA, m_c_TernaryOp(ISD::FMA, m_Specific(Op1), + m_Specific(Op2), m_Specific(Op0)))); + + EXPECT_TRUE(sd_match( + FMA, m_c_TernaryOp(ISD::FMA, m_Value(A), m_Value(B), m_Value(C)))); + EXPECT_EQ(A, Op0); + EXPECT_EQ(B, Op1); + EXPECT_EQ(C, Op2); + + A = B = C = SDValue(); + EXPECT_TRUE(sd_match( + FMA, m_c_TernaryOp(ISD::FMA, m_Value(B), m_Value(A), m_Value(C)))); + EXPECT_EQ(A, Op1); + EXPECT_EQ(B, Op0); + EXPECT_EQ(C, Op2); + + A = B = C = SDValue(); + EXPECT_TRUE(sd_match( + FMA, m_c_TernaryOp(ISD::FMA, m_Value(A), m_Value(B), m_Value(C)))); + EXPECT_EQ(A, Op0); + EXPECT_EQ(B, Op1); + EXPECT_EQ(C, Op2); + + EXPECT_FALSE( + sd_match(FAdd, m_c_TernaryOp(ISD::FMA, m_Value(), m_Value(), m_Value()))); +} + TEST_F(SelectionDAGPatternMatchTest, matchUnaryOp) { SDLoc DL; auto Int32VT = EVT::getIntegerVT(Context, 32); |