diff options
Diffstat (limited to 'llvm/test/Transforms/IndVarSimplify')
51 files changed, 798 insertions, 159 deletions
diff --git a/llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll b/llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll index 2578166..d4498ba 100644 --- a/llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll +++ b/llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll @@ -97,7 +97,7 @@ define void @test2(ptr %a, ptr %b, i8 %limit, i1 %arg) { ; CHECK-LABEL: @test2( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[LIMIT:%.*]] to i32 -; CHECK-NEXT: br i1 %arg, label [[FOR_COND1_PREHEADER_PREHEADER:%.*]], label [[FOR_COND1_PREHEADER_US_PREHEADER:%.*]] +; CHECK-NEXT: br i1 [[ARG:%.*]], label [[FOR_COND1_PREHEADER_PREHEADER:%.*]], label [[FOR_COND1_PREHEADER_US_PREHEADER:%.*]] ; CHECK: for.cond1.preheader.us.preheader: ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[CONV]], i32 1) ; CHECK-NEXT: br label [[FOR_COND1_PREHEADER_US:%.*]] @@ -237,8 +237,7 @@ define i32 @test4(i32 %a) { ; CHECK-NEXT: [[CONV3:%.*]] = trunc i32 [[OR]] to i8 ; CHECK-NEXT: [[CALL:%.*]] = call i32 @fn1(i8 signext [[CONV3]]) ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i32 [[INDVARS_IV]], -1 -; CHECK-NEXT: [[TMP0:%.*]] = trunc nuw i32 [[INDVARS_IV_NEXT]] to i8 -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[TMP0]], -14 +; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[INDVARS_IV_NEXT]], 242 ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]] ; CHECK: for.end: ; CHECK-NEXT: ret i32 0 diff --git a/llvm/test/Transforms/IndVarSimplify/AMDGPU/addrspace-7-doesnt-crash.ll b/llvm/test/Transforms/IndVarSimplify/AMDGPU/addrspace-7-doesnt-crash.ll index 8e932e0..08dcf1d 100644 --- a/llvm/test/Transforms/IndVarSimplify/AMDGPU/addrspace-7-doesnt-crash.ll +++ b/llvm/test/Transforms/IndVarSimplify/AMDGPU/addrspace-7-doesnt-crash.ll @@ -7,11 +7,11 @@ define void @f(ptr addrspace(7) %arg) { ; CHECK-LABEL: define void @f ; CHECK-SAME: (ptr addrspace(7) [[ARG:%.*]]) { ; CHECK-NEXT: bb: -; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr addrspace(7) [[ARG]], i32 8 ; CHECK-NEXT: br label [[BB1:%.*]] ; CHECK: bb1: ; CHECK-NEXT: br i1 false, label [[BB2:%.*]], label [[BB1]] ; CHECK: bb2: +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr addrspace(7) [[ARG]], i32 8 ; CHECK-NEXT: br label [[BB3:%.*]] ; CHECK: bb3: ; CHECK-NEXT: [[I4:%.*]] = load i32, ptr addrspace(7) [[SCEVGEP]], align 4 diff --git a/llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll b/llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll index 3c6535d..7080707 100644 --- a/llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll +++ b/llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll @@ -5,30 +5,30 @@ define i32 @remove_loop(i32 %size) #0 { ; CHECK-V8M-LABEL: @remove_loop( ; CHECK-V8M-NEXT: entry: +; CHECK-V8M-NEXT: br label [[WHILE_COND:%.*]] +; CHECK-V8M: while.cond: +; CHECK-V8M-NEXT: br i1 false, label [[WHILE_COND]], label [[WHILE_END:%.*]] +; CHECK-V8M: while.end: ; CHECK-V8M-NEXT: [[TMP0:%.*]] = add i32 [[SIZE:%.*]], 31 ; CHECK-V8M-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[SIZE]], i32 31) ; CHECK-V8M-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[UMIN]] ; CHECK-V8M-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 5 ; CHECK-V8M-NEXT: [[TMP3:%.*]] = shl nuw i32 [[TMP2]], 5 ; CHECK-V8M-NEXT: [[TMP4:%.*]] = sub i32 [[SIZE]], [[TMP3]] -; CHECK-V8M-NEXT: br label [[WHILE_COND:%.*]] -; CHECK-V8M: while.cond: -; CHECK-V8M-NEXT: br i1 false, label [[WHILE_COND]], label [[WHILE_END:%.*]] -; CHECK-V8M: while.end: ; CHECK-V8M-NEXT: ret i32 [[TMP4]] ; ; CHECK-V8A-LABEL: @remove_loop( ; CHECK-V8A-NEXT: entry: +; CHECK-V8A-NEXT: br label [[WHILE_COND:%.*]] +; CHECK-V8A: while.cond: +; CHECK-V8A-NEXT: br i1 false, label [[WHILE_COND]], label [[WHILE_END:%.*]] +; CHECK-V8A: while.end: ; CHECK-V8A-NEXT: [[TMP0:%.*]] = add i32 [[SIZE:%.*]], 31 ; CHECK-V8A-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[SIZE]], i32 31) ; CHECK-V8A-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[UMIN]] ; CHECK-V8A-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 5 ; CHECK-V8A-NEXT: [[TMP3:%.*]] = shl nuw i32 [[TMP2]], 5 ; CHECK-V8A-NEXT: [[TMP4:%.*]] = sub i32 [[SIZE]], [[TMP3]] -; CHECK-V8A-NEXT: br label [[WHILE_COND:%.*]] -; CHECK-V8A: while.cond: -; CHECK-V8A-NEXT: br i1 false, label [[WHILE_COND]], label [[WHILE_END:%.*]] -; CHECK-V8A: while.end: ; CHECK-V8A-NEXT: ret i32 [[TMP4]] ; entry: @@ -749,7 +749,7 @@ define i32 @different_ivs(ptr %array, i32 %length, i32 %n) #0 { ; CHECK-V8M-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4 ; CHECK-V8M-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]] ; CHECK-V8M-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 -; CHECK-V8M-NEXT: [[CONTINUE:%.*]] = icmp ult i64 [[I_NEXT]], [[N64]] +; CHECK-V8M-NEXT: [[CONTINUE:%.*]] = icmp samesign ult i64 [[I_NEXT]], [[N64]] ; CHECK-V8M-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT:%.*]] ; CHECK-V8M: exit: ; CHECK-V8M-NEXT: [[RESULT:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ] @@ -778,7 +778,7 @@ define i32 @different_ivs(ptr %array, i32 %length, i32 %n) #0 { ; CHECK-V8A-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4 ; CHECK-V8A-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]] ; CHECK-V8A-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 -; CHECK-V8A-NEXT: [[CONTINUE:%.*]] = icmp ult i64 [[I_NEXT]], [[N64]] +; CHECK-V8A-NEXT: [[CONTINUE:%.*]] = icmp samesign ult i64 [[I_NEXT]], [[N64]] ; CHECK-V8A-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT:%.*]] ; CHECK-V8A: exit: ; CHECK-V8A-NEXT: [[RESULT:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ] diff --git a/llvm/test/Transforms/IndVarSimplify/ARM/indvar-unroll-imm-cost.ll b/llvm/test/Transforms/IndVarSimplify/ARM/indvar-unroll-imm-cost.ll index 382f026..1cec2dd 100644 --- a/llvm/test/Transforms/IndVarSimplify/ARM/indvar-unroll-imm-cost.ll +++ b/llvm/test/Transforms/IndVarSimplify/ARM/indvar-unroll-imm-cost.ll @@ -60,7 +60,7 @@ define dso_local arm_aapcscc void @test(ptr nocapture %pDest, ptr nocapture read ; CHECK-NEXT: [[ADD_PTR23]] = getelementptr inbounds i16, ptr [[PSRCB_ADDR_173]], i32 4 ; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i32, ptr [[PDEST_ADDR_175]], i32 1 ; CHECK-NEXT: [[ADD24]] = add nuw nsw i32 [[J_076]], 4 -; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[ADD24]], [[TMP0]] +; CHECK-NEXT: [[CMP2:%.*]] = icmp samesign ult i32 [[ADD24]], [[TMP0]] ; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_BODY3]], label [[FOR_END_LOOPEXIT:%.*]] ; CHECK: for.end.loopexit: ; CHECK-NEXT: [[ADD_PTR_LCSSA:%.*]] = phi ptr [ [[ADD_PTR]], [[FOR_BODY3]] ] @@ -77,8 +77,6 @@ define dso_local arm_aapcscc void @test(ptr nocapture %pDest, ptr nocapture read ; CHECK-NEXT: [[CMP2780:%.*]] = icmp ugt i32 [[ADD25]], [[J_0_LCSSA]] ; CHECK-NEXT: br i1 [[CMP2780]], label [[FOR_BODY29_PREHEADER:%.*]], label [[FOR_END40]] ; CHECK: for.body29.preheader: -; CHECK-NEXT: [[TMP10:%.*]] = sub nsw i32 [[ADD25]], [[J_0_LCSSA]] -; CHECK-NEXT: [[SCEVGEP93:%.*]] = getelementptr i16, ptr [[PSRCB_ADDR_1_LCSSA]], i32 [[TMP10]] ; CHECK-NEXT: br label [[FOR_BODY29:%.*]] ; CHECK: for.body29: ; CHECK-NEXT: [[J_184:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY29]] ], [ [[J_0_LCSSA]], [[FOR_BODY29_PREHEADER]] ] @@ -102,6 +100,8 @@ define dso_local arm_aapcscc void @test(ptr nocapture %pDest, ptr nocapture read ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], [[ADD25]] ; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END40_LOOPEXIT:%.*]], label [[FOR_BODY29]] ; CHECK: for.end40.loopexit: +; CHECK-NEXT: [[TMP10:%.*]] = sub nsw i32 [[ADD25]], [[J_0_LCSSA]] +; CHECK-NEXT: [[SCEVGEP93:%.*]] = getelementptr i16, ptr [[PSRCB_ADDR_1_LCSSA]], i32 [[TMP10]] ; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i16, ptr [[PSRCA_ADDR_1_LCSSA]], i32 [[TMP10]] ; CHECK-NEXT: [[SCEVGEP94:%.*]] = getelementptr i32, ptr [[PDEST_ADDR_1_LCSSA]], i32 [[TMP10]] ; CHECK-NEXT: br label [[FOR_END40]] diff --git a/llvm/test/Transforms/IndVarSimplify/X86/eliminate-trunc.ll b/llvm/test/Transforms/IndVarSimplify/X86/eliminate-trunc.ll index 565ac5c..a506739 100644 --- a/llvm/test/Transforms/IndVarSimplify/X86/eliminate-trunc.ll +++ b/llvm/test/Transforms/IndVarSimplify/X86/eliminate-trunc.ll @@ -414,7 +414,7 @@ define void @test_08(i32 %n) { ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 ; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i64 [[IV]], [[SEXT]] -; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[IV]], [[ZEXT]] +; CHECK-NEXT: [[TMP1:%.*]] = icmp samesign ult i64 [[IV]], [[ZEXT]] ; CHECK-NEXT: [[CMP:%.*]] = and i1 [[TMP0]], [[TMP1]] ; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]] ; CHECK: exit: @@ -600,7 +600,7 @@ define void @test_13b(i32 %n) { ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 2 -; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i64 [[IV]], 1024 +; CHECK-NEXT: [[TMP0:%.*]] = icmp samesign ult i64 [[IV]], 1024 ; CHECK-NEXT: br i1 [[TMP0]], label [[LOOP]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void @@ -625,7 +625,7 @@ define void @test_13c(i32 %n) { ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 2 -; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i64 [[IV]], 1024 +; CHECK-NEXT: [[TMP0:%.*]] = icmp samesign ult i64 [[IV]], 1024 ; CHECK-NEXT: br i1 [[TMP0]], label [[LOOP]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void diff --git a/llvm/test/Transforms/IndVarSimplify/X86/inner-loop-by-latch-cond.ll b/llvm/test/Transforms/IndVarSimplify/X86/inner-loop-by-latch-cond.ll index 0eb9deb..0fa6e34 100644 --- a/llvm/test/Transforms/IndVarSimplify/X86/inner-loop-by-latch-cond.ll +++ b/llvm/test/Transforms/IndVarSimplify/X86/inner-loop-by-latch-cond.ll @@ -14,7 +14,6 @@ define void @test(i64 %a) { ; CHECK: outer_header: ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[OUTER_LATCH:%.*]] ], [ 21, [[ENTRY:%.*]] ] ; CHECK-NEXT: [[I:%.*]] = phi i64 [ 20, [[ENTRY]] ], [ [[I_NEXT:%.*]], [[OUTER_LATCH]] ] -; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 ; CHECK-NEXT: br label [[INNER_HEADER:%.*]] ; CHECK: inner_header: ; CHECK-NEXT: [[J:%.*]] = phi i64 [ 1, [[OUTER_HEADER]] ], [ [[J_NEXT:%.*]], [[INNER_HEADER]] ] @@ -23,6 +22,7 @@ define void @test(i64 %a) { ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[J_NEXT]], [[INDVARS_IV]] ; CHECK-NEXT: br i1 [[EXITCOND]], label [[INNER_HEADER]], label [[OUTER_LATCH]] ; CHECK: outer_latch: +; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 ; CHECK-NEXT: [[COND2:%.*]] = icmp ne i64 [[I_NEXT]], 40 ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 ; CHECK-NEXT: br i1 [[COND2]], label [[OUTER_HEADER]], label [[RETURN:%.*]] diff --git a/llvm/test/Transforms/IndVarSimplify/X86/iv-widen.ll b/llvm/test/Transforms/IndVarSimplify/X86/iv-widen.ll index cc0f258..45bb66d 100644 --- a/llvm/test/Transforms/IndVarSimplify/X86/iv-widen.ll +++ b/llvm/test/Transforms/IndVarSimplify/X86/iv-widen.ll @@ -16,7 +16,7 @@ declare void @use(i64 %x) define void @loop_0(ptr %a, i1 %arg) { ; CHECK-LABEL: @loop_0( ; CHECK-NEXT: Prologue: -; CHECK-NEXT: br i1 %arg, label [[B18_PREHEADER:%.*]], label [[B6:%.*]] +; CHECK-NEXT: br i1 [[ARG:%.*]], label [[B18_PREHEADER:%.*]], label [[B6:%.*]] ; CHECK: B18.preheader: ; CHECK-NEXT: br label [[B18:%.*]] ; CHECK: B18: @@ -70,7 +70,7 @@ exit24: ; preds = %B18 define void @loop_0_dead(ptr %a, i1 %arg) { ; CHECK-LABEL: @loop_0_dead( ; CHECK-NEXT: Prologue: -; CHECK-NEXT: br i1 %arg, label [[B18_PREHEADER:%.*]], label [[B6:%.*]] +; CHECK-NEXT: br i1 [[ARG:%.*]], label [[B18_PREHEADER:%.*]], label [[B6:%.*]] ; CHECK: B18.preheader: ; CHECK-NEXT: br label [[B18:%.*]] ; CHECK: B18: diff --git a/llvm/test/Transforms/IndVarSimplify/X86/pr59615.ll b/llvm/test/Transforms/IndVarSimplify/X86/pr59615.ll index 17b7b9d..1e5a415 100644 --- a/llvm/test/Transforms/IndVarSimplify/X86/pr59615.ll +++ b/llvm/test/Transforms/IndVarSimplify/X86/pr59615.ll @@ -7,7 +7,7 @@ target triple = "x86_64-unknown-linux-gnu" define void @test() { ; CHECK-LABEL: @test( ; CHECK-NEXT: bb: -; CHECK-NEXT: [[VAR:%.*]] = load atomic i32, ptr addrspace(1) poison unordered, align 8, !range [[RNG0:![0-9]+]], !invariant.load !1, !noundef !1 +; CHECK-NEXT: [[VAR:%.*]] = load atomic i32, ptr addrspace(1) poison unordered, align 8, !range [[RNG0:![0-9]+]], !invariant.load [[META1:![0-9]+]], !noundef [[META1]] ; CHECK-NEXT: [[VAR2:%.*]] = icmp eq i32 [[VAR]], 0 ; CHECK-NEXT: br i1 [[VAR2]], label [[BB18:%.*]], label [[BB19:%.*]] ; CHECK: bb3: @@ -16,9 +16,9 @@ define void @test() { ; CHECK: bb7: ; CHECK-NEXT: ret void ; CHECK: bb8: -; CHECK-NEXT: [[VAR9:%.*]] = load atomic i32, ptr addrspace(1) poison unordered, align 8, !range [[RNG0]], !invariant.load !1, !noundef !1 +; CHECK-NEXT: [[VAR9:%.*]] = load atomic i32, ptr addrspace(1) poison unordered, align 8, !range [[RNG0]], !invariant.load [[META1]], !noundef [[META1]] ; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[VAR9]] to i64 -; CHECK-NEXT: [[VAR10:%.*]] = icmp ult i64 [[INDVARS_IV]], [[TMP0]] +; CHECK-NEXT: [[VAR10:%.*]] = icmp samesign ult i64 [[INDVARS_IV]], [[TMP0]] ; CHECK-NEXT: br i1 [[VAR10]], label [[BB12]], label [[BB11:%.*]] ; CHECK: bb11: ; CHECK-NEXT: ret void diff --git a/llvm/test/Transforms/IndVarSimplify/backedge-on-min-max.ll b/llvm/test/Transforms/IndVarSimplify/backedge-on-min-max.ll index c4b9a4e..577edc3 100644 --- a/llvm/test/Transforms/IndVarSimplify/backedge-on-min-max.ll +++ b/llvm/test/Transforms/IndVarSimplify/backedge-on-min-max.ll @@ -535,7 +535,7 @@ define void @min.unsigned.3(ptr %a, i32 %n) { ; CHECK-NEXT: store i32 [[IDX]], ptr [[ADDR]], align 4 ; CHECK-NEXT: br label [[LATCH]] ; CHECK: latch: -; CHECK-NEXT: [[BE_COND:%.*]] = icmp ult i32 [[IDX_INC]], [[UMIN]] +; CHECK-NEXT: [[BE_COND:%.*]] = icmp samesign ult i32 [[IDX_INC]], [[UMIN]] ; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]] ; CHECK: exit.loopexit: ; CHECK-NEXT: br label [[EXIT]] @@ -586,7 +586,7 @@ define void @min.unsigned.4(ptr %a, i32 %n) { ; CHECK-NEXT: store i32 [[IDX]], ptr [[ADDR]], align 4 ; CHECK-NEXT: br label [[LATCH]] ; CHECK: latch: -; CHECK-NEXT: [[BE_COND:%.*]] = icmp ult i32 [[IDX_INC]], [[UMIN]] +; CHECK-NEXT: [[BE_COND:%.*]] = icmp samesign ult i32 [[IDX_INC]], [[UMIN]] ; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]] ; CHECK: exit.loopexit: ; CHECK-NEXT: br label [[EXIT]] diff --git a/llvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll b/llvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll index 4b52479..6ac09fa 100644 --- a/llvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll +++ b/llvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll @@ -21,7 +21,7 @@ define i32 @test_01(i32 %a, i32 %b, ptr %p) { ; CHECK-NEXT: store i32 [[A:%.*]], ptr [[P]], align 4 ; CHECK-NEXT: br label [[MERGE]] ; CHECK: merge: -; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[IV]], 100 +; CHECK-NEXT: [[CMP2:%.*]] = icmp samesign ult i32 [[IV]], 100 ; CHECK-NEXT: br i1 [[CMP2]], label [[B3:%.*]], label [[B4:%.*]] ; CHECK: b3: ; CHECK-NEXT: store i32 [[IV]], ptr [[P]], align 4 @@ -89,7 +89,7 @@ define i32 @test_02(i32 %a, i32 %b, ptr %p) { ; CHECK-NEXT: store i32 [[A:%.*]], ptr [[P]], align 4 ; CHECK-NEXT: br label [[MERGE]] ; CHECK: merge: -; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 100, [[IV]] +; CHECK-NEXT: [[CMP2:%.*]] = icmp samesign ugt i32 100, [[IV]] ; CHECK-NEXT: br i1 [[CMP2]], label [[B3:%.*]], label [[B4:%.*]] ; CHECK: b3: ; CHECK-NEXT: store i32 [[IV]], ptr [[P]], align 4 diff --git a/llvm/test/Transforms/IndVarSimplify/constant_result.ll b/llvm/test/Transforms/IndVarSimplify/constant_result.ll index 1eb5bb9..61c9b03 100644 --- a/llvm/test/Transforms/IndVarSimplify/constant_result.ll +++ b/llvm/test/Transforms/IndVarSimplify/constant_result.ll @@ -12,7 +12,7 @@ define i16 @foo() { ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [400 x i16], ptr @Y, i16 0, i16 [[I]] ; CHECK-NEXT: store i16 0, ptr [[ARRAYIDX]], align 1 ; CHECK-NEXT: [[INC]] = add nuw nsw i16 [[I]], 1 -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i16 [[INC]], 400 +; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i16 [[INC]], 400 ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]] ; CHECK: for.end: ; CHECK-NEXT: ret i16 400 diff --git a/llvm/test/Transforms/IndVarSimplify/cycled_phis.ll b/llvm/test/Transforms/IndVarSimplify/cycled_phis.ll index 9843a7e..42729fc 100644 --- a/llvm/test/Transforms/IndVarSimplify/cycled_phis.ll +++ b/llvm/test/Transforms/IndVarSimplify/cycled_phis.ll @@ -144,7 +144,7 @@ define i32 @start.from.sibling.iv(ptr %len.ptr, ptr %sibling.len.ptr) { ; CHECK-NEXT: br label [[SIBLING_LOOP:%.*]] ; CHECK: sibling.loop: ; CHECK-NEXT: [[SIBLING_IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[SIBLING_IV_NEXT:%.*]], [[SIBLING_BACKEDGE:%.*]] ] -; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp ult i32 [[SIBLING_IV]], [[SIBLING_LEN]] +; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp samesign ult i32 [[SIBLING_IV]], [[SIBLING_LEN]] ; CHECK-NEXT: br i1 [[SIBLING_RC]], label [[SIBLING_BACKEDGE]], label [[FAILED_SIBLING:%.*]] ; CHECK: sibling.backedge: ; CHECK-NEXT: [[SIBLING_IV_NEXT]] = add nuw nsw i32 [[SIBLING_IV]], 1 @@ -235,7 +235,7 @@ define i32 @start.from.sibling.iv.wide(ptr %len.ptr, ptr %sibling.len.ptr) { ; CHECK-NEXT: br label [[SIBLING_LOOP:%.*]] ; CHECK: sibling.loop: ; CHECK-NEXT: [[SIBLING_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[SIBLING_IV_NEXT:%.*]], [[SIBLING_BACKEDGE:%.*]] ] -; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp ult i64 [[SIBLING_IV]], [[SIBLING_LEN_WIDE]] +; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp samesign ult i64 [[SIBLING_IV]], [[SIBLING_LEN_WIDE]] ; CHECK-NEXT: br i1 [[SIBLING_RC]], label [[SIBLING_BACKEDGE]], label [[FAILED_SIBLING:%.*]] ; CHECK: sibling.backedge: ; CHECK-NEXT: [[SIBLING_IV_NEXT]] = add nuw nsw i64 [[SIBLING_IV]], 1 @@ -331,7 +331,7 @@ define i32 @start.from.sibling.iv.wide.cycled.phis(ptr %len.ptr, ptr %sibling.le ; CHECK-NEXT: br label [[SIBLING_LOOP:%.*]] ; CHECK: sibling.loop: ; CHECK-NEXT: [[SIBLING_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[SIBLING_IV_NEXT:%.*]], [[SIBLING_BACKEDGE:%.*]] ] -; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp ult i64 [[SIBLING_IV]], [[SIBLING_LEN_WIDE]] +; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp samesign ult i64 [[SIBLING_IV]], [[SIBLING_LEN_WIDE]] ; CHECK-NEXT: br i1 [[SIBLING_RC]], label [[SIBLING_BACKEDGE]], label [[FAILED_SIBLING:%.*]] ; CHECK: sibling.backedge: ; CHECK-NEXT: [[SIBLING_IV_NEXT]] = add nuw nsw i64 [[SIBLING_IV]], 1 @@ -449,7 +449,7 @@ define i32 @start.from.sibling.iv.wide.cycled.phis.complex.phis(ptr %len.ptr, pt ; CHECK-NEXT: br label [[SIBLING_LOOP:%.*]] ; CHECK: sibling.loop: ; CHECK-NEXT: [[SIBLING_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[SIBLING_IV_NEXT:%.*]], [[SIBLING_BACKEDGE:%.*]] ] -; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp ult i64 [[SIBLING_IV]], [[SIBLING_LEN_WIDE]] +; CHECK-NEXT: [[SIBLING_RC:%.*]] = icmp samesign ult i64 [[SIBLING_IV]], [[SIBLING_LEN_WIDE]] ; CHECK-NEXT: br i1 [[SIBLING_RC]], label [[SIBLING_BACKEDGE]], label [[FAILED_SIBLING:%.*]] ; CHECK: sibling.backedge: ; CHECK-NEXT: [[SIBLING_IV_NEXT]] = add nuw nsw i64 [[SIBLING_IV]], 1 diff --git a/llvm/test/Transforms/IndVarSimplify/debugloc-rem-subst.ll b/llvm/test/Transforms/IndVarSimplify/debugloc-rem-subst.ll index 121eec7..4502416 100644 --- a/llvm/test/Transforms/IndVarSimplify/debugloc-rem-subst.ll +++ b/llvm/test/Transforms/IndVarSimplify/debugloc-rem-subst.ll @@ -51,7 +51,7 @@ bb2: ; preds = %bb2, %bb1 !8 = !DILocation(line: 1, column: 1, scope: !5) ;. ; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C, file: [[META1:![0-9]+]], producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug) -; CHECK: [[META1]] = !DIFile(filename: "llvm/test/Transforms/IndVarSimplify/debugloc-rem-subst.ll", directory: {{.*}}) +; CHECK: [[META1]] = !DIFile(filename: "{{.*}}debugloc-rem-subst.ll", directory: {{.*}}) ; CHECK: [[DBG5]] = distinct !DISubprogram(name: "widget", linkageName: "widget", scope: null, file: [[META1]], line: 1, type: [[META6:![0-9]+]], scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: [[META0]]) ; CHECK: [[META6]] = !DISubroutineType(types: [[META7:![0-9]+]]) ; CHECK: [[META7]] = !{} diff --git a/llvm/test/Transforms/IndVarSimplify/dont-recompute.ll b/llvm/test/Transforms/IndVarSimplify/dont-recompute.ll index b4cd98c..6a809fe45 100644 --- a/llvm/test/Transforms/IndVarSimplify/dont-recompute.ll +++ b/llvm/test/Transforms/IndVarSimplify/dont-recompute.ll @@ -211,7 +211,7 @@ define void @test6(i32 %m, ptr %p) nounwind uwtable { ; CHECK-NEXT: [[ADD]] = add i32 [[A_05]], [[M:%.*]] ; CHECK-NEXT: [[SOFT_USE:%.*]] = add i32 [[ADD]], 123 ; CHECK-NEXT: [[PIDX:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 [[ADD]] -; CHECK-NEXT: store i32 [[SOFT_USE]], ptr [[PIDX]] +; CHECK-NEXT: store i32 [[SOFT_USE]], ptr [[PIDX]], align 4 ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_06]], 1 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 186 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]] diff --git a/llvm/test/Transforms/IndVarSimplify/eliminate-exit.ll b/llvm/test/Transforms/IndVarSimplify/eliminate-exit.ll index b246508..b20891d 100644 --- a/llvm/test/Transforms/IndVarSimplify/eliminate-exit.ll +++ b/llvm/test/Transforms/IndVarSimplify/eliminate-exit.ll @@ -193,7 +193,7 @@ define void @mixed_width(i32 %len) { ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 -; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i64 [[IV]], [[LEN_ZEXT]] +; CHECK-NEXT: [[CMP1:%.*]] = icmp samesign ult i64 [[IV]], [[LEN_ZEXT]] ; CHECK-NEXT: br i1 [[CMP1]], label [[BACKEDGE]], label [[EXIT:%.*]] ; CHECK: backedge: ; CHECK-NEXT: call void @side_effect() @@ -221,6 +221,220 @@ exit: } define void @many_exits([100 x i64] %len) { +; CHECK-LABEL: @many_exits( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[LEN1:%.*]] = extractvalue [100 x i64] [[LEN:%.*]], 1 +; CHECK-NEXT: [[LEN2:%.*]] = extractvalue [100 x i64] [[LEN]], 2 +; CHECK-NEXT: [[LEN3:%.*]] = extractvalue [100 x i64] [[LEN]], 3 +; CHECK-NEXT: [[LEN4:%.*]] = extractvalue [100 x i64] [[LEN]], 4 +; CHECK-NEXT: [[LEN5:%.*]] = extractvalue [100 x i64] [[LEN]], 5 +; CHECK-NEXT: [[LEN6:%.*]] = extractvalue [100 x i64] [[LEN]], 6 +; CHECK-NEXT: [[LEN7:%.*]] = extractvalue [100 x i64] [[LEN]], 7 +; CHECK-NEXT: [[LEN8:%.*]] = extractvalue [100 x i64] [[LEN]], 8 +; CHECK-NEXT: [[LEN9:%.*]] = extractvalue [100 x i64] [[LEN]], 9 +; CHECK-NEXT: [[LEN10:%.*]] = extractvalue [100 x i64] [[LEN]], 10 +; CHECK-NEXT: [[LEN11:%.*]] = extractvalue [100 x i64] [[LEN]], 11 +; CHECK-NEXT: [[LEN12:%.*]] = extractvalue [100 x i64] [[LEN]], 12 +; CHECK-NEXT: [[LEN13:%.*]] = extractvalue [100 x i64] [[LEN]], 13 +; CHECK-NEXT: [[LEN14:%.*]] = extractvalue [100 x i64] [[LEN]], 14 +; CHECK-NEXT: [[LEN15:%.*]] = extractvalue [100 x i64] [[LEN]], 15 +; CHECK-NEXT: [[LEN16:%.*]] = extractvalue [100 x i64] [[LEN]], 16 +; CHECK-NEXT: [[LEN17:%.*]] = extractvalue [100 x i64] [[LEN]], 17 +; CHECK-NEXT: [[LEN18:%.*]] = extractvalue [100 x i64] [[LEN]], 18 +; CHECK-NEXT: [[LEN19:%.*]] = extractvalue [100 x i64] [[LEN]], 19 +; CHECK-NEXT: [[LEN20:%.*]] = extractvalue [100 x i64] [[LEN]], 20 +; CHECK-NEXT: [[LEN21:%.*]] = extractvalue [100 x i64] [[LEN]], 21 +; CHECK-NEXT: [[LEN22:%.*]] = extractvalue [100 x i64] [[LEN]], 22 +; CHECK-NEXT: [[LEN23:%.*]] = extractvalue [100 x i64] [[LEN]], 23 +; CHECK-NEXT: [[LEN24:%.*]] = extractvalue [100 x i64] [[LEN]], 24 +; CHECK-NEXT: [[LEN25:%.*]] = extractvalue [100 x i64] [[LEN]], 25 +; CHECK-NEXT: [[LEN26:%.*]] = extractvalue [100 x i64] [[LEN]], 26 +; CHECK-NEXT: [[LEN27:%.*]] = extractvalue [100 x i64] [[LEN]], 27 +; CHECK-NEXT: [[LEN28:%.*]] = extractvalue [100 x i64] [[LEN]], 28 +; CHECK-NEXT: [[LEN29:%.*]] = extractvalue [100 x i64] [[LEN]], 29 +; CHECK-NEXT: [[LEN30:%.*]] = extractvalue [100 x i64] [[LEN]], 30 +; CHECK-NEXT: [[LEN31:%.*]] = extractvalue [100 x i64] [[LEN]], 31 +; CHECK-NEXT: [[LEN32:%.*]] = extractvalue [100 x i64] [[LEN]], 32 +; CHECK-NEXT: [[LEN33:%.*]] = extractvalue [100 x i64] [[LEN]], 33 +; CHECK-NEXT: [[LEN34:%.*]] = extractvalue [100 x i64] [[LEN]], 34 +; CHECK-NEXT: [[LEN35:%.*]] = extractvalue [100 x i64] [[LEN]], 35 +; CHECK-NEXT: [[LEN36:%.*]] = extractvalue [100 x i64] [[LEN]], 36 +; CHECK-NEXT: [[LEN37:%.*]] = extractvalue [100 x i64] [[LEN]], 37 +; CHECK-NEXT: [[LEN38:%.*]] = extractvalue [100 x i64] [[LEN]], 38 +; CHECK-NEXT: [[LEN39:%.*]] = extractvalue [100 x i64] [[LEN]], 39 +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] +; CHECK-NEXT: [[LEN0:%.*]] = extractvalue [100 x i64] [[LEN]], 0 +; CHECK-NEXT: [[EARLY0:%.*]] = icmp eq i64 [[IV]], [[LEN0]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY0]], label [[EXIT:%.*]], label [[CONT0:%.*]] +; CHECK: cont0: +; CHECK-NEXT: [[EARLY1:%.*]] = icmp eq i64 [[IV]], [[LEN1]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY1]], label [[EXIT]], label [[CONT1:%.*]] +; CHECK: cont1: +; CHECK-NEXT: [[EARLY2:%.*]] = icmp eq i64 [[IV]], [[LEN2]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY2]], label [[EXIT]], label [[CONT2:%.*]] +; CHECK: cont2: +; CHECK-NEXT: [[EARLY3:%.*]] = icmp eq i64 [[IV]], [[LEN3]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY3]], label [[EXIT]], label [[CONT3:%.*]] +; CHECK: cont3: +; CHECK-NEXT: [[EARLY4:%.*]] = icmp eq i64 [[IV]], [[LEN4]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY4]], label [[EXIT]], label [[CONT4:%.*]] +; CHECK: cont4: +; CHECK-NEXT: [[EARLY5:%.*]] = icmp eq i64 [[IV]], [[LEN5]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY5]], label [[EXIT]], label [[CONT5:%.*]] +; CHECK: cont5: +; CHECK-NEXT: [[EARLY6:%.*]] = icmp eq i64 [[IV]], [[LEN6]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY6]], label [[EXIT]], label [[CONT6:%.*]] +; CHECK: cont6: +; CHECK-NEXT: [[EARLY7:%.*]] = icmp eq i64 [[IV]], [[LEN7]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY7]], label [[EXIT]], label [[CONT7:%.*]] +; CHECK: cont7: +; CHECK-NEXT: [[EARLY8:%.*]] = icmp eq i64 [[IV]], [[LEN8]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY8]], label [[EXIT]], label [[CONT8:%.*]] +; CHECK: cont8: +; CHECK-NEXT: [[EARLY9:%.*]] = icmp eq i64 [[IV]], [[LEN9]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY9]], label [[EXIT]], label [[CONT9:%.*]] +; CHECK: cont9: +; CHECK-NEXT: [[EARLY10:%.*]] = icmp eq i64 [[IV]], [[LEN10]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY10]], label [[EXIT]], label [[CONT10:%.*]] +; CHECK: cont10: +; CHECK-NEXT: [[EARLY11:%.*]] = icmp eq i64 [[IV]], [[LEN11]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY11]], label [[EXIT]], label [[CONT11:%.*]] +; CHECK: cont11: +; CHECK-NEXT: [[EARLY12:%.*]] = icmp eq i64 [[IV]], [[LEN12]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY12]], label [[EXIT]], label [[CONT12:%.*]] +; CHECK: cont12: +; CHECK-NEXT: [[EARLY13:%.*]] = icmp eq i64 [[IV]], [[LEN13]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY13]], label [[EXIT]], label [[CONT13:%.*]] +; CHECK: cont13: +; CHECK-NEXT: [[EARLY14:%.*]] = icmp eq i64 [[IV]], [[LEN14]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY14]], label [[EXIT]], label [[CONT14:%.*]] +; CHECK: cont14: +; CHECK-NEXT: [[EARLY15:%.*]] = icmp eq i64 [[IV]], [[LEN15]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY15]], label [[EXIT]], label [[CONT15:%.*]] +; CHECK: cont15: +; CHECK-NEXT: [[EARLY16:%.*]] = icmp eq i64 [[IV]], [[LEN16]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY16]], label [[EXIT]], label [[CONT16:%.*]] +; CHECK: cont16: +; CHECK-NEXT: [[EARLY17:%.*]] = icmp eq i64 [[IV]], [[LEN17]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY17]], label [[EXIT]], label [[CONT17:%.*]] +; CHECK: cont17: +; CHECK-NEXT: [[EARLY18:%.*]] = icmp eq i64 [[IV]], [[LEN18]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY18]], label [[EXIT]], label [[CONT18:%.*]] +; CHECK: cont18: +; CHECK-NEXT: [[EARLY19:%.*]] = icmp eq i64 [[IV]], [[LEN19]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY19]], label [[EXIT]], label [[CONT19:%.*]] +; CHECK: cont19: +; CHECK-NEXT: [[EARLY20:%.*]] = icmp eq i64 [[IV]], [[LEN20]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY20]], label [[EXIT]], label [[CONT20:%.*]] +; CHECK: cont20: +; CHECK-NEXT: [[EARLY21:%.*]] = icmp eq i64 [[IV]], [[LEN21]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY21]], label [[EXIT]], label [[CONT21:%.*]] +; CHECK: cont21: +; CHECK-NEXT: [[EARLY22:%.*]] = icmp eq i64 [[IV]], [[LEN22]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY22]], label [[EXIT]], label [[CONT22:%.*]] +; CHECK: cont22: +; CHECK-NEXT: [[EARLY23:%.*]] = icmp eq i64 [[IV]], [[LEN23]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY23]], label [[EXIT]], label [[CONT23:%.*]] +; CHECK: cont23: +; CHECK-NEXT: [[EARLY24:%.*]] = icmp eq i64 [[IV]], [[LEN24]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY24]], label [[EXIT]], label [[CONT24:%.*]] +; CHECK: cont24: +; CHECK-NEXT: [[EARLY25:%.*]] = icmp eq i64 [[IV]], [[LEN25]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY25]], label [[EXIT]], label [[CONT25:%.*]] +; CHECK: cont25: +; CHECK-NEXT: [[EARLY26:%.*]] = icmp eq i64 [[IV]], [[LEN26]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY26]], label [[EXIT]], label [[CONT26:%.*]] +; CHECK: cont26: +; CHECK-NEXT: [[EARLY27:%.*]] = icmp eq i64 [[IV]], [[LEN27]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY27]], label [[EXIT]], label [[CONT27:%.*]] +; CHECK: cont27: +; CHECK-NEXT: [[EARLY28:%.*]] = icmp eq i64 [[IV]], [[LEN28]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY28]], label [[EXIT]], label [[CONT28:%.*]] +; CHECK: cont28: +; CHECK-NEXT: [[EARLY29:%.*]] = icmp eq i64 [[IV]], [[LEN29]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY29]], label [[EXIT]], label [[CONT29:%.*]] +; CHECK: cont29: +; CHECK-NEXT: [[EARLY30:%.*]] = icmp eq i64 [[IV]], [[LEN30]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY30]], label [[EXIT]], label [[CONT30:%.*]] +; CHECK: cont30: +; CHECK-NEXT: [[EARLY31:%.*]] = icmp eq i64 [[IV]], [[LEN31]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY31]], label [[EXIT]], label [[CONT31:%.*]] +; CHECK: cont31: +; CHECK-NEXT: [[EARLY32:%.*]] = icmp eq i64 [[IV]], [[LEN32]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY32]], label [[EXIT]], label [[CONT32:%.*]] +; CHECK: cont32: +; CHECK-NEXT: [[EARLY33:%.*]] = icmp eq i64 [[IV]], [[LEN33]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY33]], label [[EXIT]], label [[CONT33:%.*]] +; CHECK: cont33: +; CHECK-NEXT: [[EARLY34:%.*]] = icmp eq i64 [[IV]], [[LEN34]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY34]], label [[EXIT]], label [[CONT34:%.*]] +; CHECK: cont34: +; CHECK-NEXT: [[EARLY35:%.*]] = icmp eq i64 [[IV]], [[LEN35]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY35]], label [[EXIT]], label [[CONT35:%.*]] +; CHECK: cont35: +; CHECK-NEXT: [[EARLY36:%.*]] = icmp eq i64 [[IV]], [[LEN36]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY36]], label [[EXIT]], label [[CONT36:%.*]] +; CHECK: cont36: +; CHECK-NEXT: [[EARLY37:%.*]] = icmp eq i64 [[IV]], [[LEN37]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY37]], label [[EXIT]], label [[CONT37:%.*]] +; CHECK: cont37: +; CHECK-NEXT: [[EARLY38:%.*]] = icmp eq i64 [[IV]], [[LEN38]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY38]], label [[EXIT]], label [[CONT38:%.*]] +; CHECK: cont38: +; CHECK-NEXT: [[EARLY39:%.*]] = icmp eq i64 [[IV]], [[LEN39]] +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: br i1 [[EARLY39]], label [[EXIT]], label [[CONT39:%.*]] +; CHECK: cont39: +; CHECK-NEXT: br label [[BACKEDGE]] +; CHECK: backedge: +; CHECK-NEXT: call void @side_effect() +; CHECK-NEXT: [[CMP2:%.*]] = icmp samesign ult i64 [[IV]], 999 +; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 +; CHECK-NEXT: br i1 [[CMP2]], label [[LOOP]], label [[EXIT]] +; CHECK: exit: +; CHECK-NEXT: ret void +; entry: br label %loop loop: @@ -457,7 +671,7 @@ define i32 @exit_cond_depends_on_inner_loop() { ; CHECK-NEXT: br i1 [[OUTER_COND_1]], label [[EXIT:%.*]], label [[OUTER_LATCH]] ; CHECK: outer.latch: ; CHECK-NEXT: [[IV_OUTER_NEXT]] = add nuw nsw i32 [[IV_OUTER]], 1 -; CHECK-NEXT: [[OUTER_COND_2:%.*]] = icmp ult i32 [[IV_OUTER]], 100 +; CHECK-NEXT: [[OUTER_COND_2:%.*]] = icmp samesign ult i32 [[IV_OUTER]], 100 ; CHECK-NEXT: br i1 [[OUTER_COND_2]], label [[OUTER_HEADER]], label [[EXIT]] ; CHECK: exit: ; CHECK-NEXT: [[X_RES:%.*]] = phi i32 [ [[X_LCSSA]], [[OUTER_EXITING_1]] ], [ -1, [[OUTER_LATCH]] ] diff --git a/llvm/test/Transforms/IndVarSimplify/eliminate-sat.ll b/llvm/test/Transforms/IndVarSimplify/eliminate-sat.ll index 9fcfc7c..dc0e49e 100644 --- a/llvm/test/Transforms/IndVarSimplify/eliminate-sat.ll +++ b/llvm/test/Transforms/IndVarSimplify/eliminate-sat.ll @@ -13,7 +13,7 @@ define void @uadd_sat(ptr %p) { ; CHECK: loop: ; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[I_INC:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[SAT1:%.*]] = add nuw nsw i32 [[I]], 1 -; CHECK-NEXT: store volatile i32 [[SAT1]], ptr [[P:%.*]] +; CHECK-NEXT: store volatile i32 [[SAT1]], ptr [[P:%.*]], align 4 ; CHECK-NEXT: [[I_INC]] = add nuw nsw i32 [[I]], 1 ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[I_INC]], 100 ; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[END:%.*]] @@ -42,7 +42,7 @@ define void @sadd_sat(ptr %p) { ; CHECK: loop: ; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[I_INC:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[SAT1:%.*]] = add nuw nsw i32 [[I]], 1 -; CHECK-NEXT: store volatile i32 [[SAT1]], ptr [[P:%.*]] +; CHECK-NEXT: store volatile i32 [[SAT1]], ptr [[P:%.*]], align 4 ; CHECK-NEXT: [[I_INC]] = add nuw nsw i32 [[I]], 1 ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[I_INC]], 100 ; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[END:%.*]] @@ -71,7 +71,7 @@ define void @usub_sat(ptr %p) { ; CHECK: loop: ; CHECK-NEXT: [[I:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[I_INC:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[SAT1:%.*]] = sub nuw nsw i32 [[I]], 1 -; CHECK-NEXT: store volatile i32 [[SAT1]], ptr [[P:%.*]] +; CHECK-NEXT: store volatile i32 [[SAT1]], ptr [[P:%.*]], align 4 ; CHECK-NEXT: [[I_INC]] = add nuw nsw i32 [[I]], 1 ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[I_INC]], 100 ; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[END:%.*]] @@ -100,7 +100,7 @@ define void @ssub_sat(ptr %p) { ; CHECK: loop: ; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[I_INC:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[SAT1:%.*]] = sub nsw i32 [[I]], 1 -; CHECK-NEXT: store volatile i32 [[SAT1]], ptr [[P:%.*]] +; CHECK-NEXT: store volatile i32 [[SAT1]], ptr [[P:%.*]], align 4 ; CHECK-NEXT: [[I_INC]] = add nuw nsw i32 [[I]], 1 ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[I_INC]], 100 ; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[END:%.*]] diff --git a/llvm/test/Transforms/IndVarSimplify/exit-count-select.ll b/llvm/test/Transforms/IndVarSimplify/exit-count-select.ll index 829092f..1592b84 100644 --- a/llvm/test/Transforms/IndVarSimplify/exit-count-select.ll +++ b/llvm/test/Transforms/IndVarSimplify/exit-count-select.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt < %s -passes='require<scalar-evolution>,indvars,loop-mssa(licm)' -S | FileCheck %s +; RUN: opt < %s -passes=indvars -S | FileCheck %s define i32 @logical_and_2ops(i32 %n, i32 %m) { ; CHECK-LABEL: @logical_and_2ops( @@ -56,10 +56,10 @@ define i32 @logical_and_3ops(i32 %n, i32 %m, i32 %k) { ; CHECK: loop: ; CHECK-NEXT: br i1 false, label [[LOOP]], label [[EXIT:%.*]] ; CHECK: exit: +; CHECK-NEXT: [[TMP0:%.*]] = freeze i32 [[K:%.*]] ; CHECK-NEXT: [[TMP1:%.*]] = freeze i32 [[M:%.*]] -; CHECK-NEXT: [[N:%.*]] = freeze i32 [[K:%.*]] -; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP1]], i32 [[N]]) -; CHECK-NEXT: [[UMIN1:%.*]] = call i32 @llvm.umin.i32(i32 [[UMIN]], i32 [[N1:%.*]]) +; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP0]], i32 [[TMP1]]) +; CHECK-NEXT: [[UMIN1:%.*]] = call i32 @llvm.umin.i32(i32 [[UMIN]], i32 [[N:%.*]]) ; CHECK-NEXT: ret i32 [[UMIN1]] ; entry: @@ -84,10 +84,10 @@ define i32 @logical_or_3ops(i32 %n, i32 %m, i32 %k) { ; CHECK: loop: ; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[LOOP]] ; CHECK: exit: +; CHECK-NEXT: [[TMP0:%.*]] = freeze i32 [[K:%.*]] ; CHECK-NEXT: [[TMP1:%.*]] = freeze i32 [[M:%.*]] -; CHECK-NEXT: [[N:%.*]] = freeze i32 [[K:%.*]] -; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP1]], i32 [[N]]) -; CHECK-NEXT: [[UMIN1:%.*]] = call i32 @llvm.umin.i32(i32 [[UMIN]], i32 [[N1:%.*]]) +; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP0]], i32 [[TMP1]]) +; CHECK-NEXT: [[UMIN1:%.*]] = call i32 @llvm.umin.i32(i32 [[UMIN]], i32 [[N:%.*]]) ; CHECK-NEXT: ret i32 [[UMIN1]] ; entry: diff --git a/llvm/test/Transforms/IndVarSimplify/exit_value_tests.ll b/llvm/test/Transforms/IndVarSimplify/exit_value_tests.ll index 66a4cbb..52be86c 100644 --- a/llvm/test/Transforms/IndVarSimplify/exit_value_tests.ll +++ b/llvm/test/Transforms/IndVarSimplify/exit_value_tests.ll @@ -201,7 +201,7 @@ define i32 @neg_unroll_phi_select_constant_nonzero(i32 %arg) { ; CHECK-NEXT: [[SELECTOR:%.*]] = phi i32 [ [[ARG:%.*]], [[ENTRY]] ], [ [[F:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[F]] = call i32 @f() ; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i32 [[I]], 1 -; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[I]], 4 +; CHECK-NEXT: [[C:%.*]] = icmp samesign ult i32 [[I]], 4 ; CHECK-NEXT: br i1 [[C]], label [[LOOP]], label [[LOOPEXIT:%.*]] ; CHECK: loopexit: ; CHECK-NEXT: [[SELECTOR_LCSSA:%.*]] = phi i32 [ [[SELECTOR]], [[LOOP]] ] diff --git a/llvm/test/Transforms/IndVarSimplify/finite-exit-comparisons.ll b/llvm/test/Transforms/IndVarSimplify/finite-exit-comparisons.ll index f798eb28..e006d9f 100644 --- a/llvm/test/Transforms/IndVarSimplify/finite-exit-comparisons.ll +++ b/llvm/test/Transforms/IndVarSimplify/finite-exit-comparisons.ll @@ -932,9 +932,6 @@ for.end: ; preds = %for.body, %entry define i16 @ult_multiuse_profit(i16 %n.raw, i8 %start) mustprogress { ; CHECK-LABEL: @ult_multiuse_profit( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[START:%.*]], 1 -; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[TMP2]] to i16 -; CHECK-NEXT: [[UMAX:%.*]] = call i16 @llvm.umax.i16(i16 [[TMP1]], i16 254) ; CHECK-NEXT: [[TMP0:%.*]] = trunc i16 254 to i8 ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ; CHECK: for.body: @@ -943,6 +940,9 @@ define i16 @ult_multiuse_profit(i16 %n.raw, i8 %start) mustprogress { ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[IV_NEXT]], [[TMP0]] ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]] ; CHECK: for.end: +; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[START:%.*]], 1 +; CHECK-NEXT: [[TMP2:%.*]] = zext i8 [[TMP1]] to i16 +; CHECK-NEXT: [[UMAX:%.*]] = call i16 @llvm.umax.i16(i16 [[TMP2]], i16 254) ; CHECK-NEXT: ret i16 [[UMAX]] ; entry: diff --git a/llvm/test/Transforms/IndVarSimplify/floating-point-iv.ll b/llvm/test/Transforms/IndVarSimplify/floating-point-iv.ll index b1ef503..a01c032 100644 --- a/llvm/test/Transforms/IndVarSimplify/floating-point-iv.ll +++ b/llvm/test/Transforms/IndVarSimplify/floating-point-iv.ll @@ -417,3 +417,163 @@ loop: exit: ret void } + +define void @test_fp_to_int_irrealizable_initval() { +; CHECK-LABEL: @test_fp_to_int_irrealizable_initval( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi float [ 1.000000e+08, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] +; CHECK-NEXT: call void @opaque() +; CHECK-NEXT: [[IV_NEXT]] = fadd float [[IV]], -1.700000e+01 +; CHECK-NEXT: [[CMP:%.*]] = fcmp ult float [[IV_NEXT]], 2.500000e+01 +; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]] +; CHECK: exit: +; CHECK-NEXT: ret void +; +entry: + br label %loop + +loop: + %iv = phi float [ 1.000000e+08, %entry ], [ %iv.next, %loop ] + call void @opaque() + %iv.next = fadd float %iv, -1.700000e+01 + %cmp = fcmp ult float %iv.next, 2.500000e+01 + br i1 %cmp, label %exit, label %loop + +exit: + ret void +} + +define void @test_fp_to_int_irrealizable_exitval() { +; CHECK-LABEL: @test_fp_to_int_irrealizable_exitval( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi float [ 2.500000e+01, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] +; CHECK-NEXT: call void @opaque() +; CHECK-NEXT: [[IV_NEXT]] = fadd float [[IV]], 1.700000e+01 +; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt float [[IV_NEXT]], 1.000000e+08 +; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]] +; CHECK: exit: +; CHECK-NEXT: ret void +; +entry: + br label %loop + +loop: + %iv = phi float [ 2.500000e+01, %entry ], [ %iv.next, %loop ] + call void @opaque() + %iv.next = fadd float %iv, 1.700000e+01 + %cmp = fcmp ugt float %iv.next, 1.000000e+08 + br i1 %cmp, label %exit, label %loop + +exit: + ret void +} + +define void @test_fp_to_int_irrealizable_negative_exitval() { +; CHECK-LABEL: @test_fp_to_int_irrealizable_negative_exitval( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi float [ -2.500000e+01, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] +; CHECK-NEXT: call void @opaque() +; CHECK-NEXT: [[IV_NEXT]] = fadd float [[IV]], -1.700000e+01 +; CHECK-NEXT: [[CMP:%.*]] = fcmp ult float [[IV_NEXT]], -1.000000e+08 +; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]] +; CHECK: exit: +; CHECK-NEXT: ret void +; +entry: + br label %loop + +loop: + %iv = phi float [ -2.500000e+01, %entry ], [ %iv.next, %loop ] + call void @opaque() + %iv.next = fadd float %iv, -1.700000e+01 + %cmp = fcmp ult float %iv.next, -1.000000e+08 + br i1 %cmp, label %exit, label %loop + +exit: + ret void +} + +define void @test_fp_to_int_irrealizable_exitval_pow_2_24() { +; CHECK-LABEL: @test_fp_to_int_irrealizable_exitval_pow_2_24( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi float [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] +; CHECK-NEXT: call void @opaque() +; CHECK-NEXT: [[IV_NEXT]] = fadd float [[IV]], 1.000000e+00 +; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt float [[IV_NEXT]], 0x4170000000000000 +; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]] +; CHECK: exit: +; CHECK-NEXT: ret void +; +entry: + br label %loop + +loop: + %iv = phi float [ 0.000000e+00, %entry ], [ %iv.next, %loop ] + call void @opaque() + %iv.next = fadd float %iv, 1.000000e+00 + %cmp = fcmp ugt float %iv.next, 0x4170000000000000 + br i1 %cmp, label %exit, label %loop + +exit: + ret void +} + +define void @test_fp_to_int_irrealizable_exitval_int64_min() { +; CHECK-LABEL: @test_fp_to_int_irrealizable_exitval_int64_min( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi double [ 2.500000e+01, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] +; CHECK-NEXT: call void @opaque() +; CHECK-NEXT: [[IV_NEXT]] = fadd double [[IV]], 1.700000e+01 +; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[IV_NEXT]], 0xC3E0000000000000 +; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]] +; CHECK: exit: +; CHECK-NEXT: ret void +; +entry: + br label %loop + +loop: + %iv = phi double [ 2.500000e+01, %entry ], [ %iv.next, %loop ] + call void @opaque() + %iv.next = fadd double %iv, 1.700000e+01 + %cmp = fcmp ult double %iv.next, 0xC3E0000000000000 + br i1 %cmp, label %exit, label %loop + +exit: + ret void +} + +define void @test_fp_recurrence_cmp_used_by_select() { +; CHECK-LABEL: @test_fp_recurrence_cmp_used_by_select( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: br i1 false, label [[LOOP]], label [[EXIT:%.*]] +; CHECK: exit: +; CHECK-NEXT: ret void +; +entry: + br label %loop + +loop: + %fp.iv = phi double [ 0.0, %entry ], [ %fp.iv.next, %loop ] + %fp.iv.next = fadd double %fp.iv, 1.250000e-02 + %cmp.fp = fcmp olt double %fp.iv.next, 2.001250e+00 + %cond = select i1 %cmp.fp, i1 false, i1 false + br i1 %cond, label %loop, label %exit + +exit: + ret void +} + +declare void @opaque() diff --git a/llvm/test/Transforms/IndVarSimplify/floating-point-small-iv.ll b/llvm/test/Transforms/IndVarSimplify/floating-point-small-iv.ll index d2c7cc4..07c9d35 100644 --- a/llvm/test/Transforms/IndVarSimplify/floating-point-small-iv.ll +++ b/llvm/test/Transforms/IndVarSimplify/floating-point-small-iv.ll @@ -13,7 +13,7 @@ define void @sitofp_fptosi_range() { ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[IDXPROM]] ; CHECK-NEXT: store i32 [[IV_INT]], ptr [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[DEC_INT]] = add nsw i32 [[IV_INT]], -1 -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[DEC_INT]], 0 +; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[DEC_INT]], 0 ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]] ; CHECK: cleanup: ; CHECK-NEXT: ret void @@ -49,7 +49,7 @@ define void @sitofp_fptosi_range_overflow() { ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[IDXPROM]] ; CHECK-NEXT: store i32 [[CONV]], ptr [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[DEC_INT]] = add nsw i32 [[IV_INT]], -1 -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[DEC_INT]], 0 +; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[DEC_INT]], 0 ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]] ; CHECK: cleanup: ; CHECK-NEXT: ret void @@ -84,7 +84,7 @@ define void @sitofp_fptosi_range_trunc() { ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[IV_INT]] ; CHECK-NEXT: store i32 [[IV_INT_TRUNC]], ptr [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[DEC_INT]] = add nsw i64 [[IV_INT]], -1 -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[DEC_INT]], 0 +; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i64 [[DEC_INT]], 0 ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]] ; CHECK: cleanup: ; CHECK-NEXT: ret void @@ -155,7 +155,7 @@ define void @sitofp_fptoui_range_zext() { ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[IV_INT_ZEXT]] ; CHECK-NEXT: store i32 [[IV_INT_ZEXT1]], ptr [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[DEC_INT]] = add nsw i16 [[IV_INT]], -1 -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i16 [[DEC_INT]], 0 +; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i16 [[DEC_INT]], 0 ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]] ; CHECK: cleanup: ; CHECK-NEXT: ret void @@ -191,7 +191,7 @@ define void @sitofp_fptoui_range_zext_postinc() { ; CHECK-NEXT: [[INC_INT_ZEXT:%.*]] = zext i16 [[INC_INT]] to i64 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[INC_INT_ZEXT]] ; CHECK-NEXT: store i32 [[INC_INT_ZEXT1]], ptr [[ARRAYIDX]], align 4 -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i16 [[INC_INT]], 200 +; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i16 [[INC_INT]], 200 ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]] ; CHECK: cleanup: ; CHECK-NEXT: ret void @@ -227,7 +227,7 @@ define void @uitofp_fptosi_range_zext() { ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[IV_INT_ZEXT]] ; CHECK-NEXT: store i32 [[IV_INT_ZEXT1]], ptr [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[INC_INT]] = add nuw nsw i16 [[IV_INT]], 2 -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i16 [[INC_INT]], 200 +; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i16 [[INC_INT]], 200 ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]] ; CHECK: cleanup: ; CHECK-NEXT: ret void @@ -329,7 +329,7 @@ define void @uitofp_fptoui_range () { ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[IDXPROM]] ; CHECK-NEXT: store i32 [[IV_INT]], ptr [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[DEC_INT]] = add nsw i32 [[IV_INT]], -1 -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[DEC_INT]], 3 +; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[DEC_INT]], 3 ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]] ; CHECK: cleanup: ; CHECK-NEXT: ret void @@ -390,7 +390,7 @@ define void @uitofp_fptosi_range () { ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [16777219 x i32], ptr @array, i64 0, i64 [[IDXPROM]] ; CHECK-NEXT: store i32 [[IV_INT]], ptr [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[DEC_INT]] = add nsw i32 [[IV_INT]], -1 -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[DEC_INT]], 3 +; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[DEC_INT]], 3 ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[CLEANUP:%.*]] ; CHECK: cleanup: ; CHECK-NEXT: ret void diff --git a/llvm/test/Transforms/IndVarSimplify/invalidate-modified-lcssa-phi.ll b/llvm/test/Transforms/IndVarSimplify/invalidate-modified-lcssa-phi.ll index 0538c1c..72c292a 100644 --- a/llvm/test/Transforms/IndVarSimplify/invalidate-modified-lcssa-phi.ll +++ b/llvm/test/Transforms/IndVarSimplify/invalidate-modified-lcssa-phi.ll @@ -133,7 +133,7 @@ define i16 @test_pr58515_invalidate_loop_disposition(ptr %a) { ; CHECK-NEXT: [[SUM:%.*]] = phi i16 [ 0, [[ENTRY]] ], [ [[SUM_NEXT:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[SUM_NEXT]] = add i16 [[SEL]], [[SUM]] ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i16 [[IV]], 1 -; CHECK-NEXT: [[C_2:%.*]] = icmp ult i16 [[IV]], 9 +; CHECK-NEXT: [[C_2:%.*]] = icmp samesign ult i16 [[IV]], 9 ; CHECK-NEXT: br i1 [[C_2]], label [[LOOP]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: [[LCSSA:%.*]] = phi i16 [ [[SUM_NEXT]], [[LOOP]] ] diff --git a/llvm/test/Transforms/IndVarSimplify/loop-guard-order.ll b/llvm/test/Transforms/IndVarSimplify/loop-guard-order.ll index 14ee00d..2763860 100644 --- a/llvm/test/Transforms/IndVarSimplify/loop-guard-order.ll +++ b/llvm/test/Transforms/IndVarSimplify/loop-guard-order.ll @@ -114,7 +114,7 @@ define i32 @urem_order1(i32 %n) { ; CHECK: [[LOOP]]: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], %[[LOOP]] ], [ 0, %[[LOOP_PREHEADER]] ] ; CHECK-NEXT: call void @foo() -; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 3 +; CHECK-NEXT: [[IV_NEXT]] = add nuw i32 [[IV]], 3 ; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]] ; CHECK-NEXT: br i1 [[EC]], label %[[EXIT_LOOPEXIT:.*]], label %[[LOOP]] ; CHECK: [[EXIT_LOOPEXIT]]: @@ -205,13 +205,12 @@ define i64 @test_loop_with_div_order_1(i64 %n) { ; CHECK-NEXT: [[PARITY_CHECK:%.*]] = icmp eq i64 [[IS_ODD]], 0 ; CHECK-NEXT: br i1 [[PARITY_CHECK]], label %[[LOOP_PREHEADER:.*]], label %[[EXIT]] ; CHECK: [[LOOP_PREHEADER]]: -; CHECK-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[UPPER_BOUND]], i64 1) ; CHECK-NEXT: br label %[[LOOP:.*]] ; CHECK: [[LOOP]]: ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], %[[LOOP]] ], [ 0, %[[LOOP_PREHEADER]] ] ; CHECK-NEXT: [[DUMMY:%.*]] = load volatile i64, ptr null, align 8 ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 -; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[IV_NEXT]], [[UMAX]] +; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[IV_NEXT]], [[UPPER_BOUND]] ; CHECK-NEXT: br i1 [[EXITCOND]], label %[[LOOP]], label %[[EXIT_LOOPEXIT:.*]] ; CHECK: [[EXIT_LOOPEXIT]]: ; CHECK-NEXT: br label %[[EXIT]] diff --git a/llvm/test/Transforms/IndVarSimplify/loop-predication.ll b/llvm/test/Transforms/IndVarSimplify/loop-predication.ll index 3246220..8ccd227 100644 --- a/llvm/test/Transforms/IndVarSimplify/loop-predication.ll +++ b/llvm/test/Transforms/IndVarSimplify/loop-predication.ll @@ -659,7 +659,7 @@ define i32 @different_ivs(ptr %array, i32 %length, i32 %n) { ; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4 ; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]] ; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 -; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i64 [[I_NEXT]], [[N64]] +; CHECK-NEXT: [[CONTINUE:%.*]] = icmp samesign ult i64 [[I_NEXT]], [[N64]] ; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ] @@ -722,7 +722,7 @@ define i32 @different_ivs2(ptr %array, i32 %length, i32 %n) { ; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]] ; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 ; CHECK-NEXT: [[J_NEXT]] = sub nuw i32 [[J]], 1 -; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i64 [[I_NEXT]], [[N64]] +; CHECK-NEXT: [[CONTINUE:%.*]] = icmp samesign ult i64 [[I_NEXT]], [[N64]] ; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]] ; CHECK: exit.loopexit: ; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ] diff --git a/llvm/test/Transforms/IndVarSimplify/monotonic_checks.ll b/llvm/test/Transforms/IndVarSimplify/monotonic_checks.ll index a1c07b0a..1f8bf5f 100644 --- a/llvm/test/Transforms/IndVarSimplify/monotonic_checks.ll +++ b/llvm/test/Transforms/IndVarSimplify/monotonic_checks.ll @@ -6,7 +6,7 @@ define i32 @test_01(ptr %p) { ; CHECK-LABEL: @test_01( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, [[RNG0:!range !.*]] +; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, !range [[RNG0:![0-9]+]] ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] @@ -45,7 +45,7 @@ exit: define i32 @test_01_neg(ptr %p) { ; CHECK-LABEL: @test_01_neg( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, [[RNG0]] +; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, !range [[RNG0]] ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] @@ -86,7 +86,7 @@ exit: define i32 @test_02(ptr %p) { ; CHECK-LABEL: @test_02( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, [[RNG1:!range !.*]] +; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, !range [[RNG1:![0-9]+]] ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] @@ -125,7 +125,7 @@ exit: define i32 @test_02_neg(ptr %p) { ; CHECK-LABEL: @test_02_neg( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, [[RNG1]] +; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, !range [[RNG1]] ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] @@ -164,7 +164,7 @@ exit: define i32 @test_03(ptr %p) { ; CHECK-LABEL: @test_03( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, [[RNG2:!range !.*]] +; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, !range [[RNG2:![0-9]+]] ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] @@ -202,7 +202,7 @@ exit: define i32 @test_04(ptr %p) { ; CHECK-LABEL: @test_04( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, [[RNG2]] +; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, !range [[RNG2]] ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] diff --git a/llvm/test/Transforms/IndVarSimplify/negative_ranges.ll b/llvm/test/Transforms/IndVarSimplify/negative_ranges.ll index b7c7457..4acc5b0 100644 --- a/llvm/test/Transforms/IndVarSimplify/negative_ranges.ll +++ b/llvm/test/Transforms/IndVarSimplify/negative_ranges.ll @@ -11,7 +11,7 @@ define i32 @test_01(ptr %p, ptr %s) { ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] -; CHECK-NEXT: [[C1:%.*]] = icmp slt i32 [[IV]], [[END]] +; CHECK-NEXT: [[C1:%.*]] = icmp samesign ult i32 [[IV]], [[END]] ; CHECK-NEXT: br i1 [[C1]], label [[GUARDED:%.*]], label [[SIDE_EXIT:%.*]] ; CHECK: guarded: ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[SIDE_EXIT]] @@ -58,7 +58,7 @@ define i32 @test_02(ptr %p, ptr %s) { ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] -; CHECK-NEXT: [[C1:%.*]] = icmp ult i32 [[IV]], [[END]] +; CHECK-NEXT: [[C1:%.*]] = icmp samesign ult i32 [[IV]], [[END]] ; CHECK-NEXT: br i1 [[C1]], label [[GUARDED:%.*]], label [[SIDE_EXIT:%.*]] ; CHECK: guarded: ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[SIDE_EXIT]] diff --git a/llvm/test/Transforms/IndVarSimplify/post-inc-range.ll b/llvm/test/Transforms/IndVarSimplify/post-inc-range.ll index bbdee02..6d0451a 100644 --- a/llvm/test/Transforms/IndVarSimplify/post-inc-range.ll +++ b/llvm/test/Transforms/IndVarSimplify/post-inc-range.ll @@ -121,7 +121,7 @@ define void @test_range_metadata(ptr %array_length_ptr, ptr %base, ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ [[TMP0]], [[FOR_BODY_LR_PH:%.*]] ] ; CHECK-NEXT: [[ARRAY_LENGTH:%.*]] = load i32, ptr [[ARRAY_LENGTH_PTR:%.*]], align 4, !range [[RNG0:![0-9]+]] ; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[ARRAY_LENGTH]] to i64 -; CHECK-NEXT: [[WITHIN_LIMITS:%.*]] = icmp ult i64 [[INDVARS_IV]], [[TMP2]] +; CHECK-NEXT: [[WITHIN_LIMITS:%.*]] = icmp samesign ult i64 [[INDVARS_IV]], [[TMP2]] ; CHECK-NEXT: br i1 [[WITHIN_LIMITS]], label [[CONTINUE:%.*]], label [[FOR_END:%.*]] ; CHECK: continue: ; CHECK-NEXT: br label [[FOR_INC]] @@ -174,7 +174,7 @@ define void @test_neg(ptr %array_length_ptr, ptr %base, ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ [[TMP0]], [[FOR_BODY_LR_PH:%.*]] ] ; CHECK-NEXT: [[ARRAY_LENGTH:%.*]] = load i32, ptr [[ARRAY_LENGTH_PTR:%.*]], align 4 ; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[ARRAY_LENGTH]] to i64 -; CHECK-NEXT: [[WITHIN_LIMITS:%.*]] = icmp ult i64 [[INDVARS_IV]], [[TMP1]] +; CHECK-NEXT: [[WITHIN_LIMITS:%.*]] = icmp samesign ult i64 [[INDVARS_IV]], [[TMP1]] ; CHECK-NEXT: br i1 [[WITHIN_LIMITS]], label [[CONTINUE:%.*]], label [[FOR_END:%.*]] ; CHECK: continue: ; CHECK-NEXT: br label [[FOR_INC]] @@ -232,7 +232,7 @@ define void @test_transitive_use(ptr %base, i32 %limit, i32 %start) { ; CHECK-NEXT: br i1 [[EXITCOND]], label [[CONTINUE:%.*]], label [[FOR_END:%.*]] ; CHECK: continue: ; CHECK-NEXT: [[TMP3:%.*]] = mul nuw nsw i64 [[INDVARS_IV]], 3 -; CHECK-NEXT: [[MUL_WITHIN:%.*]] = icmp ult i64 [[TMP3]], 64 +; CHECK-NEXT: [[MUL_WITHIN:%.*]] = icmp samesign ult i64 [[TMP3]], 64 ; CHECK-NEXT: br i1 [[MUL_WITHIN]], label [[GUARDED:%.*]], label [[CONTINUE_2:%.*]] ; CHECK: guarded: ; CHECK-NEXT: [[TMP4:%.*]] = add nuw nsw i64 [[TMP3]], 1 @@ -297,7 +297,7 @@ define void @test_guard_one_bb(ptr %base, i32 %limit, i32 %start) { ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ; CHECK: for.body: ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ [[TMP0]], [[FOR_BODY_LR_PH:%.*]] ] -; CHECK-NEXT: [[WITHIN_LIMITS:%.*]] = icmp ult i64 [[INDVARS_IV]], 64 +; CHECK-NEXT: [[WITHIN_LIMITS:%.*]] = icmp samesign ult i64 [[INDVARS_IV]], 64 ; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_LIMITS]]) [ "deopt"() ] ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT]], [[TMP1]] @@ -337,7 +337,7 @@ define void @test_guard_in_the_same_bb(ptr %base, i32 %limit, i32 %start) { ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ; CHECK: for.body: ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ [[TMP0]], [[FOR_BODY_LR_PH:%.*]] ] -; CHECK-NEXT: [[WITHIN_LIMITS:%.*]] = icmp ult i64 [[INDVARS_IV]], 64 +; CHECK-NEXT: [[WITHIN_LIMITS:%.*]] = icmp samesign ult i64 [[INDVARS_IV]], 64 ; CHECK-NEXT: br label [[FOR_INC]] ; CHECK: for.inc: ; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_LIMITS]]) [ "deopt"() ] @@ -382,7 +382,7 @@ define void @test_guard_in_idom(ptr %base, i32 %limit, i32 %start) { ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ; CHECK: for.body: ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ [[TMP0]], [[FOR_BODY_LR_PH:%.*]] ] -; CHECK-NEXT: [[WITHIN_LIMITS:%.*]] = icmp ult i64 [[INDVARS_IV]], 64 +; CHECK-NEXT: [[WITHIN_LIMITS:%.*]] = icmp samesign ult i64 [[INDVARS_IV]], 64 ; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_LIMITS]]) [ "deopt"() ] ; CHECK-NEXT: br label [[FOR_INC]] ; CHECK: for.inc: @@ -427,9 +427,9 @@ define void @test_guard_merge_ranges(ptr %base, i32 %limit, i32 %start) { ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ; CHECK: for.body: ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ [[TMP0]], [[FOR_BODY_LR_PH:%.*]] ] -; CHECK-NEXT: [[WITHIN_LIMITS_1:%.*]] = icmp ult i64 [[INDVARS_IV]], 64 +; CHECK-NEXT: [[WITHIN_LIMITS_1:%.*]] = icmp samesign ult i64 [[INDVARS_IV]], 64 ; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_LIMITS_1]]) [ "deopt"() ] -; CHECK-NEXT: [[WITHIN_LIMITS_2:%.*]] = icmp ult i64 [[INDVARS_IV]], 2147483647 +; CHECK-NEXT: [[WITHIN_LIMITS_2:%.*]] = icmp samesign ult i64 [[INDVARS_IV]], 2147483647 ; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_LIMITS_2]]) [ "deopt"() ] ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT]], [[TMP1]] diff --git a/llvm/test/Transforms/IndVarSimplify/pr116483.ll b/llvm/test/Transforms/IndVarSimplify/pr116483.ll index e9e0d22..093e25a 100644 --- a/llvm/test/Transforms/IndVarSimplify/pr116483.ll +++ b/llvm/test/Transforms/IndVarSimplify/pr116483.ll @@ -4,16 +4,16 @@ define i32 @test() { ; CHECK-LABEL: define i32 @test() { ; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br label %[[LOOP_BODY:.*]] +; CHECK: [[LOOP_BODY]]: +; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[LOOP_BODY]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: [[XOR:%.*]] = xor i32 0, 3 ; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[XOR]], 329 ; CHECK-NEXT: [[CONV:%.*]] = trunc i32 [[MUL]] to i16 ; CHECK-NEXT: [[SEXT:%.*]] = shl i16 [[CONV]], 8 ; CHECK-NEXT: [[CONV1:%.*]] = ashr i16 [[SEXT]], 8 ; CHECK-NEXT: [[CONV3:%.*]] = zext i16 [[CONV1]] to i32 -; CHECK-NEXT: br label %[[LOOP_BODY:.*]] -; CHECK: [[LOOP_BODY]]: -; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[LOOP_BODY]] -; CHECK: [[EXIT]]: ; CHECK-NEXT: ret i32 [[CONV3]] ; entry: diff --git a/llvm/test/Transforms/IndVarSimplify/pr24783.ll b/llvm/test/Transforms/IndVarSimplify/pr24783.ll index 37ecf42..c521bca 100644 --- a/llvm/test/Transforms/IndVarSimplify/pr24783.ll +++ b/llvm/test/Transforms/IndVarSimplify/pr24783.ll @@ -7,11 +7,11 @@ target triple = "powerpc64-unknown-linux-gnu" define void @f(ptr %end.s, ptr %loc, i32 %p) { ; CHECK-LABEL: @f( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[END:%.*]] = getelementptr inbounds i32, ptr [[END_S:%.*]], i32 [[P:%.*]] ; CHECK-NEXT: br label [[WHILE_BODY_I:%.*]] ; CHECK: while.body.i: ; CHECK-NEXT: br i1 true, label [[LOOP_EXIT:%.*]], label [[WHILE_BODY_I]] ; CHECK: loop.exit: +; CHECK-NEXT: [[END:%.*]] = getelementptr inbounds i32, ptr [[END_S:%.*]], i32 [[P:%.*]] ; CHECK-NEXT: store ptr [[END]], ptr [[LOC:%.*]], align 8 ; CHECK-NEXT: ret void ; diff --git a/llvm/test/Transforms/IndVarSimplify/pr38674.ll b/llvm/test/Transforms/IndVarSimplify/pr38674.ll index e701c4d..3b8197a 100644 --- a/llvm/test/Transforms/IndVarSimplify/pr38674.ll +++ b/llvm/test/Transforms/IndVarSimplify/pr38674.ll @@ -81,7 +81,7 @@ define i32 @test_02(i32 %x) { ; CHECK-NEXT: [[ZEXT:%.*]] = mul i32 [[X:%.*]], 1 ; CHECK-NEXT: br label [[FOR_BODY6:%.*]] ; CHECK: for.cond4: -; CHECK-NEXT: [[CMP5:%.*]] = icmp ult i32 [[INC:%.*]], 2 +; CHECK-NEXT: [[CMP5:%.*]] = icmp samesign ult i32 [[INC:%.*]], 2 ; CHECK-NEXT: br i1 [[CMP5]], label [[FOR_BODY6]], label [[FOR_END:%.*]] ; CHECK: for.body6: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[FOR_COND4_PREHEADER]] ], [ [[INC]], [[FOR_COND4:%.*]] ] diff --git a/llvm/test/Transforms/IndVarSimplify/pr39673.ll b/llvm/test/Transforms/IndVarSimplify/pr39673.ll index 3cee1ab..27ada6b 100644 --- a/llvm/test/Transforms/IndVarSimplify/pr39673.ll +++ b/llvm/test/Transforms/IndVarSimplify/pr39673.ll @@ -8,7 +8,7 @@ define i16 @constant() { ; CHECK: loop1: ; CHECK-NEXT: [[L1:%.*]] = phi i16 [ 0, [[ENTRY:%.*]] ], [ [[L1_ADD:%.*]], [[LOOP1]] ] ; CHECK-NEXT: [[L1_ADD]] = add nuw nsw i16 [[L1]], 1 -; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i16 [[L1_ADD]], 2 +; CHECK-NEXT: [[CMP1:%.*]] = icmp samesign ult i16 [[L1_ADD]], 2 ; CHECK-NEXT: br i1 [[CMP1]], label [[LOOP1]], label [[LOOP2_PREHEADER:%.*]] ; CHECK: loop2.preheader: ; CHECK-NEXT: br label [[LOOP2:%.*]] @@ -18,7 +18,7 @@ define i16 @constant() { ; CHECK-NEXT: [[L2_ADD]] = add nuw nsw i16 [[L2]], 1 ; CHECK-NEXT: tail call void @foo(i16 [[K2]]) ; CHECK-NEXT: [[K2_ADD]] = add nuw nsw i16 [[K2]], 1 -; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i16 [[L2_ADD]], 2 +; CHECK-NEXT: [[CMP2:%.*]] = icmp samesign ult i16 [[L2_ADD]], 2 ; CHECK-NEXT: br i1 [[CMP2]], label [[LOOP2]], label [[LOOP2_END:%.*]] ; CHECK: loop2.end: ; CHECK-NEXT: ret i16 184 @@ -59,7 +59,7 @@ define i16 @dom_argument(i16 %arg1, i16 %arg2) { ; CHECK: loop1: ; CHECK-NEXT: [[L1:%.*]] = phi i16 [ 0, [[ENTRY:%.*]] ], [ [[L1_ADD:%.*]], [[LOOP1]] ] ; CHECK-NEXT: [[L1_ADD]] = add nuw nsw i16 [[L1]], 1 -; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i16 [[L1_ADD]], 2 +; CHECK-NEXT: [[CMP1:%.*]] = icmp samesign ult i16 [[L1_ADD]], 2 ; CHECK-NEXT: br i1 [[CMP1]], label [[LOOP1]], label [[LOOP2_PREHEADER:%.*]] ; CHECK: loop2.preheader: ; CHECK-NEXT: br label [[LOOP2:%.*]] @@ -69,7 +69,7 @@ define i16 @dom_argument(i16 %arg1, i16 %arg2) { ; CHECK-NEXT: [[L2_ADD]] = add nuw nsw i16 [[L2]], 1 ; CHECK-NEXT: tail call void @foo(i16 [[K2]]) ; CHECK-NEXT: [[K2_ADD]] = add nuw nsw i16 [[K2]], 1 -; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i16 [[L2_ADD]], 2 +; CHECK-NEXT: [[CMP2:%.*]] = icmp samesign ult i16 [[L2_ADD]], 2 ; CHECK-NEXT: br i1 [[CMP2]], label [[LOOP2]], label [[LOOP2_END:%.*]] ; CHECK: loop2.end: ; CHECK-NEXT: [[K2_ADD_LCSSA:%.*]] = phi i16 [ [[K2_ADD]], [[LOOP2]] ] @@ -118,7 +118,7 @@ define i16 @dummy_phi_outside_loop(i16 %arg) { ; CHECK-NEXT: [[L2_ADD]] = add nuw nsw i16 [[L2]], 1 ; CHECK-NEXT: tail call void @foo(i16 [[K2]]) ; CHECK-NEXT: [[K2_ADD]] = add nuw nsw i16 [[K2]], 1 -; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i16 [[L2_ADD]], 2 +; CHECK-NEXT: [[CMP2:%.*]] = icmp samesign ult i16 [[L2_ADD]], 2 ; CHECK-NEXT: br i1 [[CMP2]], label [[LOOP2]], label [[LOOP2_END:%.*]] ; CHECK: loop2.end: ; CHECK-NEXT: [[K2_ADD_LCSSA:%.*]] = phi i16 [ [[K2_ADD]], [[LOOP2]] ] @@ -148,14 +148,14 @@ loop2.end: ; preds = %loop2 define i16 @neg_loop_carried(i16 %arg) { ; CHECK-LABEL: @neg_loop_carried( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = add i16 [[ARG:%.*]], 2 ; CHECK-NEXT: br label [[LOOP1:%.*]] ; CHECK: loop1: ; CHECK-NEXT: [[L1:%.*]] = phi i16 [ 0, [[ENTRY:%.*]] ], [ [[L1_ADD:%.*]], [[LOOP1]] ] ; CHECK-NEXT: [[L1_ADD]] = add nuw nsw i16 [[L1]], 1 -; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i16 [[L1_ADD]], 2 +; CHECK-NEXT: [[CMP1:%.*]] = icmp samesign ult i16 [[L1_ADD]], 2 ; CHECK-NEXT: br i1 [[CMP1]], label [[LOOP1]], label [[LOOP2_PREHEADER:%.*]] ; CHECK: loop2.preheader: +; CHECK-NEXT: [[TMP0:%.*]] = add i16 [[ARG:%.*]], 2 ; CHECK-NEXT: br label [[LOOP2:%.*]] ; CHECK: loop2: ; CHECK-NEXT: [[K2:%.*]] = phi i16 [ [[K2_ADD:%.*]], [[LOOP2]] ], [ [[TMP0]], [[LOOP2_PREHEADER]] ] @@ -163,7 +163,7 @@ define i16 @neg_loop_carried(i16 %arg) { ; CHECK-NEXT: [[L2_ADD]] = add nuw nsw i16 [[L2]], 1 ; CHECK-NEXT: tail call void @foo(i16 [[K2]]) ; CHECK-NEXT: [[K2_ADD]] = add nuw nsw i16 [[K2]], 1 -; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i16 [[L2_ADD]], 2 +; CHECK-NEXT: [[CMP2:%.*]] = icmp samesign ult i16 [[L2_ADD]], 2 ; CHECK-NEXT: br i1 [[CMP2]], label [[LOOP2]], label [[LOOP2_END:%.*]] ; CHECK: loop2.end: ; CHECK-NEXT: [[K2_ADD_LCSSA:%.*]] = phi i16 [ [[K2_ADD]], [[LOOP2]] ] diff --git a/llvm/test/Transforms/IndVarSimplify/pr56242.ll b/llvm/test/Transforms/IndVarSimplify/pr56242.ll index a52b683b..22e4467 100644 --- a/llvm/test/Transforms/IndVarSimplify/pr56242.ll +++ b/llvm/test/Transforms/IndVarSimplify/pr56242.ll @@ -20,7 +20,7 @@ define void @test(ptr %arr) { ; CHECK-NEXT: br label [[LOOP_LATCH]] ; CHECK: loop.latch: ; CHECK-NEXT: [[IV_INC]] = add nuw nsw i64 [[IV]], 1 -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IV_INC]], 16 +; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i64 [[IV_INC]], 16 ; CHECK-NEXT: br i1 [[CMP]], label [[LOOP_HEADER]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void diff --git a/llvm/test/Transforms/IndVarSimplify/pr57247.ll b/llvm/test/Transforms/IndVarSimplify/pr57247.ll index 867856a..c7bc997 100644 --- a/llvm/test/Transforms/IndVarSimplify/pr57247.ll +++ b/llvm/test/Transforms/IndVarSimplify/pr57247.ll @@ -15,7 +15,7 @@ define i32 @test_01() { ; CHECK-NEXT: br i1 [[CHECK_1]], label [[INNER_LATCH]], label [[EXIT:%.*]] ; CHECK: inner.latch: ; CHECK-NEXT: [[ADD_I]] = add nuw nsw i64 [[STOREMERGE611_I]], 1 -; CHECK-NEXT: [[CMP5_I:%.*]] = icmp ult i64 [[STOREMERGE611_I]], 11 +; CHECK-NEXT: [[CMP5_I:%.*]] = icmp samesign ult i64 [[STOREMERGE611_I]], 11 ; CHECK-NEXT: br i1 [[CMP5_I]], label [[INNER_LOOP]], label [[OUTER_LATCH]] ; CHECK: outer.latch: ; CHECK-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], -1 @@ -55,14 +55,14 @@ define i32 @test_02() { ; CHECK-NEXT: br label [[OUTER_LOOP:%.*]] ; CHECK: outer.loop: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[OUTER_LATCH:%.*]] ] -; CHECK-NEXT: [[CHECK_1:%.*]] = icmp ult i32 [[IV]], 2147483640 +; CHECK-NEXT: [[CHECK_1:%.*]] = icmp samesign ult i32 [[IV]], 2147483640 ; CHECK-NEXT: br label [[INNER_LOOP:%.*]] ; CHECK: inner.loop: ; CHECK-NEXT: [[STOREMERGE611_I:%.*]] = phi i64 [ 0, [[OUTER_LOOP]] ], [ [[ADD_I:%.*]], [[INNER_LATCH:%.*]] ] ; CHECK-NEXT: br i1 [[CHECK_1]], label [[INNER_LATCH]], label [[EXIT:%.*]] ; CHECK: inner.latch: ; CHECK-NEXT: [[ADD_I]] = add nuw nsw i64 [[STOREMERGE611_I]], 1 -; CHECK-NEXT: [[CMP5_I:%.*]] = icmp ult i64 [[STOREMERGE611_I]], 11 +; CHECK-NEXT: [[CMP5_I:%.*]] = icmp samesign ult i64 [[STOREMERGE611_I]], 11 ; CHECK-NEXT: br i1 [[CMP5_I]], label [[INNER_LOOP]], label [[OUTER_LATCH]] ; CHECK: outer.latch: ; CHECK-NEXT: [[IV_NEXT]] = add nuw i32 [[IV]], 10 @@ -109,7 +109,7 @@ define i32 @test_03() { ; CHECK-NEXT: br i1 [[CHECK_1]], label [[INNER_LATCH]], label [[EXIT:%.*]] ; CHECK: inner.latch: ; CHECK-NEXT: [[ADD_I]] = add nuw nsw i64 [[STOREMERGE611_I]], 1 -; CHECK-NEXT: [[CMP5_I:%.*]] = icmp ult i64 [[STOREMERGE611_I]], 11 +; CHECK-NEXT: [[CMP5_I:%.*]] = icmp samesign ult i64 [[STOREMERGE611_I]], 11 ; CHECK-NEXT: br i1 [[CMP5_I]], label [[INNER_LOOP]], label [[OUTER_LATCH]] ; CHECK: outer.latch: ; CHECK-NEXT: [[IV_NEXT]] = add nuw i32 [[IV]], 10 diff --git a/llvm/test/Transforms/IndVarSimplify/pr62992.ll b/llvm/test/Transforms/IndVarSimplify/pr62992.ll index c8f47b5..afc2c00 100644 --- a/llvm/test/Transforms/IndVarSimplify/pr62992.ll +++ b/llvm/test/Transforms/IndVarSimplify/pr62992.ll @@ -14,7 +14,7 @@ define i32 @test(i32 %arg) { ; CHECK-NEXT: br i1 false, label [[IF:%.*]], label [[LOOP_LATCH:%.*]] ; CHECK: if: ; CHECK-NEXT: [[DIV:%.*]] = udiv i32 7, [[ARG]] -; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 1, [[DIV]] +; CHECK-NEXT: [[CMP2:%.*]] = icmp samesign ult i32 1, [[DIV]] ; CHECK-NEXT: call void @use(i1 [[CMP2]]) ; CHECK-NEXT: br label [[LOOP_LATCH]] ; CHECK: loop.latch: diff --git a/llvm/test/Transforms/IndVarSimplify/pr63763.ll b/llvm/test/Transforms/IndVarSimplify/pr63763.ll index a5fde67..427db1e 100644 --- a/llvm/test/Transforms/IndVarSimplify/pr63763.ll +++ b/llvm/test/Transforms/IndVarSimplify/pr63763.ll @@ -16,13 +16,13 @@ define i32 @test(i1 %c) { ; CHECK-NEXT: [[CONV2:%.*]] = ashr exact i32 [[SEXT]], 24 ; CHECK-NEXT: [[INVARIANT_OP:%.*]] = sub nsw i32 7, [[CONV2]] ; CHECK-NEXT: call void @use(i32 [[INVARIANT_OP]]) -; CHECK-NEXT: [[SEXT_US:%.*]] = shl i32 [[SEL]], 24 -; CHECK-NEXT: [[CONV2_US:%.*]] = ashr exact i32 [[SEXT_US]], 24 -; CHECK-NEXT: [[INVARIANT_OP_US:%.*]] = sub nsw i32 7, [[CONV2_US]] ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[LOOP]] ; CHECK: exit: +; CHECK-NEXT: [[SEXT_US:%.*]] = shl i32 [[SEL]], 24 +; CHECK-NEXT: [[CONV2_US:%.*]] = ashr exact i32 [[SEXT_US]], 24 +; CHECK-NEXT: [[INVARIANT_OP_US:%.*]] = sub nsw i32 7, [[CONV2_US]] ; CHECK-NEXT: ret i32 [[INVARIANT_OP_US]] ; entry: diff --git a/llvm/test/Transforms/IndVarSimplify/replace-loop-exit-folds.ll b/llvm/test/Transforms/IndVarSimplify/replace-loop-exit-folds.ll index 7cdc98a..b3162de 100644 --- a/llvm/test/Transforms/IndVarSimplify/replace-loop-exit-folds.ll +++ b/llvm/test/Transforms/IndVarSimplify/replace-loop-exit-folds.ll @@ -4,21 +4,22 @@ target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" define i32 @remove_loop(i32 %size) { -; CHECK-LABEL: @remove_loop( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[SIZE:%.*]], 31 +; CHECK-LABEL: define i32 @remove_loop( +; CHECK-SAME: i32 [[SIZE:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: br label %[[WHILE_COND:.*]] +; CHECK: [[WHILE_COND]]: +; CHECK-NEXT: [[SIZE_ADDR_0:%.*]] = phi i32 [ [[SIZE]], %[[ENTRY]] ], [ [[SUB:%.*]], %[[WHILE_COND]] ] +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[SIZE_ADDR_0]], 31 +; CHECK-NEXT: [[SUB]] = add i32 [[SIZE_ADDR_0]], -32 +; CHECK-NEXT: br i1 [[CMP]], label %[[WHILE_COND]], label %[[WHILE_END:.*]] +; CHECK: [[WHILE_END]]: +; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[SIZE]], 31 ; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[SIZE]], i32 31) ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[UMIN]] ; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 5 ; CHECK-NEXT: [[TMP3:%.*]] = shl nuw i32 [[TMP2]], 5 ; CHECK-NEXT: [[TMP4:%.*]] = sub i32 [[SIZE]], [[TMP3]] -; CHECK-NEXT: br label [[WHILE_COND:%.*]] -; CHECK: while.cond: -; CHECK-NEXT: [[SIZE_ADDR_0:%.*]] = phi i32 [ [[SIZE]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_COND]] ] -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[SIZE_ADDR_0]], 31 -; CHECK-NEXT: [[SUB]] = add i32 [[SIZE_ADDR_0]], -32 -; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_COND]], label [[WHILE_END:%.*]] -; CHECK: while.end: ; CHECK-NEXT: ret i32 [[TMP4]] ; entry: diff --git a/llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-values-phi.ll b/llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-values-phi.ll index 41fce36..84ae79d 100644 --- a/llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-values-phi.ll +++ b/llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-values-phi.ll @@ -76,10 +76,6 @@ define i64 @narow_canonical_iv_wide_multiplied_iv(i32 %x, i64 %y, ptr %0) { ; CHECK-LABEL: @narow_canonical_iv_wide_multiplied_iv( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[SMAX:%.*]] = tail call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 1) -; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[SMAX]] to i64 -; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[Y:%.*]], [[TMP1]] -; CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 1 -; CHECK-NEXT: [[TMP6:%.*]] = add nuw nsw i64 [[TMP3]], 1 ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] @@ -88,6 +84,10 @@ define i64 @narow_canonical_iv_wide_multiplied_iv(i32 %x, i64 %y, ptr %0) { ; CHECK-NEXT: [[EC:%.*]] = icmp ne i32 [[IV_NEXT]], [[SMAX]] ; CHECK-NEXT: br i1 [[EC]], label [[LOOP]], label [[EXIT:%.*]] ; CHECK: exit: +; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[SMAX]] to i64 +; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[Y:%.*]], [[TMP1]] +; CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 1 +; CHECK-NEXT: [[TMP6:%.*]] = add nuw nsw i64 [[TMP3]], 1 ; CHECK-NEXT: ret i64 [[TMP6]] ; entry: diff --git a/llvm/test/Transforms/IndVarSimplify/scev-expander-preserve-lcssa.ll b/llvm/test/Transforms/IndVarSimplify/scev-expander-preserve-lcssa.ll index aca553e..14e06fe 100644 --- a/llvm/test/Transforms/IndVarSimplify/scev-expander-preserve-lcssa.ll +++ b/llvm/test/Transforms/IndVarSimplify/scev-expander-preserve-lcssa.ll @@ -23,8 +23,8 @@ define void @test1(i8 %x, ptr %ptr) { ; CHECK-NEXT: br label [[WHILE_COND192:%.*]] ; CHECK: while.cond192: ; CHECK-NEXT: switch i8 [[X:%.*]], label [[WHILE_BODY205:%.*]] [ -; CHECK-NEXT: i8 59, label [[WHILE_COND215_PREHEADER:%.*]] -; CHECK-NEXT: i8 10, label [[IF_END224_LOOPEXIT1:%.*]] +; CHECK-NEXT: i8 59, label [[WHILE_COND215_PREHEADER:%.*]] +; CHECK-NEXT: i8 10, label [[IF_END224_LOOPEXIT1:%.*]] ; CHECK-NEXT: ] ; CHECK: while.cond215.preheader: ; CHECK-NEXT: br label [[WHILE_COND215:%.*]] @@ -103,8 +103,8 @@ define void @test2(i16 %x) { ; CHECK-NEXT: br label [[FOR_COND:%.*]] ; CHECK: for.cond: ; CHECK-NEXT: switch i16 [[X:%.*]], label [[RETURN_LOOPEXIT1:%.*]] [ -; CHECK-NEXT: i16 41, label [[FOR_END:%.*]] -; CHECK-NEXT: i16 43, label [[FOR_COND]] +; CHECK-NEXT: i16 41, label [[FOR_END:%.*]] +; CHECK-NEXT: i16 43, label [[FOR_COND]] ; CHECK-NEXT: ] ; CHECK: for.end: ; CHECK-NEXT: [[I_0_LCSSA2:%.*]] = phi i32 [ 0, [[FOR_COND]] ] @@ -336,7 +336,6 @@ if.end1824: ; preds = %for.end1326 define void @test5(ptr %header, i32 %conv, i8 %n) { ; CHECK-LABEL: @test5( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[SHL:%.*]] = shl nuw nsw i32 [[CONV:%.*]], 2 ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ; CHECK: for.body: ; CHECK-NEXT: br label [[FOR_INNER:%.*]] @@ -359,6 +358,7 @@ define void @test5(ptr %header, i32 %conv, i8 %n) { ; CHECK-NEXT: br i1 false, label [[FOR_BODY]], label [[WHILE_COND_PREHEADER:%.*]] ; CHECK: while.cond.preheader: ; CHECK-NEXT: [[ADD85_LCSSA:%.*]] = phi i32 [ [[ADD85]], [[FOR_INC]] ] +; CHECK-NEXT: [[SHL:%.*]] = shl nuw nsw i32 [[CONV:%.*]], 2 ; CHECK-NEXT: br label [[WHILE_COND:%.*]] ; CHECK: while.cond: ; CHECK-NEXT: [[POS_8:%.*]] = phi i32 [ [[INC114:%.*]], [[WHILE_BODY:%.*]] ], [ [[ADD85_LCSSA]], [[WHILE_COND_PREHEADER]] ] @@ -427,8 +427,8 @@ define void @test6(i8 %x) { ; CHECK-NEXT: br label [[WHILE_COND192:%.*]] ; CHECK: while.cond192: ; CHECK-NEXT: switch i8 [[X:%.*]], label [[WHILE_BODY205:%.*]] [ -; CHECK-NEXT: i8 59, label [[WHILE_COND215_PREHEADER:%.*]] -; CHECK-NEXT: i8 10, label [[IF_END224:%.*]] +; CHECK-NEXT: i8 59, label [[WHILE_COND215_PREHEADER:%.*]] +; CHECK-NEXT: i8 10, label [[IF_END224:%.*]] ; CHECK-NEXT: ] ; CHECK: while.cond215.preheader: ; CHECK-NEXT: [[I_7_LCSSA:%.*]] = phi i32 [ 0, [[WHILE_COND192]] ] diff --git a/llvm/test/Transforms/IndVarSimplify/scev-invalidation.ll b/llvm/test/Transforms/IndVarSimplify/scev-invalidation.ll index ad69812..a92d328 100644 --- a/llvm/test/Transforms/IndVarSimplify/scev-invalidation.ll +++ b/llvm/test/Transforms/IndVarSimplify/scev-invalidation.ll @@ -46,12 +46,12 @@ for.end106: ; preds = %for.cond define i32 @test_pr58439(i32 %a) { ; CHECK-LABEL: @test_pr58439( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[OR:%.*]] = or i32 [[A:%.*]], 1 ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: br i1 false, label [[LOOP]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: [[C_EXT_LCSSA:%.*]] = phi i32 [ 0, [[LOOP]] ] +; CHECK-NEXT: [[OR:%.*]] = or i32 [[A:%.*]], 1 ; CHECK-NEXT: [[RES:%.*]] = add i32 [[C_EXT_LCSSA]], [[OR]] ; CHECK-NEXT: ret i32 [[RES]] ; @@ -76,7 +76,6 @@ define i8 @l(i32 %inc, i1 %tobool.not.i) { ; CHECK-NEXT: entry: ; CHECK-NEXT: br label [[OUTER_HEADER:%.*]] ; CHECK: outer.header: -; CHECK-NEXT: [[AND:%.*]] = and i32 1, [[INC:%.*]] ; CHECK-NEXT: br label [[INNER:%.*]] ; CHECK: inner: ; CHECK-NEXT: [[C_05_I:%.*]] = phi i32 [ [[INC_I:%.*]], [[INNER]] ], [ 0, [[OUTER_HEADER]] ] @@ -87,6 +86,7 @@ define i8 @l(i32 %inc, i1 %tobool.not.i) { ; CHECK: outer.latch: ; CHECK-NEXT: [[C_05_I_LCSSA:%.*]] = phi i32 [ [[C_05_I]], [[INNER]] ] ; CHECK-NEXT: [[LCSSA:%.*]] = phi i32 [ 0, [[INNER]] ] +; CHECK-NEXT: [[AND:%.*]] = and i32 1, [[INC:%.*]] ; CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[AND]] to i8 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[C_05_I_LCSSA]] to i8 ; CHECK-NEXT: [[TMP2:%.*]] = sub i8 [[TMP0]], [[TMP1]] diff --git a/llvm/test/Transforms/IndVarSimplify/sentinel.ll b/llvm/test/Transforms/IndVarSimplify/sentinel.ll index 4f12308..5234141 100644 --- a/llvm/test/Transforms/IndVarSimplify/sentinel.ll +++ b/llvm/test/Transforms/IndVarSimplify/sentinel.ll @@ -9,19 +9,19 @@ define void @test(i1 %arg) personality ptr @snork { ; CHECK-NEXT: bb: ; CHECK-NEXT: br label [[BB4:%.*]] ; CHECK: bb1: +; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add i32 [[INDVARS_IV:%.*]], 1 +; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[TMP6:%.*]], [[INDVARS_IV]] +; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[SMAX:%.*]] ; CHECK-NEXT: br i1 [[ARG:%.*]], label [[BB2:%.*]], label [[BB4]] ; CHECK: bb2: -; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ [[TMP1:%.*]], [[BB1:%.*]] ] +; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ [[TMP1]], [[BB1:%.*]] ] ; CHECK-NEXT: ret void ; CHECK: bb4: -; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[BB1]] ], [ undef, [[BB:%.*]] ] -; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[INDVARS_IV]], i32 36) -; CHECK-NEXT: [[TMP6:%.*]] = invoke i32 @quux() [ "deopt"(i32 0, i32 0, i32 0, i32 180, i32 0, i32 25, i32 0, i32 7, ptr null, i32 7, ptr null, i32 7, ptr null, i32 3, i32 [[INDVARS_IV]], i32 3, i32 undef, i32 7, ptr null, i32 3, i32 undef, i32 3, i32 undef, i32 3, i32 undef, i32 3, i32 undef, i32 4, double undef, i32 7, ptr null, i32 4, i64 undef, i32 7, ptr null, i32 0, ptr addrspace(1) undef, i32 3, i32 undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 7, ptr null) ] +; CHECK-NEXT: [[INDVARS_IV]] = phi i32 [ [[INDVARS_IV_NEXT]], [[BB1]] ], [ undef, [[BB:%.*]] ] +; CHECK-NEXT: [[SMAX]] = call i32 @llvm.smax.i32(i32 [[INDVARS_IV]], i32 36) +; CHECK-NEXT: [[TMP6]] = invoke i32 @quux() [ "deopt"(i32 0, i32 0, i32 0, i32 180, i32 0, i32 25, i32 0, i32 7, ptr null, i32 7, ptr null, i32 7, ptr null, i32 3, i32 [[INDVARS_IV]], i32 3, i32 undef, i32 7, ptr null, i32 3, i32 undef, i32 3, i32 undef, i32 3, i32 undef, i32 3, i32 undef, i32 4, double undef, i32 7, ptr null, i32 4, i64 undef, i32 7, ptr null, i32 0, ptr addrspace(1) undef, i32 3, i32 undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 0, ptr addrspace(1) undef, i32 7, ptr null) ] ; CHECK-NEXT: to label [[BB7:%.*]] unwind label [[BB15:%.*]] ; CHECK: bb7: -; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i32 [[INDVARS_IV]], 1 -; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[TMP6]], [[INDVARS_IV]] -; CHECK-NEXT: [[TMP1]] = sub i32 [[TMP0]], [[SMAX]] ; CHECK-NEXT: br label [[BB9:%.*]] ; CHECK: bb9: ; CHECK-NEXT: br i1 true, label [[BB1]], label [[BB9]] diff --git a/llvm/test/Transforms/IndVarSimplify/sharpen-range.ll b/llvm/test/Transforms/IndVarSimplify/sharpen-range.ll index 4dd4e98..e29e29c 100644 --- a/llvm/test/Transforms/IndVarSimplify/sharpen-range.ll +++ b/llvm/test/Transforms/IndVarSimplify/sharpen-range.ll @@ -87,7 +87,7 @@ loop.begin: ; CHECK: loop.begin: %i.01 = phi i64 [ 2, %entry ], [ %add, %loop.end ] %cmp = icmp ugt i64 %i.01, 1 -; CHECK: %cmp = icmp ugt i64 %i.01, 1 +; CHECK: %cmp = icmp samesign ugt i64 %i.01, 1 br i1 %cmp, label %loop, label %loop.end loop: diff --git a/llvm/test/Transforms/IndVarSimplify/shift-range-checks.ll b/llvm/test/Transforms/IndVarSimplify/shift-range-checks.ll index 1334d67..703199f 100644 --- a/llvm/test/Transforms/IndVarSimplify/shift-range-checks.ll +++ b/llvm/test/Transforms/IndVarSimplify/shift-range-checks.ll @@ -124,7 +124,7 @@ define void @test_03(ptr %p, i32 %shift) { ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] -; CHECK-NEXT: [[LESS_THAN_SHIFTED:%.*]] = icmp ult i32 [[IV]], [[X_SHIFTED]] +; CHECK-NEXT: [[LESS_THAN_SHIFTED:%.*]] = icmp samesign ult i32 [[IV]], [[X_SHIFTED]] ; CHECK-NEXT: br i1 [[LESS_THAN_SHIFTED]], label [[GUARDED:%.*]], label [[FAILURE:%.*]] ; CHECK: guarded: ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[NEVER_HAPPENS:%.*]] @@ -180,7 +180,7 @@ define void @test_04(ptr %p, i32 %shift) { ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] -; CHECK-NEXT: [[LESS_THAN_SHIFTED:%.*]] = icmp ugt i32 [[X_SHIFTED]], [[IV]] +; CHECK-NEXT: [[LESS_THAN_SHIFTED:%.*]] = icmp samesign ugt i32 [[X_SHIFTED]], [[IV]] ; CHECK-NEXT: br i1 [[LESS_THAN_SHIFTED]], label [[GUARDED:%.*]], label [[FAILURE:%.*]] ; CHECK: guarded: ; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[NEVER_HAPPENS:%.*]] diff --git a/llvm/test/Transforms/IndVarSimplify/simplify-pointer-arithmetic.ll b/llvm/test/Transforms/IndVarSimplify/simplify-pointer-arithmetic.ll index 7c35629..0c33b11 100644 --- a/llvm/test/Transforms/IndVarSimplify/simplify-pointer-arithmetic.ll +++ b/llvm/test/Transforms/IndVarSimplify/simplify-pointer-arithmetic.ll @@ -22,7 +22,7 @@ define i1 @can_simplify_ult_i32_ptr_len_zext(ptr %p.base, i32 %len) { ; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[P_INC:%.*]], [[LATCH:%.*]] ], [ [[P_BASE]], [[HEADER_PREHEADER]] ] ; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_INC:%.*]], [[LATCH]] ], [ 0, [[HEADER_PREHEADER]] ] ; CHECK-NEXT: [[I_INC]] = add nuw nsw i64 [[I]], 1 -; CHECK-NEXT: [[I_ULT_EXT:%.*]] = icmp ult i64 [[I]], [[EXT]] +; CHECK-NEXT: [[I_ULT_EXT:%.*]] = icmp samesign ult i64 [[I]], [[EXT]] ; CHECK-NEXT: br i1 [[I_ULT_EXT]], label [[LATCH]], label [[TRAP_LOOPEXIT:%.*]] ; CHECK: latch: ; CHECK-NEXT: [[P_INC]] = getelementptr inbounds i32, ptr [[P]], i64 1 @@ -128,7 +128,7 @@ define i1 @cannot_simplify_ult_i32_ptr_len_zext(ptr %p.base, i32 %len) { ; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[P_INC:%.*]], [[LATCH:%.*]] ], [ [[P_BASE]], [[HEADER_PREHEADER]] ] ; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_INC:%.*]], [[LATCH]] ], [ 1, [[HEADER_PREHEADER]] ] ; CHECK-NEXT: [[I_INC]] = add nuw nsw i64 [[I]], 1 -; CHECK-NEXT: [[I_ULT_EXT:%.*]] = icmp ult i64 [[I]], [[EXT]] +; CHECK-NEXT: [[I_ULT_EXT:%.*]] = icmp samesign ult i64 [[I]], [[EXT]] ; CHECK-NEXT: br i1 [[I_ULT_EXT]], label [[LATCH]], label [[TRAP_LOOPEXIT:%.*]] ; CHECK: latch: ; CHECK-NEXT: [[P_INC]] = getelementptr inbounds i32, ptr [[P]], i64 1 @@ -181,7 +181,7 @@ define i1 @can_simplify_ule_i32_ptr_len_zext(ptr %p.base, i32 %len) { ; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[P_INC:%.*]], [[LATCH:%.*]] ], [ [[P_BASE]], [[HEADER_PREHEADER]] ] ; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_INC:%.*]], [[LATCH]] ], [ 1, [[HEADER_PREHEADER]] ] ; CHECK-NEXT: [[I_INC]] = add nuw nsw i64 [[I]], 1 -; CHECK-NEXT: [[I_ULT_EXT:%.*]] = icmp ule i64 [[I]], [[EXT]] +; CHECK-NEXT: [[I_ULT_EXT:%.*]] = icmp samesign ule i64 [[I]], [[EXT]] ; CHECK-NEXT: br i1 [[I_ULT_EXT]], label [[LATCH]], label [[TRAP_LOOPEXIT:%.*]] ; CHECK: latch: ; CHECK-NEXT: [[P_INC]] = getelementptr inbounds i32, ptr [[P]], i64 1 @@ -236,7 +236,7 @@ define i1 @can_simplify_uge_i32_ptr_len_zext(ptr %p.base, i32 %len) { ; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[P_INC:%.*]], [[LATCH:%.*]] ], [ [[P_BASE]], [[HEADER_PREHEADER]] ] ; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_INC:%.*]], [[LATCH]] ], [ 0, [[HEADER_PREHEADER]] ] ; CHECK-NEXT: [[I_INC]] = add nuw nsw i64 [[I]], 1 -; CHECK-NEXT: [[I_UGE_EXT:%.*]] = icmp uge i64 [[I]], [[EXT]] +; CHECK-NEXT: [[I_UGE_EXT:%.*]] = icmp samesign uge i64 [[I]], [[EXT]] ; CHECK-NEXT: br i1 [[I_UGE_EXT]], label [[TRAP_LOOPEXIT:%.*]], label [[LATCH]] ; CHECK: latch: ; CHECK-NEXT: [[P_INC]] = getelementptr inbounds i32, ptr [[P]], i64 1 @@ -340,7 +340,7 @@ define i1 @cannot_simplify_uge_i32_ptr_len_zext_step_2(ptr %p.base, i32 %len) { ; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[P_INC:%.*]], [[LATCH:%.*]] ], [ [[P_BASE]], [[HEADER_PREHEADER]] ] ; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_INC:%.*]], [[LATCH]] ], [ 0, [[HEADER_PREHEADER]] ] ; CHECK-NEXT: [[I_INC]] = add nuw nsw i64 [[I]], 2 -; CHECK-NEXT: [[I_UGE_EXT:%.*]] = icmp uge i64 [[I]], [[EXT]] +; CHECK-NEXT: [[I_UGE_EXT:%.*]] = icmp samesign uge i64 [[I]], [[EXT]] ; CHECK-NEXT: br i1 [[I_UGE_EXT]], label [[TRAP_LOOPEXIT:%.*]], label [[LATCH]] ; CHECK: latch: ; CHECK-NEXT: [[P_INC]] = getelementptr inbounds i32, ptr [[P]], i64 1 diff --git a/llvm/test/Transforms/IndVarSimplify/sink-alloca.ll b/llvm/test/Transforms/IndVarSimplify/sink-alloca.ll new file mode 100644 index 0000000..0997bf6 --- /dev/null +++ b/llvm/test/Transforms/IndVarSimplify/sink-alloca.ll @@ -0,0 +1,56 @@ +; RUN: opt < %s -passes=indvars -S | FileCheck %s +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin10.0" + +; PR4775 +; Indvars shouldn't sink the alloca out of the entry block, even though +; it's not used until after the loop. +define i32 @main() nounwind { +; CHECK: entry: +; CHECK-NEXT: %result.i = alloca i32, align 4 +entry: + %result.i = alloca i32, align 4 ; <ptr> [#uses=2] + br label %while.cond + +while.cond: ; preds = %while.cond, %entry + %call = call i32 @bar() nounwind ; <i32> [#uses=1] + %tobool = icmp eq i32 %call, 0 ; <i1> [#uses=1] + br i1 %tobool, label %while.end, label %while.cond + +while.end: ; preds = %while.cond + store volatile i32 0, ptr %result.i + %tmp.i = load volatile i32, ptr %result.i ; <i32> [#uses=0] + ret i32 0 +} +declare i32 @bar() + +; <rdar://problem/10352360> +; Indvars shouldn't sink the first alloca between the stacksave and stackrestore +; intrinsics. +declare ptr @a(...) +declare ptr @llvm.stacksave() nounwind +declare void @llvm.stackrestore(ptr) nounwind +define void @h(i64 %n) nounwind uwtable ssp { +; CHECK: entry: +; CHECK-NEXT: %vla = alloca ptr +; CHECK-NEXT: %savedstack = call ptr @llvm.stacksave.p0() +entry: + %vla = alloca ptr, i64 %n, align 16 + %savedstack = call ptr @llvm.stacksave() nounwind + %vla.i = alloca ptr, i64 %n, align 16 + br label %for.body.i + +for.body.i: + %indvars.iv37.i = phi i64 [ %indvars.iv.next38.i, %for.body.i ], [ 0, %entry ] + %call.i = call ptr (...) @a() nounwind + %arrayidx.i = getelementptr inbounds ptr, ptr %vla.i, i64 %indvars.iv37.i + store ptr %call.i, ptr %arrayidx.i, align 8 + %indvars.iv.next38.i = add i64 %indvars.iv37.i, 1 + %exitcond5 = icmp eq i64 %indvars.iv.next38.i, %n + br i1 %exitcond5, label %g.exit, label %for.body.i + +g.exit: + call void @llvm.stackrestore(ptr %savedstack) nounwind + %call1 = call ptr (...) @a(ptr %vla) nounwind + ret void +} diff --git a/llvm/test/Transforms/IndVarSimplify/sink-from-preheader.ll b/llvm/test/Transforms/IndVarSimplify/sink-from-preheader.ll new file mode 100644 index 0000000..89583f9 --- /dev/null +++ b/llvm/test/Transforms/IndVarSimplify/sink-from-preheader.ll @@ -0,0 +1,32 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -passes=indvars -indvars-predicate-loops=0 -S | FileCheck %s +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin10.0" + +; We make sinking here, Changed flag should be set properly. +define i32 @test(i32 %a, i32 %b, i32 %N) { +; CHECK-LABEL: @test( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] +; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1 +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[IV_NEXT]], [[N:%.*]] +; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]] +; CHECK: exit: +; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A:%.*]], [[B:%.*]] +; CHECK-NEXT: ret i32 [[ADD]] +; +entry: + %add = add i32 %a, %b + br label %loop + +loop: + %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] + %iv.next = add i32 %iv, 1 + %cmp = icmp slt i32 %iv.next, %N + br i1 %cmp, label %loop, label %exit + +exit: + ret i32 %add +} diff --git a/llvm/test/Transforms/IndVarSimplify/sink-trapping.ll b/llvm/test/Transforms/IndVarSimplify/sink-trapping.ll new file mode 100644 index 0000000..d2478be --- /dev/null +++ b/llvm/test/Transforms/IndVarSimplify/sink-trapping.ll @@ -0,0 +1,19 @@ +; RUN: opt < %s -passes=indvars -S | FileCheck %s + +declare i1 @b() + +define i32 @a(i32 %x) nounwind { +for.body.preheader: + %y = sdiv i32 10, %x + br label %for.body + +for.body: + %cmp = call i1 @b() + br i1 %cmp, label %for.body, label %for.end.loopexit + +for.end.loopexit: + ret i32 %y +} +; CHECK: for.end.loopexit: +; CHECK: sdiv +; CHECK: ret diff --git a/llvm/test/Transforms/IndVarSimplify/skip-predication-convergence.ll b/llvm/test/Transforms/IndVarSimplify/skip-predication-convergence.ll new file mode 100644 index 0000000..e08307f --- /dev/null +++ b/llvm/test/Transforms/IndVarSimplify/skip-predication-convergence.ll @@ -0,0 +1,64 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -passes=indvars -indvars-predicate-loops=1 -S | FileCheck %s + +; Loop with body using loop convergence token should be skipped by IndVarSimplify. + +declare token @llvm.experimental.convergence.entry() #0 + +define void @loop(i32 %tid, ptr %array) #0 { +; CHECK-LABEL: @loop( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = tail call token @llvm.experimental.convergence.entry() +; CHECK-NEXT: br label [[FOR_COND_I:%.*]] +; CHECK: for.cond.i: +; CHECK-NEXT: [[I_0_I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC_I:%.*]], [[FOR_BODY_I:%.*]] ] +; CHECK-NEXT: [[TMP1:%.*]] = call token @llvm.experimental.convergence.loop() [ "convergencectrl"(token [[TMP0]]) ] +; CHECK-NEXT: [[CMP_I:%.*]] = icmp samesign ult i32 [[I_0_I]], 8 +; CHECK-NEXT: br i1 [[CMP_I]], label [[FOR_BODY_I]], label [[EXIT_LOOPEXIT:%.*]] +; CHECK: for.body.i: +; CHECK-NEXT: [[CMP1_I:%.*]] = icmp eq i32 [[I_0_I]], [[TID:%.*]] +; CHECK-NEXT: [[INC_I]] = add nuw nsw i32 [[I_0_I]], 1 +; CHECK-NEXT: br i1 [[CMP1_I]], label [[IF_THEN_I:%.*]], label [[FOR_COND_I]] +; CHECK: exit.loopexit: +; CHECK-NEXT: br label [[EXIT:%.*]] +; CHECK: if.then.i: +; CHECK-NEXT: [[HLSL_WAVE_ACTIVE_MAX2_I:%.*]] = call spir_func i32 @llvm.spv.wave.reduce.umax.i32(i32 [[TID]]) [ "convergencectrl"(token [[TMP1]]) ] +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i32 [[TID]] +; CHECK-NEXT: store i32 [[HLSL_WAVE_ACTIVE_MAX2_I]], ptr [[TMP2]], align 4 +; CHECK-NEXT: br label [[EXIT]] +; CHECK: exit: +; CHECK-NEXT: ret void +; +entry: + %0 = tail call token @llvm.experimental.convergence.entry() + br label %for.cond.i + +for.cond.i: + %i.0.i = phi i32 [ 0, %entry ], [ %inc.i, %for.body.i ] + %2 = call token @llvm.experimental.convergence.loop() [ "convergencectrl"(token %0) ] + %cmp.i = icmp ult i32 %i.0.i, 8 + br i1 %cmp.i, label %for.body.i, label %exit.loopexit + +for.body.i: + %cmp1.i = icmp eq i32 %i.0.i, %tid + %inc.i = add nuw nsw i32 %i.0.i, 1 + br i1 %cmp1.i, label %if.then.i, label %for.cond.i + +exit.loopexit: + br label %exit + +if.then.i: + %hlsl.wave.active.max2.i = call spir_func i32 @llvm.spv.wave.reduce.umax.i32(i32 %tid) [ "convergencectrl"(token %2) ] + %3 = getelementptr inbounds i32, ptr %array, i32 %tid + store i32 %hlsl.wave.active.max2.i, ptr %3, align 4 + br label %exit + +exit: + ret void +} + +declare token @llvm.experimental.convergence.loop() #0 + +declare i32 @llvm.spv.wave.reduce.umax.i32(i32) #0 + +attributes #0 = { convergent } diff --git a/llvm/test/Transforms/IndVarSimplify/skip-predication-nested-convergence.ll b/llvm/test/Transforms/IndVarSimplify/skip-predication-nested-convergence.ll new file mode 100644 index 0000000..4d630a9 --- /dev/null +++ b/llvm/test/Transforms/IndVarSimplify/skip-predication-nested-convergence.ll @@ -0,0 +1,95 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -passes=indvars -indvars-predicate-loops=1 -S | FileCheck %s + +; Nested loops with body using loop convergence token should be skipped by IndVarSimplify. + +declare token @llvm.experimental.convergence.entry() #0 + +define void @nested(i32 %tidx, i32 %tidy, ptr %array) #0 { +; CHECK-LABEL: @nested( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = tail call token @llvm.experimental.convergence.entry() +; CHECK-NEXT: [[MUL_I:%.*]] = shl nsw i32 [[TIDX:%.*]], 3 +; CHECK-NEXT: [[ADD_I:%.*]] = add nsw i32 [[MUL_I]], [[TIDY:%.*]] +; CHECK-NEXT: br label [[FOR_COND_I:%.*]] +; CHECK: for.cond.i: +; CHECK-NEXT: [[I_0_I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC10_I:%.*]], [[CLEANUP_I:%.*]] ] +; CHECK-NEXT: [[TMP1:%.*]] = call token @llvm.experimental.convergence.loop() [ "convergencectrl"(token [[TMP0]]) ] +; CHECK-NEXT: [[CMP_I:%.*]] = icmp samesign ult i32 [[I_0_I]], 8 +; CHECK-NEXT: br i1 [[CMP_I]], label [[FOR_COND1_I_PREHEADER:%.*]], label [[EXIT:%.*]] +; CHECK: for.cond1.i.preheader: +; CHECK-NEXT: [[CMP5_I:%.*]] = icmp eq i32 [[I_0_I]], [[TIDX]] +; CHECK-NEXT: br label [[FOR_COND1_I:%.*]] +; CHECK: for.cond1.i: +; CHECK-NEXT: [[J_0_I:%.*]] = phi i32 [ [[INC_I:%.*]], [[FOR_BODY4_I:%.*]] ], [ 0, [[FOR_COND1_I_PREHEADER]] ] +; CHECK-NEXT: [[TMP2:%.*]] = call token @llvm.experimental.convergence.loop() [ "convergencectrl"(token [[TMP1]]) ] +; CHECK-NEXT: [[CMP2_I:%.*]] = icmp samesign ult i32 [[J_0_I]], 8 +; CHECK-NEXT: br i1 [[CMP2_I]], label [[FOR_BODY4_I]], label [[CLEANUP_I_LOOPEXIT:%.*]] +; CHECK: for.body4.i: +; CHECK-NEXT: [[CMP6_I:%.*]] = icmp eq i32 [[J_0_I]], [[TIDY]] +; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[CMP5_I]], i1 [[CMP6_I]], i1 false +; CHECK-NEXT: [[INC_I]] = add nuw nsw i32 [[J_0_I]], 1 +; CHECK-NEXT: br i1 [[OR_COND]], label [[IF_THEN_I:%.*]], label [[FOR_COND1_I]] +; CHECK: cleanup.i.loopexit: +; CHECK-NEXT: br label [[CLEANUP_I]] +; CHECK: if.then.i: +; CHECK-NEXT: [[HLSL_WAVE_ACTIVE_MAX7_I:%.*]] = call spir_func i32 @llvm.spv.wave.reduce.umax.i32(i32 [[ADD_I]]) [ "convergencectrl"(token [[TMP2]]) ] +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i32 [[ADD_I]] +; CHECK-NEXT: store i32 [[HLSL_WAVE_ACTIVE_MAX7_I]], ptr [[TMP3]], align 4 +; CHECK-NEXT: br label [[CLEANUP_I]] +; CHECK: cleanup.i: +; CHECK-NEXT: [[INC10_I]] = add nuw nsw i32 [[I_0_I]], 1 +; CHECK-NEXT: br label [[FOR_COND_I]] +; CHECK: exit: +; CHECK-NEXT: ret void +; +entry: + %0 = tail call token @llvm.experimental.convergence.entry() + %mul.i = shl nsw i32 %tidx, 3 + %add.i = add nsw i32 %mul.i, %tidy + br label %for.cond.i + +for.cond.i: + %i.0.i = phi i32 [ 0, %entry ], [ %inc10.i, %cleanup.i ] + %2 = call token @llvm.experimental.convergence.loop() [ "convergencectrl"(token %0) ] + %cmp.i = icmp ult i32 %i.0.i, 8 + br i1 %cmp.i, label %for.cond1.i.preheader, label %exit + +for.cond1.i.preheader: + %cmp5.i = icmp eq i32 %i.0.i, %tidx + br label %for.cond1.i + +for.cond1.i: + %j.0.i = phi i32 [ %inc.i, %for.body4.i ], [ 0, %for.cond1.i.preheader ] + %3 = call token @llvm.experimental.convergence.loop() [ "convergencectrl"(token %2) ] + %cmp2.i = icmp ult i32 %j.0.i, 8 + br i1 %cmp2.i, label %for.body4.i, label %cleanup.i.loopexit + +for.body4.i: + %cmp6.i = icmp eq i32 %j.0.i, %tidy + %or.cond = select i1 %cmp5.i, i1 %cmp6.i, i1 false + %inc.i = add nsw i32 %j.0.i, 1 + br i1 %or.cond, label %if.then.i, label %for.cond1.i + +cleanup.i.loopexit: + br label %cleanup.i + +if.then.i: + %hlsl.wave.active.max7.i = call spir_func i32 @llvm.spv.wave.reduce.umax.i32(i32 %add.i) [ "convergencectrl"(token %3) ] + %4 = getelementptr inbounds i32, ptr %array, i32 %add.i + store i32 %hlsl.wave.active.max7.i, ptr %4, align 4 + br label %cleanup.i + +cleanup.i: + %inc10.i = add nsw i32 %i.0.i, 1 + br label %for.cond.i + +exit: + ret void +} + +declare token @llvm.experimental.convergence.loop() #0 + +declare i32 @llvm.spv.wave.reduce.umax.i32(i32) #0 + +attributes #0 = { convergent } diff --git a/llvm/test/Transforms/IndVarSimplify/turn-to-invariant.ll b/llvm/test/Transforms/IndVarSimplify/turn-to-invariant.ll index 326ee75..d3a5d4c 100644 --- a/llvm/test/Transforms/IndVarSimplify/turn-to-invariant.ll +++ b/llvm/test/Transforms/IndVarSimplify/turn-to-invariant.ll @@ -852,7 +852,7 @@ define i32 @test_litter_conditions_constant(i32 %start, i32 %len) { ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] ; CHECK-NEXT: [[CANONICAL_IV:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[CANONICAL_IV_NEXT:%.*]], [[BACKEDGE]] ] -; CHECK-NEXT: [[CONSTANT_CHECK:%.*]] = icmp ult i32 [[CANONICAL_IV]], 65635 +; CHECK-NEXT: [[CONSTANT_CHECK:%.*]] = icmp samesign ult i32 [[CANONICAL_IV]], 65635 ; CHECK-NEXT: br i1 [[CONSTANT_CHECK]], label [[CONSTANT_CHECK_PASSED:%.*]], label [[CONSTANT_CHECK_FAILED:%.*]] ; CHECK: constant_check_passed: ; CHECK-NEXT: [[ZERO_CHECK:%.*]] = icmp ne i32 [[IV]], 0 diff --git a/llvm/test/Transforms/IndVarSimplify/widen-nonnegative-countdown.ll b/llvm/test/Transforms/IndVarSimplify/widen-nonnegative-countdown.ll index 9c89834..d244422 100644 --- a/llvm/test/Transforms/IndVarSimplify/widen-nonnegative-countdown.ll +++ b/llvm/test/Transforms/IndVarSimplify/widen-nonnegative-countdown.ll @@ -20,7 +20,7 @@ define void @zext_postinc_constant_start(ptr %A) { ; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]] ; CHECK-NEXT: tail call void @use_ptr(ptr [[ARRAYIDX_US]]) ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1 -; CHECK-NEXT: [[CMP2_US:%.*]] = icmp ugt i64 [[INDVARS_IV_NEXT]], 6 +; CHECK-NEXT: [[CMP2_US:%.*]] = icmp samesign ugt i64 [[INDVARS_IV_NEXT]], 6 ; CHECK-NEXT: br i1 [[CMP2_US]], label [[FOR_BODY]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void @@ -51,7 +51,7 @@ define void @zext_preinc_constant_start(ptr %A) { ; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]] ; CHECK-NEXT: tail call void @use_ptr(ptr [[ARRAYIDX_US]]) ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1 -; CHECK-NEXT: [[CMP2_US:%.*]] = icmp ugt i64 [[INDVARS_IV]], 6 +; CHECK-NEXT: [[CMP2_US:%.*]] = icmp samesign ugt i64 [[INDVARS_IV]], 6 ; CHECK-NEXT: br i1 [[CMP2_US]], label [[FOR_BODY]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void @@ -158,7 +158,7 @@ define void @sext_postinc_constant_start(ptr %A) { ; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]] ; CHECK-NEXT: tail call void @use_ptr(ptr [[ARRAYIDX_US]]) ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1 -; CHECK-NEXT: [[CMP2_US:%.*]] = icmp ugt i64 [[INDVARS_IV_NEXT]], 6 +; CHECK-NEXT: [[CMP2_US:%.*]] = icmp samesign ugt i64 [[INDVARS_IV_NEXT]], 6 ; CHECK-NEXT: br i1 [[CMP2_US]], label [[FOR_BODY]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void @@ -189,7 +189,7 @@ define void @sext_preinc_constant_start(ptr %A) { ; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]] ; CHECK-NEXT: tail call void @use_ptr(ptr [[ARRAYIDX_US]]) ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1 -; CHECK-NEXT: [[CMP2_US:%.*]] = icmp ugt i64 [[INDVARS_IV]], 6 +; CHECK-NEXT: [[CMP2_US:%.*]] = icmp samesign ugt i64 [[INDVARS_IV]], 6 ; CHECK-NEXT: br i1 [[CMP2_US]], label [[FOR_BODY]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void @@ -300,7 +300,7 @@ define void @zext_postinc_constant_start_offset_constant_one(ptr %A) { ; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[TMP0]] ; CHECK-NEXT: tail call void @use_ptr(ptr [[ARRAYIDX_US]]) ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1 -; CHECK-NEXT: [[CMP2_US:%.*]] = icmp ugt i64 [[INDVARS_IV_NEXT]], 6 +; CHECK-NEXT: [[CMP2_US:%.*]] = icmp samesign ugt i64 [[INDVARS_IV_NEXT]], 6 ; CHECK-NEXT: br i1 [[CMP2_US]], label [[FOR_BODY]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void @@ -333,7 +333,7 @@ define void @zext_preinc_constant_start_offset_constant_one(ptr %A) { ; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[TMP0]] ; CHECK-NEXT: tail call void @use_ptr(ptr [[ARRAYIDX_US]]) ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1 -; CHECK-NEXT: [[CMP2_US:%.*]] = icmp ugt i64 [[INDVARS_IV]], 6 +; CHECK-NEXT: [[CMP2_US:%.*]] = icmp samesign ugt i64 [[INDVARS_IV]], 6 ; CHECK-NEXT: br i1 [[CMP2_US]], label [[FOR_BODY]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void @@ -448,7 +448,7 @@ define void @sext_postinc_constant_start_offset_constant_one(ptr %A) { ; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[TMP0]] ; CHECK-NEXT: tail call void @use_ptr(ptr [[ARRAYIDX_US]]) ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1 -; CHECK-NEXT: [[CMP2_US:%.*]] = icmp ugt i64 [[INDVARS_IV_NEXT]], 6 +; CHECK-NEXT: [[CMP2_US:%.*]] = icmp samesign ugt i64 [[INDVARS_IV_NEXT]], 6 ; CHECK-NEXT: br i1 [[CMP2_US]], label [[FOR_BODY]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void @@ -481,7 +481,7 @@ define void @sext_preinc_constant_start_offset_constant_one(ptr %A) { ; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[TMP0]] ; CHECK-NEXT: tail call void @use_ptr(ptr [[ARRAYIDX_US]]) ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1 -; CHECK-NEXT: [[CMP2_US:%.*]] = icmp ugt i64 [[INDVARS_IV]], 6 +; CHECK-NEXT: [[CMP2_US:%.*]] = icmp samesign ugt i64 [[INDVARS_IV]], 6 ; CHECK-NEXT: br i1 [[CMP2_US]], label [[FOR_BODY]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void @@ -600,7 +600,7 @@ define void @zext_postinc_constant_start_offset_constant_minus_one(ptr %A) { ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1 ; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV_NEXT]] ; CHECK-NEXT: tail call void @use_ptr(ptr [[ARRAYIDX_US]]) -; CHECK-NEXT: [[CMP2_US:%.*]] = icmp ugt i64 [[INDVARS_IV_NEXT]], 6 +; CHECK-NEXT: [[CMP2_US:%.*]] = icmp samesign ugt i64 [[INDVARS_IV_NEXT]], 6 ; CHECK-NEXT: br i1 [[CMP2_US]], label [[FOR_BODY]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void @@ -632,7 +632,7 @@ define void @zext_preinc_constant_start_offset_constant_minus_one(ptr %A) { ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1 ; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV_NEXT]] ; CHECK-NEXT: tail call void @use_ptr(ptr [[ARRAYIDX_US]]) -; CHECK-NEXT: [[CMP2_US:%.*]] = icmp ugt i64 [[INDVARS_IV]], 6 +; CHECK-NEXT: [[CMP2_US:%.*]] = icmp samesign ugt i64 [[INDVARS_IV]], 6 ; CHECK-NEXT: br i1 [[CMP2_US]], label [[FOR_BODY]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void @@ -744,7 +744,7 @@ define void @sext_postinc_constant_start_offset_constant_minus_one(ptr %A) { ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1 ; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV_NEXT]] ; CHECK-NEXT: tail call void @use_ptr(ptr [[ARRAYIDX_US]]) -; CHECK-NEXT: [[CMP2_US:%.*]] = icmp ugt i64 [[INDVARS_IV_NEXT]], 6 +; CHECK-NEXT: [[CMP2_US:%.*]] = icmp samesign ugt i64 [[INDVARS_IV_NEXT]], 6 ; CHECK-NEXT: br i1 [[CMP2_US]], label [[FOR_BODY]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void @@ -776,7 +776,7 @@ define void @sext_preinc_constant_start_offset_constant_minus_one(ptr %A) { ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1 ; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV_NEXT]] ; CHECK-NEXT: tail call void @use_ptr(ptr [[ARRAYIDX_US]]) -; CHECK-NEXT: [[CMP2_US:%.*]] = icmp ugt i64 [[INDVARS_IV]], 6 +; CHECK-NEXT: [[CMP2_US:%.*]] = icmp samesign ugt i64 [[INDVARS_IV]], 6 ; CHECK-NEXT: br i1 [[CMP2_US]], label [[FOR_BODY]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void diff --git a/llvm/test/Transforms/IndVarSimplify/zext-nuw.ll b/llvm/test/Transforms/IndVarSimplify/zext-nuw.ll index abe7a3e..17921af 100644 --- a/llvm/test/Transforms/IndVarSimplify/zext-nuw.ll +++ b/llvm/test/Transforms/IndVarSimplify/zext-nuw.ll @@ -24,13 +24,13 @@ define void @_Z3fn1v() { ; CHECK-NEXT: [[X8:%.*]] = icmp ult i32 0, 4 ; CHECK-NEXT: br i1 [[X8]], label [[DOTPREHEADER_LR_PH:%.*]], label [[X22]] ; CHECK: .preheader.lr.ph: -; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[K_09]], i64 [[TMP5]] ; CHECK-NEXT: br label [[DOTPREHEADER:%.*]] ; CHECK: .preheader: ; CHECK-NEXT: br label [[X17:%.*]] ; CHECK: x17: ; CHECK-NEXT: br i1 false, label [[DOTPREHEADER]], label [[DOT_CRIT_EDGE_8:%.*]] ; CHECK: ._crit_edge.8: +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[K_09]], i64 [[TMP5]] ; CHECK-NEXT: br label [[X22]] ; CHECK: x22: ; CHECK-NEXT: [[K_1_LCSSA:%.*]] = phi ptr [ [[SCEVGEP]], [[DOT_CRIT_EDGE_8]] ], [ [[K_09]], [[DOTPREHEADER4]] ] |