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-rw-r--r--llvm/test/CodeGen/RISCV/select-const.ll137
1 files changed, 68 insertions, 69 deletions
diff --git a/llvm/test/CodeGen/RISCV/select-const.ll b/llvm/test/CodeGen/RISCV/select-const.ll
index 65d10bb..dfac6e1 100644
--- a/llvm/test/CodeGen/RISCV/select-const.ll
+++ b/llvm/test/CodeGen/RISCV/select-const.ll
@@ -5,7 +5,7 @@
; RUN: | FileCheck -check-prefixes=RV32,RV32IF %s
; RUN: llc -mtriple=riscv32 -mattr=+zicond -target-abi=ilp32 -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefixes=RV32,RV32ZICOND %s
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-xqcicm,+experimental-xqcics,+experimental-xqcicli -verify-machineinstrs < %s \
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-xqcicm,+experimental-xqcics,+experimental-xqcicli,+zca,+short-forward-branch-opt,+conditional-cmv-fusion -verify-machineinstrs < %s \
; RUN: | FileCheck %s --check-prefixes=RV32IXQCI
; RUN: llc -mtriple=riscv64 -target-abi=lp64 -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefixes=RV64,RV64I %s
@@ -579,9 +579,9 @@ define i32 @select_slt_zero_constant1_constant2(i32 signext %x) {
;
; RV32IXQCI-LABEL: select_slt_zero_constant1_constant2:
; RV32IXQCI: # %bb.0:
-; RV32IXQCI-NEXT: srai a0, a0, 31
-; RV32IXQCI-NEXT: andi a0, a0, 10
-; RV32IXQCI-NEXT: addi a0, a0, -3
+; RV32IXQCI-NEXT: li a1, -3
+; RV32IXQCI-NEXT: qc.lilti a1, a0, 0, 7
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64-LABEL: select_slt_zero_constant1_constant2:
@@ -605,9 +605,9 @@ define i32 @select_sgt_negative_one_constant1_constant2(i32 signext %x) {
;
; RV32IXQCI-LABEL: select_sgt_negative_one_constant1_constant2:
; RV32IXQCI: # %bb.0:
-; RV32IXQCI-NEXT: srai a0, a0, 31
-; RV32IXQCI-NEXT: andi a0, a0, -10
-; RV32IXQCI-NEXT: addi a0, a0, 7
+; RV32IXQCI-NEXT: li a1, -3
+; RV32IXQCI-NEXT: qc.ligei a1, a0, 0, 7
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64-LABEL: select_sgt_negative_one_constant1_constant2:
@@ -653,12 +653,10 @@ define i32 @select_nonnegative_lui_addi(i32 signext %x) {
;
; RV32IXQCI-LABEL: select_nonnegative_lui_addi:
; RV32IXQCI: # %bb.0:
-; RV32IXQCI-NEXT: mv a1, a0
-; RV32IXQCI-NEXT: lui a0, 4
-; RV32IXQCI-NEXT: bgez a1, .LBB21_2
-; RV32IXQCI-NEXT: # %bb.1:
-; RV32IXQCI-NEXT: li a0, 25
-; RV32IXQCI-NEXT: .LBB21_2:
+; RV32IXQCI-NEXT: lui a2, 4
+; RV32IXQCI-NEXT: li a1, 25
+; RV32IXQCI-NEXT: qc.mvgei a1, a0, 0, a2
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64I-LABEL: select_nonnegative_lui_addi:
@@ -726,12 +724,10 @@ define i32 @select_nonnegative_lui_addi_swapped(i32 signext %x) {
;
; RV32IXQCI-LABEL: select_nonnegative_lui_addi_swapped:
; RV32IXQCI: # %bb.0:
-; RV32IXQCI-NEXT: bgez a0, .LBB22_2
-; RV32IXQCI-NEXT: # %bb.1:
-; RV32IXQCI-NEXT: lui a0, 4
-; RV32IXQCI-NEXT: ret
-; RV32IXQCI-NEXT: .LBB22_2:
-; RV32IXQCI-NEXT: li a0, 25
+; RV32IXQCI-NEXT: li a2, 25
+; RV32IXQCI-NEXT: lui a1, 4
+; RV32IXQCI-NEXT: qc.mvgei a1, a0, 0, a2
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64I-LABEL: select_nonnegative_lui_addi_swapped:
@@ -801,13 +797,13 @@ define i32 @diff_shl_addi(i32 signext %x) {
;
; RV32IXQCI-LABEL: diff_shl_addi:
; RV32IXQCI: # %bb.0:
+; RV32IXQCI-NEXT: lui a2, 4
+; RV32IXQCI-NEXT: li a1, 25
; RV32IXQCI-NEXT: bgez a0, .LBB23_2
; RV32IXQCI-NEXT: # %bb.1:
-; RV32IXQCI-NEXT: lui a0, 4
-; RV32IXQCI-NEXT: addi a0, a0, 25
-; RV32IXQCI-NEXT: ret
+; RV32IXQCI-NEXT: addi a1, a2, 25
; RV32IXQCI-NEXT: .LBB23_2:
-; RV32IXQCI-NEXT: li a0, 25
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64I-LABEL: diff_shl_addi:
@@ -876,13 +872,13 @@ define i32 @diff_shl_addi2(i32 signext %x) {
;
; RV32IXQCI-LABEL: diff_shl_addi2:
; RV32IXQCI: # %bb.0:
-; RV32IXQCI-NEXT: bgez a0, .LBB24_2
+; RV32IXQCI-NEXT: lui a2, 4
+; RV32IXQCI-NEXT: li a1, 25
+; RV32IXQCI-NEXT: bltz a0, .LBB24_2
; RV32IXQCI-NEXT: # %bb.1:
-; RV32IXQCI-NEXT: li a0, 25
-; RV32IXQCI-NEXT: ret
+; RV32IXQCI-NEXT: addi a1, a2, 25
; RV32IXQCI-NEXT: .LBB24_2:
-; RV32IXQCI-NEXT: lui a0, 4
-; RV32IXQCI-NEXT: addi a0, a0, 25
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64I-LABEL: diff_shl_addi2:
@@ -929,9 +925,10 @@ define i32 @diff_pow2_24_16(i32 signext %x) {
;
; RV32IXQCI-LABEL: diff_pow2_24_16:
; RV32IXQCI: # %bb.0:
-; RV32IXQCI-NEXT: srai a0, a0, 31
-; RV32IXQCI-NEXT: andi a0, a0, -8
-; RV32IXQCI-NEXT: addi a0, a0, 24
+; RV32IXQCI-NEXT: li a2, 24
+; RV32IXQCI-NEXT: li a1, 16
+; RV32IXQCI-NEXT: qc.mvgei a1, a0, 0, a2
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64-LABEL: diff_pow2_24_16:
@@ -955,9 +952,10 @@ define i32 @diff_pow2_16_24(i32 signext %x) {
;
; RV32IXQCI-LABEL: diff_pow2_16_24:
; RV32IXQCI: # %bb.0:
-; RV32IXQCI-NEXT: srli a0, a0, 28
-; RV32IXQCI-NEXT: andi a0, a0, 8
-; RV32IXQCI-NEXT: addi a0, a0, 16
+; RV32IXQCI-NEXT: li a2, 16
+; RV32IXQCI-NEXT: li a1, 24
+; RV32IXQCI-NEXT: qc.mvgei a1, a0, 0, a2
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64-LABEL: diff_pow2_16_24:
@@ -1008,14 +1006,14 @@ define i32 @zext_or_constant(i32 signext %x) {
;
; RV32IXQCI-LABEL: zext_or_constant:
; RV32IXQCI: # %bb.0:
-; RV32IXQCI-NEXT: bgez a0, .LBB27_2
+; RV32IXQCI-NEXT: srli a2, a0, 31
+; RV32IXQCI-NEXT: lui a1, 140
+; RV32IXQCI-NEXT: addi a1, a1, 417
+; RV32IXQCI-NEXT: bltz a0, .LBB27_2
; RV32IXQCI-NEXT: # %bb.1:
-; RV32IXQCI-NEXT: lui a0, 140
-; RV32IXQCI-NEXT: addi a0, a0, 417
-; RV32IXQCI-NEXT: ret
+; RV32IXQCI-NEXT: xori a1, a2, 1
; RV32IXQCI-NEXT: .LBB27_2:
-; RV32IXQCI-NEXT: srli a0, a0, 31
-; RV32IXQCI-NEXT: xori a0, a0, 1
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64I-LABEL: zext_or_constant:
@@ -1095,14 +1093,14 @@ define i32 @zext_or_constant2(i32 signext %x) {
;
; RV32IXQCI-LABEL: zext_or_constant2:
; RV32IXQCI: # %bb.0:
-; RV32IXQCI-NEXT: bltz a0, .LBB28_2
+; RV32IXQCI-NEXT: srli a2, a0, 31
+; RV32IXQCI-NEXT: lui a1, 140
+; RV32IXQCI-NEXT: addi a1, a1, 417
+; RV32IXQCI-NEXT: bgez a0, .LBB28_2
; RV32IXQCI-NEXT: # %bb.1:
-; RV32IXQCI-NEXT: lui a0, 140
-; RV32IXQCI-NEXT: addi a0, a0, 417
-; RV32IXQCI-NEXT: ret
+; RV32IXQCI-NEXT: xori a1, a2, 1
; RV32IXQCI-NEXT: .LBB28_2:
-; RV32IXQCI-NEXT: srli a0, a0, 31
-; RV32IXQCI-NEXT: xori a0, a0, 1
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64I-LABEL: zext_or_constant2:
@@ -1183,14 +1181,14 @@ define i32 @sext_or_constant(i32 signext %x) {
;
; RV32IXQCI-LABEL: sext_or_constant:
; RV32IXQCI: # %bb.0:
-; RV32IXQCI-NEXT: bgez a0, .LBB29_2
+; RV32IXQCI-NEXT: srli a2, a0, 31
+; RV32IXQCI-NEXT: lui a1, 140
+; RV32IXQCI-NEXT: addi a1, a1, 417
+; RV32IXQCI-NEXT: bltz a0, .LBB29_2
; RV32IXQCI-NEXT: # %bb.1:
-; RV32IXQCI-NEXT: lui a0, 140
-; RV32IXQCI-NEXT: addi a0, a0, 417
-; RV32IXQCI-NEXT: ret
+; RV32IXQCI-NEXT: addi a1, a2, -1
; RV32IXQCI-NEXT: .LBB29_2:
-; RV32IXQCI-NEXT: srli a0, a0, 31
-; RV32IXQCI-NEXT: addi a0, a0, -1
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64I-LABEL: sext_or_constant:
@@ -1271,14 +1269,14 @@ define i32 @sext_or_constant2(i32 signext %x) {
;
; RV32IXQCI-LABEL: sext_or_constant2:
; RV32IXQCI: # %bb.0:
-; RV32IXQCI-NEXT: bltz a0, .LBB30_2
+; RV32IXQCI-NEXT: srli a2, a0, 31
+; RV32IXQCI-NEXT: lui a1, 140
+; RV32IXQCI-NEXT: addi a1, a1, 417
+; RV32IXQCI-NEXT: bgez a0, .LBB30_2
; RV32IXQCI-NEXT: # %bb.1:
-; RV32IXQCI-NEXT: lui a0, 140
-; RV32IXQCI-NEXT: addi a0, a0, 417
-; RV32IXQCI-NEXT: ret
+; RV32IXQCI-NEXT: addi a1, a2, -1
; RV32IXQCI-NEXT: .LBB30_2:
-; RV32IXQCI-NEXT: srli a0, a0, 31
-; RV32IXQCI-NEXT: addi a0, a0, -1
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64I-LABEL: sext_or_constant2:
@@ -1332,9 +1330,9 @@ define i32 @select_0_6(i32 signext %x) {
;
; RV32IXQCI-LABEL: select_0_6:
; RV32IXQCI: # %bb.0:
-; RV32IXQCI-NEXT: srai a0, a0, 2
-; RV32IXQCI-NEXT: srli a0, a0, 30
-; RV32IXQCI-NEXT: slli a0, a0, 1
+; RV32IXQCI-NEXT: li a1, 6
+; RV32IXQCI-NEXT: qc.ligei a1, a0, 0, 0
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64-LABEL: select_0_6:
@@ -1358,9 +1356,9 @@ define i32 @select_6_0(i32 signext %x) {
;
; RV32IXQCI-LABEL: select_6_0:
; RV32IXQCI: # %bb.0:
-; RV32IXQCI-NEXT: srli a0, a0, 31
-; RV32IXQCI-NEXT: addi a0, a0, -1
-; RV32IXQCI-NEXT: andi a0, a0, 6
+; RV32IXQCI-NEXT: li a1, 0
+; RV32IXQCI-NEXT: qc.ligei a1, a0, 0, 6
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64-LABEL: select_6_0:
@@ -1383,8 +1381,9 @@ define i32 @select_0_394(i32 signext %x) {
;
; RV32IXQCI-LABEL: select_0_394:
; RV32IXQCI: # %bb.0:
-; RV32IXQCI-NEXT: srai a0, a0, 31
-; RV32IXQCI-NEXT: andi a0, a0, 394
+; RV32IXQCI-NEXT: li a1, 394
+; RV32IXQCI-NEXT: qc.ligei a1, a0, 0, 0
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64-LABEL: select_0_394:
@@ -1407,9 +1406,9 @@ define i32 @select_394_0(i32 signext %x) {
;
; RV32IXQCI-LABEL: select_394_0:
; RV32IXQCI: # %bb.0:
-; RV32IXQCI-NEXT: srli a0, a0, 31
-; RV32IXQCI-NEXT: addi a0, a0, -1
-; RV32IXQCI-NEXT: andi a0, a0, 394
+; RV32IXQCI-NEXT: li a1, 394
+; RV32IXQCI-NEXT: qc.lilti a1, a0, 0, 0
+; RV32IXQCI-NEXT: mv a0, a1
; RV32IXQCI-NEXT: ret
;
; RV64-LABEL: select_394_0:
generated by cgit v1.1 at 2025-10-02 09:52:56 +0000