diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll | 1806 |
1 files changed, 1068 insertions, 738 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll index 685e2fb..6ada0cb 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll @@ -1104,16 +1104,15 @@ define <3 x i32> @bitcast_v12i8_to_v3i32(<12 x i8> %a, i32 %b) { ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v7.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v5.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v4.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v2.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v0.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v1.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v3.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v9.h -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v8.h -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v9.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v11.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v1.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v3.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v8.h +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v9.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v11.l ; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2 ; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v12 @@ -1128,37 +1127,28 @@ define <3 x i32> @bitcast_v12i8_to_v3i32(<12 x i8> %a, i32 %b) { ; GFX11-TRUE16-NEXT: .LBB6_3: ; %cmp.false ; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v7.h ; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v7.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, 0 -; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.l -; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.h -; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v0.l, v5.l -; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v5.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v7.h -; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v1.l, v4.h +; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.h +; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l ; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l ; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l +; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v5.h +; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v4.h +; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v5.l +; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v3.l +; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v3.h +; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v4.l +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v7, v0 -; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v1.h, v4.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v7.h -; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v3.h -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v7, v4 -; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v2.l, v3.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v7.h -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v2 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16 ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 ; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB6_2 ; GFX11-TRUE16-NEXT: .LBB6_4: ; %cmp.true @@ -1166,36 +1156,26 @@ define <3 x i32> @bitcast_v12i8_to_v3i32(<12 x i8> %a, i32 %b) { ; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v7.l, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v6.h, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, 0 -; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l -; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h ; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3 +; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l +; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h ; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l -; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v5.l, v0.l -; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v5.h, v0.h ; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v7.h -; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v4.l, v1.l -; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v0.l -; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v0.h -; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.h, v1.h ; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l ; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v7, v5 -; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v1.l +; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v5.h, v0.l +; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v4.h, v0.h +; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v5.l, v1.l +; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v3.l, v1.h +; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v3.h, v2.l +; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v4.l, v2.h +; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l +; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h +; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l ; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v7.h -; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v3.l, v2.l -; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v3.h, v2.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v7, v1 -; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v2.l -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l ; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v7.h -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v2 ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; @@ -2422,89 +2402,171 @@ define inreg <3 x i32> @bitcast_v6bf16_to_v3i32_scalar(<6 x bfloat> inreg %a, i3 ; GFX9-NEXT: v_mov_b32_e32 v2, s18 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; -; GFX11-LABEL: bitcast_v6bf16_to_v3i32_scalar: -; GFX11: ; %bb.0: -; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-NEXT: s_cmp_lg_u32 s3, 0 -; GFX11-NEXT: s_mov_b32 s3, 0 -; GFX11-NEXT: s_cbranch_scc0 .LBB11_3 -; GFX11-NEXT: ; %bb.1: ; %Flow -; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s3 -; GFX11-NEXT: s_cbranch_vccnz .LBB11_4 -; GFX11-NEXT: .LBB11_2: ; %cmp.true -; GFX11-NEXT: s_pack_lh_b32_b16 s3, 0, s2 -; GFX11-NEXT: s_lshl_b32 s2, s2, 16 -; GFX11-NEXT: v_add_f32_e64 v0, 0x40c00000, s3 -; GFX11-NEXT: v_add_f32_e64 v1, 0x40c00000, s2 -; GFX11-NEXT: s_pack_lh_b32_b16 s2, 0, s0 -; GFX11-NEXT: s_lshl_b32 s0, s0, 16 -; GFX11-NEXT: s_pack_lh_b32_b16 s3, 0, s1 -; GFX11-NEXT: v_bfe_u32 v2, v0, 16, 1 -; GFX11-NEXT: v_bfe_u32 v3, v1, 16, 1 -; GFX11-NEXT: v_or_b32_e32 v8, 0x400000, v0 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-NEXT: v_add_f32_e64 v7, 0x40c00000, s0 -; GFX11-NEXT: v_or_b32_e32 v9, 0x400000, v1 -; GFX11-NEXT: v_add_nc_u32_e32 v3, v3, v1 -; GFX11-NEXT: v_add_f32_e64 v4, 0x40c00000, s3 -; GFX11-NEXT: s_lshl_b32 s1, s1, 16 -; GFX11-NEXT: v_or_b32_e32 v12, 0x400000, v7 -; GFX11-NEXT: v_add_f32_e64 v5, 0x40c00000, s1 -; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3 -; GFX11-NEXT: v_add_nc_u32_e32 v2, v2, v0 -; GFX11-NEXT: v_bfe_u32 v10, v4, 16, 1 -; GFX11-NEXT: v_add_f32_e64 v6, 0x40c00000, s2 -; GFX11-NEXT: v_or_b32_e32 v11, 0x400000, v5 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 -; GFX11-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 -; GFX11-NEXT: v_bfe_u32 v2, v5, 16, 1 -; GFX11-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX11-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo -; GFX11-NEXT: v_add_nc_u32_e32 v3, v10, v4 -; GFX11-NEXT: v_or_b32_e32 v10, 0x400000, v4 -; GFX11-NEXT: v_bfe_u32 v9, v6, 16, 1 -; GFX11-NEXT: v_add_nc_u32_e32 v8, v8, v7 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3 -; GFX11-NEXT: v_add_nc_u32_e32 v2, v2, v5 -; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX11-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 -; GFX11-NEXT: v_add_nc_u32_e32 v9, v9, v6 -; GFX11-NEXT: v_dual_cndmask_b32 v2, v2, v11 :: v_dual_and_b32 v1, 0xffff, v1 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v9 -; GFX11-NEXT: v_or_b32_e32 v9, 0x400000, v6 -; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX11-NEXT: v_cndmask_b32_e32 v7, v8, v12, vcc_lo -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 -; GFX11-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 -; GFX11-NEXT: v_and_b32_e32 v6, 0xffff, v2 -; GFX11-NEXT: v_lshl_or_b32 v2, v0, 16, v1 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; GFX11-NEXT: v_cndmask_b32_e32 v4, v5, v9, vcc_lo -; GFX11-NEXT: v_lshrrev_b32_e32 v5, 16, v7 -; GFX11-NEXT: v_lshl_or_b32 v1, v3, 16, v6 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_lshrrev_b32_e32 v4, 16, v4 -; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX11-NEXT: v_lshl_or_b32 v0, v4, 16, v5 -; GFX11-NEXT: s_setpc_b64 s[30:31] -; GFX11-NEXT: .LBB11_3: -; GFX11-NEXT: s_branch .LBB11_2 -; GFX11-NEXT: .LBB11_4: -; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 -; GFX11-NEXT: v_mov_b32_e32 v2, s2 -; GFX11-NEXT: s_setpc_b64 s[30:31] +; GFX11-TRUE16-LABEL: bitcast_v6bf16_to_v3i32_scalar: +; GFX11-TRUE16: ; %bb.0: +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0 +; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0 +; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB11_3 +; GFX11-TRUE16-NEXT: ; %bb.1: ; %Flow +; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s3 +; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB11_4 +; GFX11-TRUE16-NEXT: .LBB11_2: ; %cmp.true +; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s2 +; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 16 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s3 +; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s1 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s2 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s3 +; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 +; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1 +; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s0 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v3 +; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s2 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v1 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v3 +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v6, 16, 1 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v4 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v7, v2, vcc_lo +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v6 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v7, v4 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v0.l +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v9 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v6 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v8, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v7, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v1, v11, vcc_lo +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v5 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v4 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v6.l +; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] +; GFX11-TRUE16-NEXT: .LBB11_3: +; GFX11-TRUE16-NEXT: s_branch .LBB11_2 +; GFX11-TRUE16-NEXT: .LBB11_4: +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, s2 +; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v3i32_scalar: +; GFX11-FAKE16: ; %bb.0: +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 0 +; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0 +; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB11_3 +; GFX11-FAKE16-NEXT: ; %bb.1: ; %Flow +; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s3 +; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB11_4 +; GFX11-FAKE16-NEXT: .LBB11_2: ; %cmp.true +; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s2 +; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 16 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s3 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s2 +; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s2, 0, s0 +; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16 +; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v1 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v3, v1 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s3 +; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v7 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s1 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v0 +; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v4, 16, 1 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s2 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v5 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v5, 16, 1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v10, v4 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v4 +; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v6, 16, 1 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v8, v7 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v5 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v9, v6 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v2, v2, v11 :: v_dual_and_b32 v1, 0xffff, v1 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v9 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v6 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v8, v12, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v2 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v0, 16, v1 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v5, v9, vcc_lo +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v7 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v3, 16, v6 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v4, 16, v5 +; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] +; GFX11-FAKE16-NEXT: .LBB11_3: +; GFX11-FAKE16-NEXT: s_branch .LBB11_2 +; GFX11-FAKE16-NEXT: .LBB11_4: +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v2, s2 +; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] %cmp = icmp eq i32 %b, 0 br i1 %cmp, label %cmp.true, label %cmp.false @@ -4254,16 +4316,15 @@ define <3 x float> @bitcast_v12i8_to_v3f32(<12 x i8> %a, i32 %b) { ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v7.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v5.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v4.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v2.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v0.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v1.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v3.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v9.h -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v8.h -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v9.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v11.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v1.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v3.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.l, 8, v8.h +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v3.h, 8, v9.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v11.l ; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2 ; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v12 @@ -4278,37 +4339,28 @@ define <3 x float> @bitcast_v12i8_to_v3f32(<12 x i8> %a, i32 %b) { ; GFX11-TRUE16-NEXT: .LBB22_3: ; %cmp.false ; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v7.h ; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v7.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, 0 -; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.l -; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.h -; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v0.l, v5.l -; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v5.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v7.h -; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v1.l, v4.h +; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v6.h +; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v6.l ; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l ; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l +; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v5.h +; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v4.h +; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v5.l +; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v3.l +; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v3.h +; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v4.l +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v7, v0 -; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v1.h, v4.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v7.h -; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v3.h -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v7, v4 -; GFX11-TRUE16-NEXT: v_or_b16 v7.l, v2.l, v3.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v7.h -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_lo16 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v2 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16 ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 ; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB22_2 ; GFX11-TRUE16-NEXT: .LBB22_4: ; %cmp.true @@ -4316,36 +4368,26 @@ define <3 x float> @bitcast_v12i8_to_v3f32(<12 x i8> %a, i32 %b) { ; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v7.l, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v6.h, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v6.l, 3 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, 0 -; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l -; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h ; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3 +; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l +; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h ; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l -; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v5.l, v0.l -; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v5.h, v0.h ; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v7.h -; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v4.l, v1.l -; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v0.l -; GFX11-TRUE16-NEXT: v_add_nc_u16 v5.h, 0x300, v0.h -; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.h, v1.h ; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l ; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v7, v5 -; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v1.l +; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v5.h, v0.l +; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v4.h, v0.h +; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v5.l, v1.l +; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v3.l, v1.h +; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v3.h, v2.l +; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v4.l, v2.h +; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l +; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h +; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l ; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v7.h -; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v3.l, v2.l -; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v3.h, v2.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v7, v1 -; GFX11-TRUE16-NEXT: v_add_nc_u16 v7.l, 0x300, v2.l -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l ; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v7.h -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v7, v2 ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; @@ -5576,89 +5618,171 @@ define inreg <3 x float> @bitcast_v6bf16_to_v3f32_scalar(<6 x bfloat> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v2, s18 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; -; GFX11-LABEL: bitcast_v6bf16_to_v3f32_scalar: -; GFX11: ; %bb.0: -; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-NEXT: s_cmp_lg_u32 s3, 0 -; GFX11-NEXT: s_mov_b32 s3, 0 -; GFX11-NEXT: s_cbranch_scc0 .LBB27_3 -; GFX11-NEXT: ; %bb.1: ; %Flow -; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s3 -; GFX11-NEXT: s_cbranch_vccnz .LBB27_4 -; GFX11-NEXT: .LBB27_2: ; %cmp.true -; GFX11-NEXT: s_pack_lh_b32_b16 s3, 0, s2 -; GFX11-NEXT: s_lshl_b32 s2, s2, 16 -; GFX11-NEXT: v_add_f32_e64 v0, 0x40c00000, s3 -; GFX11-NEXT: v_add_f32_e64 v1, 0x40c00000, s2 -; GFX11-NEXT: s_pack_lh_b32_b16 s2, 0, s0 -; GFX11-NEXT: s_lshl_b32 s0, s0, 16 -; GFX11-NEXT: s_pack_lh_b32_b16 s3, 0, s1 -; GFX11-NEXT: v_bfe_u32 v2, v0, 16, 1 -; GFX11-NEXT: v_bfe_u32 v3, v1, 16, 1 -; GFX11-NEXT: v_or_b32_e32 v8, 0x400000, v0 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-NEXT: v_add_f32_e64 v7, 0x40c00000, s0 -; GFX11-NEXT: v_or_b32_e32 v9, 0x400000, v1 -; GFX11-NEXT: v_add_nc_u32_e32 v3, v3, v1 -; GFX11-NEXT: v_add_f32_e64 v4, 0x40c00000, s3 -; GFX11-NEXT: s_lshl_b32 s1, s1, 16 -; GFX11-NEXT: v_or_b32_e32 v12, 0x400000, v7 -; GFX11-NEXT: v_add_f32_e64 v5, 0x40c00000, s1 -; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3 -; GFX11-NEXT: v_add_nc_u32_e32 v2, v2, v0 -; GFX11-NEXT: v_bfe_u32 v10, v4, 16, 1 -; GFX11-NEXT: v_add_f32_e64 v6, 0x40c00000, s2 -; GFX11-NEXT: v_or_b32_e32 v11, 0x400000, v5 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 -; GFX11-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 -; GFX11-NEXT: v_bfe_u32 v2, v5, 16, 1 -; GFX11-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX11-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo -; GFX11-NEXT: v_add_nc_u32_e32 v3, v10, v4 -; GFX11-NEXT: v_or_b32_e32 v10, 0x400000, v4 -; GFX11-NEXT: v_bfe_u32 v9, v6, 16, 1 -; GFX11-NEXT: v_add_nc_u32_e32 v8, v8, v7 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3 -; GFX11-NEXT: v_add_nc_u32_e32 v2, v2, v5 -; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX11-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 -; GFX11-NEXT: v_add_nc_u32_e32 v9, v9, v6 -; GFX11-NEXT: v_dual_cndmask_b32 v2, v2, v11 :: v_dual_and_b32 v1, 0xffff, v1 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v9 -; GFX11-NEXT: v_or_b32_e32 v9, 0x400000, v6 -; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX11-NEXT: v_cndmask_b32_e32 v7, v8, v12, vcc_lo -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 -; GFX11-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 -; GFX11-NEXT: v_and_b32_e32 v6, 0xffff, v2 -; GFX11-NEXT: v_lshl_or_b32 v2, v0, 16, v1 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; GFX11-NEXT: v_cndmask_b32_e32 v4, v5, v9, vcc_lo -; GFX11-NEXT: v_lshrrev_b32_e32 v5, 16, v7 -; GFX11-NEXT: v_lshl_or_b32 v1, v3, 16, v6 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_lshrrev_b32_e32 v4, 16, v4 -; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX11-NEXT: v_lshl_or_b32 v0, v4, 16, v5 -; GFX11-NEXT: s_setpc_b64 s[30:31] -; GFX11-NEXT: .LBB27_3: -; GFX11-NEXT: s_branch .LBB27_2 -; GFX11-NEXT: .LBB27_4: -; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 -; GFX11-NEXT: v_mov_b32_e32 v2, s2 -; GFX11-NEXT: s_setpc_b64 s[30:31] +; GFX11-TRUE16-LABEL: bitcast_v6bf16_to_v3f32_scalar: +; GFX11-TRUE16: ; %bb.0: +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0 +; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0 +; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB27_3 +; GFX11-TRUE16-NEXT: ; %bb.1: ; %Flow +; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s3 +; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB27_4 +; GFX11-TRUE16-NEXT: .LBB27_2: ; %cmp.true +; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s2 +; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 16 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s3 +; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s1 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s2 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s3 +; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 +; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1 +; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s0 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v3 +; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s2 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v1 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v3 +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v6, 16, 1 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v4 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v7, v2, vcc_lo +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v6 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v7, v4 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v0.l +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v9 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v6 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v8, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v7, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v1, v11, vcc_lo +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v5 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v4 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v6.l +; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] +; GFX11-TRUE16-NEXT: .LBB27_3: +; GFX11-TRUE16-NEXT: s_branch .LBB27_2 +; GFX11-TRUE16-NEXT: .LBB27_4: +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v2, s2 +; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v3f32_scalar: +; GFX11-FAKE16: ; %bb.0: +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 0 +; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0 +; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB27_3 +; GFX11-FAKE16-NEXT: ; %bb.1: ; %Flow +; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s3 +; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB27_4 +; GFX11-FAKE16-NEXT: .LBB27_2: ; %cmp.true +; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s2 +; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 16 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s3 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s2 +; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s2, 0, s0 +; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16 +; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v1 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v3, v1 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s3 +; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v7 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s1 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v0 +; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v4, 16, 1 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s2 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v5 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v5, 16, 1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v10, v4 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v4 +; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v6, 16, 1 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v8, v7 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v5 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v9, v6 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v2, v2, v11 :: v_dual_and_b32 v1, 0xffff, v1 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v9 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v6 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v8, v12, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v2 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v0, 16, v1 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v5, v9, vcc_lo +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v7 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v3, 16, v6 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v4, 16, v5 +; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] +; GFX11-FAKE16-NEXT: .LBB27_3: +; GFX11-FAKE16-NEXT: s_branch .LBB27_2 +; GFX11-FAKE16-NEXT: .LBB27_4: +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v2, s2 +; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] %cmp = icmp eq i32 %b, 0 br i1 %cmp, label %cmp.true, label %cmp.false @@ -6909,12 +7033,12 @@ define <6 x bfloat> @bitcast_v12i8_to_v6bf16(<12 x i8> %a, i32 %b) { ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v4.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v2.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v0.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v1.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v3.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v10.h -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v9.h -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v11.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v1.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v3.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v5.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v10.h +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v9.h +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l ; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v12 @@ -6929,37 +7053,28 @@ define <6 x bfloat> @bitcast_v12i8_to_v6bf16(<12 x i8> %a, i32 %b) { ; GFX11-TRUE16-NEXT: .LBB36_3: ; %cmp.false ; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v9.l ; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v8.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0 -; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.l -; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v7.h -; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v0.l, v6.l -; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v6.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.h -; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v1.l, v5.h +; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.h +; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v7.l ; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l ; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l +; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v6.h +; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v5.h +; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v6.l +; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l +; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h +; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v3, v0 -; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v1.h, v5.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.h -; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v4.h -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v5 -; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v2.l, v4.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16 ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 ; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB36_2 ; GFX11-TRUE16-NEXT: .LBB36_4: ; %cmp.true @@ -6967,36 +7082,26 @@ define <6 x bfloat> @bitcast_v12i8_to_v6bf16(<12 x i8> %a, i32 %b) { ; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v8.h, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.h, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v7.l, 3 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0 -; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l -; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h ; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3 +; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l +; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h ; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l -; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v6.l, v0.l -; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v6.h, v0.h ; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.h -; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v5.l, v1.l -; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v0.l -; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v0.h -; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v5.h, v1.h ; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l ; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v3, v6 -; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v1.l +; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v6.h, v0.l +; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v5.h, v0.h +; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v6.l, v1.l +; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h +; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l +; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h +; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l +; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h +; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l ; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.h -; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.l, v2.l -; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v4.h, v2.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1 -; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v2.l -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l ; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2 ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; @@ -8288,124 +8393,243 @@ define inreg <12 x i8> @bitcast_v6bf16_to_v12i8_scalar(<6 x bfloat> inreg %a, i3 ; GFX9-NEXT: v_mov_b32_e32 v4, s17 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; -; GFX11-LABEL: bitcast_v6bf16_to_v12i8_scalar: -; GFX11: ; %bb.0: -; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-NEXT: s_cmp_lg_u32 s3, 0 -; GFX11-NEXT: s_mov_b32 s3, 0 -; GFX11-NEXT: s_cbranch_scc0 .LBB39_3 -; GFX11-NEXT: ; %bb.1: ; %cmp.false -; GFX11-NEXT: s_lshr_b32 s13, s2, 16 -; GFX11-NEXT: s_lshr_b32 s12, s2, 8 -; GFX11-NEXT: s_lshr_b32 s8, s1, 24 -; GFX11-NEXT: s_lshr_b32 s14, s1, 16 -; GFX11-NEXT: s_lshr_b32 s9, s1, 8 -; GFX11-NEXT: s_lshr_b32 s11, s0, 16 -; GFX11-NEXT: s_lshr_b32 s10, s0, 8 -; GFX11-NEXT: s_lshr_b64 s[6:7], s[2:3], 24 -; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], 24 -; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s3 -; GFX11-NEXT: s_cbranch_vccnz .LBB39_4 -; GFX11-NEXT: .LBB39_2: ; %cmp.true -; GFX11-NEXT: s_pack_lh_b32_b16 s3, 0, s1 -; GFX11-NEXT: s_lshl_b32 s1, s1, 16 -; GFX11-NEXT: v_add_f32_e64 v0, 0x40c00000, s3 -; GFX11-NEXT: v_add_f32_e64 v1, 0x40c00000, s1 -; GFX11-NEXT: s_pack_lh_b32_b16 s3, 0, s0 -; GFX11-NEXT: s_lshl_b32 s0, s0, 16 -; GFX11-NEXT: s_pack_lh_b32_b16 s1, 0, s2 -; GFX11-NEXT: v_bfe_u32 v2, v0, 16, 1 -; GFX11-NEXT: v_bfe_u32 v3, v1, 16, 1 -; GFX11-NEXT: v_or_b32_e32 v6, 0x400000, v0 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-NEXT: v_or_b32_e32 v9, 0x400000, v1 -; GFX11-NEXT: v_add_f32_e64 v5, 0x40c00000, s0 -; GFX11-NEXT: v_add_nc_u32_e32 v3, v3, v1 -; GFX11-NEXT: s_lshl_b32 s2, s2, 16 -; GFX11-NEXT: v_add_f32_e64 v4, 0x40c00000, s3 -; GFX11-NEXT: v_add_f32_e64 v8, 0x40c00000, s2 -; GFX11-NEXT: v_add_f32_e64 v7, 0x40c00000, s1 -; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3 -; GFX11-NEXT: v_add_nc_u32_e32 v2, v2, v0 -; GFX11-NEXT: v_bfe_u32 v10, v4, 16, 1 -; GFX11-NEXT: v_or_b32_e32 v11, 0x400000, v8 -; GFX11-NEXT: v_mov_b32_e32 v12, 0x7fc07fc0 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 -; GFX11-NEXT: v_cndmask_b32_e32 v0, v2, v6, vcc_lo -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 -; GFX11-NEXT: v_bfe_u32 v2, v5, 16, 1 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4) -; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v0 -; GFX11-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo -; GFX11-NEXT: v_bfe_u32 v0, v8, 16, 1 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-NEXT: v_or_b32_e32 v9, 0x400000, v4 -; GFX11-NEXT: v_lshrrev_b32_e32 v13, 16, v1 -; GFX11-NEXT: v_add_nc_u32_e32 v1, v2, v5 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1 -; GFX11-NEXT: v_add_nc_u32_e32 v0, v0, v8 -; GFX11-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v0 -; GFX11-NEXT: v_add_nc_u32_e32 v3, v10, v4 -; GFX11-NEXT: v_or_b32_e32 v10, 0x400000, v5 -; GFX11-NEXT: v_or_b32_e32 v5, 0x400000, v7 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) -; GFX11-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc_lo -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 -; GFX11-NEXT: v_cndmask_b32_e32 v8, v0, v11, vcc_lo -; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v3 -; GFX11-NEXT: v_bfe_u32 v3, v7, 16, 1 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 -; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v1 -; GFX11-NEXT: v_lshrrev_b32_e32 v8, 16, v8 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_dual_cndmask_b32 v2, v2, v9 :: v_dual_add_nc_u32 v3, v3, v7 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 -; GFX11-NEXT: v_and_b32_e32 v9, 0xffff, v8 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3 -; GFX11-NEXT: v_lshrrev_b32_e32 v4, 16, v2 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo -; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v13 -; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v0 -; GFX11-NEXT: v_lshrrev_b32_e32 v7, 16, v1 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_lshl_or_b32 v2, v6, 16, v3 -; GFX11-NEXT: v_lshl_or_b32 v1, v4, 16, v5 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_lshl_or_b32 v11, v7, 16, v9 -; GFX11-NEXT: v_lshrrev_b32_e32 v7, 24, v2 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2] -; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v2 -; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v1 -; GFX11-NEXT: v_lshrrev_b32_e32 v10, 16, v11 -; GFX11-NEXT: v_lshrrev_b32_e32 v9, 8, v11 -; GFX11-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12] -; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v1 -; GFX11-NEXT: v_mov_b32_e32 v4, v13 -; GFX11-NEXT: s_setpc_b64 s[30:31] -; GFX11-NEXT: .LBB39_3: -; GFX11-NEXT: ; implicit-def: $sgpr10 -; GFX11-NEXT: ; implicit-def: $sgpr11 -; GFX11-NEXT: ; implicit-def: $sgpr4 -; GFX11-NEXT: ; implicit-def: $sgpr9 -; GFX11-NEXT: ; implicit-def: $sgpr14 -; GFX11-NEXT: ; implicit-def: $sgpr8 -; GFX11-NEXT: ; implicit-def: $sgpr12 -; GFX11-NEXT: ; implicit-def: $sgpr13 -; GFX11-NEXT: ; implicit-def: $sgpr6 -; GFX11-NEXT: s_branch .LBB39_2 -; GFX11-NEXT: .LBB39_4: -; GFX11-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s12 -; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s10 -; GFX11-NEXT: v_dual_mov_b32 v6, s14 :: v_dual_mov_b32 v7, s8 -; GFX11-NEXT: v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v5, s9 -; GFX11-NEXT: v_dual_mov_b32 v2, s11 :: v_dual_mov_b32 v11, s6 -; GFX11-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s1 -; GFX11-NEXT: s_setpc_b64 s[30:31] +; GFX11-TRUE16-LABEL: bitcast_v6bf16_to_v12i8_scalar: +; GFX11-TRUE16: ; %bb.0: +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0 +; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0 +; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB39_3 +; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false +; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s2, 16 +; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s2, 8 +; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s1, 24 +; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s1, 16 +; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s1, 8 +; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s0, 16 +; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s0, 8 +; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24 +; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24 +; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s3 +; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB39_4 +; GFX11-TRUE16-NEXT: .LBB39_2: ; %cmp.true +; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s1 +; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s3 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s1 +; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s1, 0, s0 +; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s2 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v4, 16, 1 +; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16 +; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 16 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v12, 0x7fc07fc0 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v6, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v7, vcc_lo +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v4 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s2 +; GFX11-TRUE16-NEXT: v_bfe_u32 v0, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v2, 16, 1 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7 +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v2 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v7, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v1, v2 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, v0, v5 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v0 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v13.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v6.l +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v2 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v2 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v8.l +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v3.l +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2] +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11 +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12] +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v13 +; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] +; GFX11-TRUE16-NEXT: .LBB39_3: +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6 +; GFX11-TRUE16-NEXT: s_branch .LBB39_2 +; GFX11-TRUE16-NEXT: .LBB39_4: +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s12 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s10 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s14 :: v_dual_mov_b32 v7, s8 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v5, s9 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s11 :: v_dual_mov_b32 v11, s6 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s1 +; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v12i8_scalar: +; GFX11-FAKE16: ; %bb.0: +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 0 +; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0 +; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB39_3 +; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false +; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s2, 16 +; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s2, 8 +; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s1, 24 +; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s1, 16 +; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s1, 8 +; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s0, 16 +; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s0, 8 +; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24 +; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24 +; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s3 +; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB39_4 +; GFX11-FAKE16-NEXT: .LBB39_2: ; %cmp.true +; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s1 +; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s3 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s1 +; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s0 +; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16 +; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s1, 0, s2 +; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v0 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v1 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v3, v1 +; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 16 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s3 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s2 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s1 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v0 +; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v4, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v8 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v12, 0x7fc07fc0 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v6, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v5, 16, 1 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo +; GFX11-FAKE16-NEXT: v_bfe_u32 v0, v8, 16, 1 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v4 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v1 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v2, v5 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, v0, v8 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v0 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v10, v4 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v5 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v7 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v0, v11, vcc_lo +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v3 +; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v7, 16, 1 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v8 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v2, v2, v9 :: v_dual_add_nc_u32 v3, v3, v7 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v8 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo +; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v13 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v0 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v1 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v6, 16, v3 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v4, 16, v5 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v7, 16, v9 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v2 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2] +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v2 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11 +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12] +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v13 +; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] +; GFX11-FAKE16-NEXT: .LBB39_3: +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6 +; GFX11-FAKE16-NEXT: s_branch .LBB39_2 +; GFX11-FAKE16-NEXT: .LBB39_4: +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s12 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s10 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s14 :: v_dual_mov_b32 v7, s8 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v5, s9 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s11 :: v_dual_mov_b32 v11, s6 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s1 +; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] %cmp = icmp eq i32 %b, 0 br i1 %cmp, label %cmp.true, label %cmp.false @@ -8669,12 +8893,12 @@ define <6 x half> @bitcast_v12i8_to_v6f16(<12 x i8> %a, i32 %b) { ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v4.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v2.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v0.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v1.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v3.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v10.h -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v9.h -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v11.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v1.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v3.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v5.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v10.h +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v9.h +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l ; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v12 @@ -8689,37 +8913,28 @@ define <6 x half> @bitcast_v12i8_to_v6f16(<12 x i8> %a, i32 %b) { ; GFX11-TRUE16-NEXT: .LBB40_3: ; %cmp.false ; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v9.l ; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v8.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0 -; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.l -; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v7.h -; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v0.l, v6.l -; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v6.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.h -; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v1.l, v5.h +; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.h +; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v7.l ; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l ; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l +; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v6.h +; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v5.h +; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v6.l +; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l +; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h +; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v3, v0 -; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v1.h, v5.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.h -; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v4.h -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v5 -; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v2.l, v4.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16 ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 ; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB40_2 ; GFX11-TRUE16-NEXT: .LBB40_4: ; %cmp.true @@ -8727,36 +8942,26 @@ define <6 x half> @bitcast_v12i8_to_v6f16(<12 x i8> %a, i32 %b) { ; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v8.h, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.h, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v7.l, 3 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0 -; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l -; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h ; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3 +; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l +; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h ; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l -; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v6.l, v0.l -; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v6.h, v0.h ; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.h -; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v5.l, v1.l -; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v0.l -; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v0.h -; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v5.h, v1.h ; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l ; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v3, v6 -; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v1.l +; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v6.h, v0.l +; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v5.h, v0.h +; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v6.l, v1.l +; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h +; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l +; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h +; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l +; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h +; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l ; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.h -; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.l, v2.l -; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v4.h, v2.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1 -; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v2.l -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l ; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2 ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; @@ -10079,12 +10284,12 @@ define <6 x i16> @bitcast_v12i8_to_v6i16(<12 x i8> %a, i32 %b) { ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v4.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v2.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v0.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v1.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v3.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v5.l -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v10.h -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v9.h -; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v11.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.h, 8, v1.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.h, 8, v3.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v6.l, 8, v5.l +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.l, 8, v10.h +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v4.h, 8, v9.h +; GFX11-TRUE16-NEXT: v_lshlrev_b16 v5.l, 8, v11.l ; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v12 @@ -10099,37 +10304,28 @@ define <6 x i16> @bitcast_v12i8_to_v6i16(<12 x i8> %a, i32 %b) { ; GFX11-TRUE16-NEXT: .LBB44_3: ; %cmp.false ; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v9.l ; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v8.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0 -; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.l -; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v7.h -; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v0.l, v6.l -; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v6.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.h -; GFX11-TRUE16-NEXT: v_or_b16 v5.h, v1.l, v5.h +; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v7.h +; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v7.l ; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v8.l ; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v10.l +; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v6.h +; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v5.h +; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v6.l +; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v4.l +; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v2.l, v4.h +; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v5.l ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v3, v0 -; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v1.h, v5.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v3.h -; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v2.h, v4.h -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v5 -; GFX11-TRUE16-NEXT: v_or_b16 v3.l, v2.l, v4.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_lo16 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16 ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 ; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB44_2 ; GFX11-TRUE16-NEXT: .LBB44_4: ; %cmp.true @@ -10137,36 +10333,26 @@ define <6 x i16> @bitcast_v12i8_to_v6i16(<12 x i8> %a, i32 %b) { ; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v8.h, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, v7.h, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, v7.l, 3 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0 -; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l -; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h ; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, v8.l, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, v10.l, 3 +; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l +; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h ; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff, v1.l -; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v6.l, v0.l -; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v6.h, v0.h ; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff, v1.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v3.h -; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v5.l, v1.l -; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v0.l -; GFX11-TRUE16-NEXT: v_add_nc_u16 v6.h, 0x300, v0.h -; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v5.h, v1.h ; GFX11-TRUE16-NEXT: v_and_b16 v2.l, 0xff, v2.l ; GFX11-TRUE16-NEXT: v_and_b16 v2.h, 0xff, v2.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v3, v6 -; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v1.l +; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v6.h, v0.l +; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v5.h, v0.h +; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v6.l, v1.l +; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v4.l, v1.h +; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.h, v2.l +; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v5.l, v2.h +; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, 0x300, v0.l +; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, 0x300, v0.h +; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.l, 0x300, v1.l ; GFX11-TRUE16-NEXT: v_add_nc_u16 v1.h, 0x300, v1.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.h -; GFX11-TRUE16-NEXT: v_or_b16 v2.l, v4.l, v2.l -; GFX11-TRUE16-NEXT: v_or_b16 v2.h, v4.h, v2.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1 -; GFX11-TRUE16-NEXT: v_add_nc_u16 v3.l, 0x300, v2.l -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.l, 0x300, v2.l ; GFX11-TRUE16-NEXT: v_add_nc_u16 v2.h, 0x300, v2.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v2 ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; @@ -11809,89 +11995,169 @@ define inreg <6 x half> @bitcast_v6bf16_to_v6f16_scalar(<6 x bfloat> inreg %a, i ; GFX9-NEXT: v_mov_b32_e32 v3, s19 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; -; GFX11-LABEL: bitcast_v6bf16_to_v6f16_scalar: -; GFX11: ; %bb.0: -; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-NEXT: s_cmp_lg_u32 s3, 0 -; GFX11-NEXT: s_mov_b32 s4, 0 -; GFX11-NEXT: s_cbranch_scc0 .LBB49_3 -; GFX11-NEXT: ; %bb.1: ; %Flow -; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s4 -; GFX11-NEXT: s_cbranch_vccnz .LBB49_4 -; GFX11-NEXT: .LBB49_2: ; %cmp.true -; GFX11-NEXT: s_pack_lh_b32_b16 s3, 0, s0 -; GFX11-NEXT: s_lshl_b32 s0, s0, 16 -; GFX11-NEXT: v_add_f32_e64 v0, 0x40c00000, s3 -; GFX11-NEXT: v_add_f32_e64 v2, 0x40c00000, s0 -; GFX11-NEXT: s_pack_lh_b32_b16 s3, 0, s1 -; GFX11-NEXT: s_lshl_b32 s1, s1, 16 -; GFX11-NEXT: s_pack_lh_b32_b16 s4, 0, s2 -; GFX11-NEXT: v_add_f32_e64 v4, 0x40c00000, s1 -; GFX11-NEXT: v_bfe_u32 v6, v2, 16, 1 -; GFX11-NEXT: s_lshl_b32 s2, s2, 16 -; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX11-NEXT: v_add_f32_e64 v7, 0x40c00000, s2 -; GFX11-NEXT: v_or_b32_e32 v11, 0x400000, v4 -; GFX11-NEXT: v_add_nc_u32_e32 v6, v6, v2 -; GFX11-NEXT: v_or_b32_e32 v9, 0x400000, v2 -; GFX11-NEXT: v_add_f32_e64 v3, 0x40c00000, s3 -; GFX11-NEXT: v_or_b32_e32 v12, 0x400000, v7 -; GFX11-NEXT: v_or_b32_e32 v8, 0x400000, v0 -; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6 -; GFX11-NEXT: v_add_nc_u32_e32 v1, v1, v0 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-NEXT: v_bfe_u32 v10, v3, 16, 1 -; GFX11-NEXT: v_add_f32_e64 v5, 0x40c00000, s4 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1 -; GFX11-NEXT: v_add_nc_u32_e32 v10, v10, v3 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v8, vcc_lo -; GFX11-NEXT: v_bfe_u32 v1, v4, 16, 1 -; GFX11-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 -; GFX11-NEXT: v_dual_cndmask_b32 v2, v6, v9 :: v_dual_add_nc_u32 v1, v1, v4 -; GFX11-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v10 -; GFX11-NEXT: v_or_b32_e32 v10, 0x400000, v3 -; GFX11-NEXT: v_add_nc_u32_e32 v8, v8, v7 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 -; GFX11-NEXT: v_bfe_u32 v9, v5, 16, 1 -; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX11-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8 -; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX11-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 -; GFX11-NEXT: v_add_nc_u32_e32 v9, v9, v5 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX11-NEXT: v_cndmask_b32_e32 v7, v8, v12, vcc_lo -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 -; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v9 -; GFX11-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; GFX11-NEXT: v_cndmask_b32_e32 v3, v6, v10, vcc_lo -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-NEXT: v_lshrrev_b32_e32 v5, 16, v7 -; GFX11-NEXT: v_and_b32_e32 v6, 0xffff, v2 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; GFX11-NEXT: v_cndmask_b32_e32 v4, v4, v9, vcc_lo -; GFX11-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-NEXT: v_lshl_or_b32 v0, v0, 16, v6 -; GFX11-NEXT: v_lshl_or_b32 v1, v3, 16, v1 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_lshrrev_b32_e32 v4, 16, v4 -; GFX11-NEXT: v_lshl_or_b32 v2, v4, 16, v5 -; GFX11-NEXT: s_setpc_b64 s[30:31] -; GFX11-NEXT: .LBB49_3: -; GFX11-NEXT: s_branch .LBB49_2 -; GFX11-NEXT: .LBB49_4: -; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 -; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 -; GFX11-NEXT: s_setpc_b64 s[30:31] +; GFX11-TRUE16-LABEL: bitcast_v6bf16_to_v6f16_scalar: +; GFX11-TRUE16: ; %bb.0: +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0 +; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0 +; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB49_3 +; GFX11-TRUE16-NEXT: ; %bb.1: ; %Flow +; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s4 +; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB49_4 +; GFX11-TRUE16-NEXT: .LBB49_2: ; %cmp.true +; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s0 +; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s3 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s0 +; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s2 +; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 16 +; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s2 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0 +; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0 +; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s1 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v3 +; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v7, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0 +; GFX11-TRUE16-NEXT: v_bfe_u32 v0, v6, 16, 1 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v5 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, v0, v6 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v6 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v0 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v7 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v4.l +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v8, v11, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v5 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v6.l +; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] +; GFX11-TRUE16-NEXT: .LBB49_3: +; GFX11-TRUE16-NEXT: s_branch .LBB49_2 +; GFX11-TRUE16-NEXT: .LBB49_4: +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 +; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v6f16_scalar: +; GFX11-FAKE16: ; %bb.0: +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 0 +; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0 +; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB49_3 +; GFX11-FAKE16-NEXT: ; %bb.1: ; %Flow +; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s4 +; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB49_4 +; GFX11-FAKE16-NEXT: .LBB49_2: ; %cmp.true +; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s0 +; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s3 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s0 +; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s1 +; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16 +; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s4, 0, s2 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v2, 16, 1 +; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 16 +; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 1 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s2 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v4 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v6, v2 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v2 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s3 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v7 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v1, v0 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 +; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v3, 16, 1 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s4 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v10, v3 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v8, vcc_lo +; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v4, 16, 1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v2, v6, v9 :: v_dual_add_nc_u32 v1, v1, v4 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v8, v7 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 +; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v5, 16, 1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v9, v5 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v8, v12, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v9 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v5 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v6, v10, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v7 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v2 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v9, vcc_lo +; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v0, 16, v6 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v3, 16, v1 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v4, 16, v5 +; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] +; GFX11-FAKE16-NEXT: .LBB49_3: +; GFX11-FAKE16-NEXT: s_branch .LBB49_2 +; GFX11-FAKE16-NEXT: .LBB49_4: +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 +; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] %cmp = icmp eq i32 %b, 0 br i1 %cmp, label %cmp.true, label %cmp.false @@ -12403,64 +12669,57 @@ define <6 x i16> @bitcast_v6bf16_to_v6i16(<6 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v3 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v1.l -; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v5 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v4 -; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v4 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v3 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v2.l -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v9, 16, 1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v4, 0x7fff +; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v1 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff0000, v2 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v7, vcc_lo -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v1 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v2 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v9 -; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v3, 16, 1 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v6 -; GFX11-TRUE16-NEXT: v_add3_u32 v6, v10, v9, 0x7fff -; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v1, 16, 1 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v11, v3, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc_lo -; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v5, 16, 1 -; GFX11-TRUE16-NEXT: v_add3_u32 v7, v10, v1, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v3 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v6, v7, vcc_lo +; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v9 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v12, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v5 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v9, v10 :: v_dual_add_f32 v0, 0x40c00000, v0 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v7, 0x40c00000, v1 :: v_dual_add_f32 v0, 0x40c00000, v0 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v11, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v0, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v7, v13, vcc_lo +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v0 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v1.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v8, v2, vcc_lo -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v5.h -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v6 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v0.h -; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v0, 16, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v1, 16, v3 -; GFX11-TRUE16-NEXT: v_lshl_or_b32 v0, v5, 16, v4 +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v8, v0, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v9, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.h +; GFX11-TRUE16-NEXT: v_add3_u32 v5, v8, v9, 0x7fff +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v2, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v2 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v3, 0x7fff +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v7, 16, 1 +; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v2, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v7, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v5.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v6, v11, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v3.h ; GFX11-TRUE16-NEXT: .LBB52_2: ; %end ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] @@ -12748,80 +13007,151 @@ define inreg <6 x i16> @bitcast_v6bf16_to_v6i16_scalar(<6 x bfloat> inreg %a, i3 ; GFX9-NEXT: v_mov_b32_e32 v3, s19 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; -; GFX11-LABEL: bitcast_v6bf16_to_v6i16_scalar: -; GFX11: ; %bb.0: -; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-NEXT: s_cmp_lg_u32 s3, 0 -; GFX11-NEXT: s_mov_b32 s4, 0 -; GFX11-NEXT: s_cbranch_scc0 .LBB53_3 -; GFX11-NEXT: ; %bb.1: ; %Flow -; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s4 -; GFX11-NEXT: s_cbranch_vccnz .LBB53_4 -; GFX11-NEXT: .LBB53_2: ; %cmp.true -; GFX11-NEXT: s_pack_lh_b32_b16 s3, 0, s0 -; GFX11-NEXT: s_lshl_b32 s0, s0, 16 -; GFX11-NEXT: v_add_f32_e64 v0, 0x40c00000, s3 -; GFX11-NEXT: v_add_f32_e64 v1, 0x40c00000, s0 -; GFX11-NEXT: s_pack_lh_b32_b16 s3, 0, s1 -; GFX11-NEXT: s_lshl_b32 s1, s1, 16 -; GFX11-NEXT: v_add_f32_e64 v3, 0x40c00000, s3 -; GFX11-NEXT: v_bfe_u32 v2, v0, 16, 1 -; GFX11-NEXT: v_bfe_u32 v4, v1, 16, 1 -; GFX11-NEXT: v_or_b32_e32 v9, 0x400000, v1 -; GFX11-NEXT: s_pack_lh_b32_b16 s0, 0, s2 -; GFX11-NEXT: s_lshl_b32 s2, s2, 16 -; GFX11-NEXT: v_add_f32_e64 v5, 0x40c00000, s1 -; GFX11-NEXT: v_add_nc_u32_e32 v4, v4, v1 -; GFX11-NEXT: v_add_f32_e64 v6, 0x40c00000, s2 -; GFX11-NEXT: v_bfe_u32 v7, v3, 16, 1 -; GFX11-NEXT: v_or_b32_e32 v8, 0x400000, v0 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4 -; GFX11-NEXT: v_add_nc_u32_e32 v2, v2, v0 -; GFX11-NEXT: v_bfe_u32 v10, v6, 16, 1 -; GFX11-NEXT: v_or_b32_e32 v11, 0x400000, v5 -; GFX11-NEXT: v_or_b32_e32 v12, 0x400000, v6 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 -; GFX11-NEXT: v_dual_cndmask_b32 v0, v2, v8 :: v_dual_add_nc_u32 v7, v7, v3 -; GFX11-NEXT: v_bfe_u32 v2, v5, 16, 1 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 -; GFX11-NEXT: v_add_f32_e64 v8, 0x40c00000, s0 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-NEXT: v_dual_cndmask_b32 v1, v4, v9 :: v_dual_add_nc_u32 v4, 0x7fff, v7 -; GFX11-NEXT: v_add_nc_u32_e32 v9, v10, v6 -; GFX11-NEXT: v_or_b32_e32 v10, 0x400000, v3 -; GFX11-NEXT: v_add_nc_u32_e32 v2, v2, v5 -; GFX11-NEXT: v_bfe_u32 v7, v8, 16, 1 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 -; GFX11-NEXT: v_dual_cndmask_b32 v2, v2, v11 :: v_dual_add_nc_u32 v7, v7, v8 -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) -; GFX11-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7 -; GFX11-NEXT: v_or_b32_e32 v7, 0x400000, v8 -; GFX11-NEXT: v_cndmask_b32_e32 v6, v9, v12, vcc_lo -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 -; GFX11-NEXT: v_cndmask_b32_e32 v3, v4, v10, vcc_lo -; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 -; GFX11-NEXT: v_cndmask_b32_e32 v4, v5, v7, vcc_lo -; GFX11-NEXT: v_lshrrev_b32_e32 v5, 16, v6 -; GFX11-NEXT: v_lshrrev_b32_e32 v6, 16, v2 -; GFX11-NEXT: v_lshrrev_b32_e32 v7, 16, v1 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_and_or_b32 v2, 0xffff0000, v4, v5 -; GFX11-NEXT: v_and_or_b32 v1, 0xffff0000, v3, v6 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-NEXT: v_and_or_b32 v0, 0xffff0000, v0, v7 -; GFX11-NEXT: s_setpc_b64 s[30:31] -; GFX11-NEXT: .LBB53_3: -; GFX11-NEXT: s_branch .LBB53_2 -; GFX11-NEXT: .LBB53_4: -; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 -; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 -; GFX11-NEXT: s_setpc_b64 s[30:31] +; GFX11-TRUE16-LABEL: bitcast_v6bf16_to_v6i16_scalar: +; GFX11-TRUE16: ; %bb.0: +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s3, 0 +; GFX11-TRUE16-NEXT: s_mov_b32 s4, 0 +; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB53_3 +; GFX11-TRUE16-NEXT: ; %bb.1: ; %Flow +; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s4 +; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB53_4 +; GFX11-TRUE16-NEXT: .LBB53_2: ; %cmp.true +; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s0 +; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s3 +; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s3, 0, s1 +; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s0 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s3 +; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s2 +; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0 +; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 16 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s2 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v3 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4 +; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v6 +; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v4, v9 :: v_dual_add_nc_u32 v9, v10, v6 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.h +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v2, v5 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v7 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v8, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v8 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v1, v11, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v8 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v9, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v5.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v7, v11, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v6.h +; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] +; GFX11-TRUE16-NEXT: .LBB53_3: +; GFX11-TRUE16-NEXT: s_branch .LBB53_2 +; GFX11-TRUE16-NEXT: .LBB53_4: +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 +; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-FAKE16-LABEL: bitcast_v6bf16_to_v6i16_scalar: +; GFX11-FAKE16: ; %bb.0: +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s3, 0 +; GFX11-FAKE16-NEXT: s_mov_b32 s4, 0 +; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB53_3 +; GFX11-FAKE16-NEXT: ; %bb.1: ; %Flow +; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s4 +; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB53_4 +; GFX11-FAKE16-NEXT: .LBB53_2: ; %cmp.true +; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s0 +; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s3 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s0 +; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s3, 0, s1 +; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s3 +; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v1, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v1 +; GFX11-FAKE16-NEXT: s_pack_lh_b32_b16 s0, 0, s2 +; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 16 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s1 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v4, v1 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s2 +; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v3, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v0 +; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v6, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v5 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v6 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v0, v2, v8 :: v_dual_add_nc_u32 v7, v7, v3 +; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v5, 16, 1 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v1, v4, v9 :: v_dual_add_nc_u32 v4, 0x7fff, v7 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v10, v6 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v5 +; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v8, 16, 1 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v2, v2, v11 :: v_dual_add_nc_u32 v7, v7, v8 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v8 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v9, v12, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v4, v10, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v5, v7, vcc_lo +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v6 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v1 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_and_or_b32 v2, 0xffff0000, v4, v5 +; GFX11-FAKE16-NEXT: v_and_or_b32 v1, 0xffff0000, v3, v6 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_and_or_b32 v0, 0xffff0000, v0, v7 +; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] +; GFX11-FAKE16-NEXT: .LBB53_3: +; GFX11-FAKE16-NEXT: s_branch .LBB53_2 +; GFX11-FAKE16-NEXT: .LBB53_4: +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 +; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] %cmp = icmp eq i32 %b, 0 br i1 %cmp, label %cmp.true, label %cmp.false |