diff options
Diffstat (limited to 'llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp')
| -rw-r--r-- | llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp index 32f8178..e0b348f 100644 --- a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp @@ -566,6 +566,8 @@ void SPIRVModuleAnalysis::processOtherInstrs(const Module &M) { collectOtherInstr(MI, MAI, SPIRV::MB_DebugNames, IS); } else if (OpCode == SPIRV::OpEntryPoint) { collectOtherInstr(MI, MAI, SPIRV::MB_EntryPoints, IS); + } else if (TII->isAliasingInstr(MI)) { + collectOtherInstr(MI, MAI, SPIRV::MB_AliasingInsts, IS); } else if (TII->isDecorationInstr(MI)) { collectOtherInstr(MI, MAI, SPIRV::MB_Annotations, IS); collectFuncNames(MI, &*F); @@ -1251,6 +1253,13 @@ void addInstrRequirements(const MachineInstr &MI, } break; } + case SPIRV::OpAliasDomainDeclINTEL: + case SPIRV::OpAliasScopeDeclINTEL: + case SPIRV::OpAliasScopeListDeclINTEL: { + Reqs.addExtension(SPIRV::Extension::SPV_INTEL_memory_access_aliasing); + Reqs.addCapability(SPIRV::Capability::MemoryAccessAliasingINTEL); + break; + } case SPIRV::OpBitReverse: case SPIRV::OpBitFieldInsert: case SPIRV::OpBitFieldSExtract: |