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Diffstat (limited to 'llvm/lib/Target/RISCV/RISCVSubtarget.h')
-rw-r--r--llvm/lib/Target/RISCV/RISCVSubtarget.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.h b/llvm/lib/Target/RISCV/RISCVSubtarget.h
index 4b4fc8f..4026364 100644
--- a/llvm/lib/Target/RISCV/RISCVSubtarget.h
+++ b/llvm/lib/Target/RISCV/RISCVSubtarget.h
@@ -112,7 +112,6 @@ private:
RISCVFrameLowering FrameLowering;
RISCVInstrInfo InstrInfo;
- RISCVRegisterInfo RegInfo;
RISCVTargetLowering TLInfo;
/// Initializes using the passed in CPU and feature strings so that we can
@@ -140,13 +139,14 @@ public:
}
const RISCVInstrInfo *getInstrInfo() const override { return &InstrInfo; }
const RISCVRegisterInfo *getRegisterInfo() const override {
- return &RegInfo;
+ return &InstrInfo.getRegisterInfo();
}
const RISCVTargetLowering *getTargetLowering() const override {
return &TLInfo;
}
bool enableMachineScheduler() const override { return true; }
+ bool enableTerminalRule() const override { return true; }
bool enablePostRAScheduler() const override { return UsePostRAScheduler; }