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path: root/llvm/lib/Target/RISCV/RISCVCallingConv.cpp
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Diffstat (limited to 'llvm/lib/Target/RISCV/RISCVCallingConv.cpp')
-rw-r--r--llvm/lib/Target/RISCV/RISCVCallingConv.cpp12
1 files changed, 10 insertions, 2 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVCallingConv.cpp b/llvm/lib/Target/RISCV/RISCVCallingConv.cpp
index fc276d1..b7ed9de 100644
--- a/llvm/lib/Target/RISCV/RISCVCallingConv.cpp
+++ b/llvm/lib/Target/RISCV/RISCVCallingConv.cpp
@@ -448,8 +448,12 @@ bool llvm::CC_RISCV(unsigned ValNo, MVT ValVT, MVT LocVT,
if (Reg) {
// Fixed-length vectors are located in the corresponding scalable-vector
// container types.
- if (ValVT.isFixedLengthVector())
+ if (ValVT.isFixedLengthVector()) {
LocVT = TLI.getContainerForFixedLengthVector(LocVT);
+ State.addLoc(
+ CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
+ return false;
+ }
} else {
// For return values, the vector must be passed fully via registers or
// via the stack.
@@ -583,8 +587,12 @@ bool llvm::CC_RISCV_FastCC(unsigned ValNo, MVT ValVT, MVT LocVT,
if (MCRegister Reg = allocateRVVReg(ValVT, ValNo, State, TLI)) {
// Fixed-length vectors are located in the corresponding scalable-vector
// container types.
- if (LocVT.isFixedLengthVector())
+ if (LocVT.isFixedLengthVector()) {
LocVT = TLI.getContainerForFixedLengthVector(LocVT);
+ State.addLoc(
+ CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
+ return false;
+ }
State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
return false;
}