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Diffstat (limited to 'llvm/lib/CodeGen/TwoAddressInstructionPass.cpp')
-rw-r--r--llvm/lib/CodeGen/TwoAddressInstructionPass.cpp13
1 files changed, 11 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
index 526cb84..74d7904 100644
--- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -1936,13 +1936,16 @@ eliminateRegSequence(MachineBasicBlock::iterator &MBBI) {
}
bool DefEmitted = false;
+ bool DefIsPartial = false;
for (unsigned i = 1, e = MI.getNumOperands(); i < e; i += 2) {
MachineOperand &UseMO = MI.getOperand(i);
Register SrcReg = UseMO.getReg();
unsigned SubIdx = MI.getOperand(i+1).getImm();
// Nothing needs to be inserted for undef operands.
- if (UseMO.isUndef())
+ if (UseMO.isUndef()) {
+ DefIsPartial = true;
continue;
+ }
// Defer any kill flag to the last operand using SrcReg. Otherwise, we
// might insert a COPY that uses SrcReg after is was killed.
@@ -1987,8 +1990,14 @@ eliminateRegSequence(MachineBasicBlock::iterator &MBBI) {
for (int j = MI.getNumOperands() - 1, ee = 0; j > ee; --j)
MI.removeOperand(j);
} else {
- if (LIS)
+ if (LIS) {
+ // Force interval recomputation if we moved from full definition
+ // of register to partial.
+ if (DefIsPartial && LIS->hasInterval(DstReg) &&
+ MRI->shouldTrackSubRegLiveness(DstReg))
+ LIS->removeInterval(DstReg);
LIS->RemoveMachineInstrFromMaps(MI);
+ }
LLVM_DEBUG(dbgs() << "Eliminated: " << MI);
MI.eraseFromParent();