diff options
Diffstat (limited to 'llvm/lib/CodeGen/MachineVerifier.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineVerifier.cpp | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp index cc8f77e..b7e0f57 100644 --- a/llvm/lib/CodeGen/MachineVerifier.cpp +++ b/llvm/lib/CodeGen/MachineVerifier.cpp @@ -940,9 +940,12 @@ void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) { if (isFunctionSelected) report("Unexpected generic instruction in a Selected function", MI); + unsigned NumOps = MI->getNumOperands(); + // Check types. SmallVector<LLT, 4> Types; - for (unsigned I = 0; I < MCID.getNumOperands(); ++I) { + for (unsigned I = 0, E = std::min(MCID.getNumOperands(), NumOps); + I != E; ++I) { if (!MCID.OpInfo[I].isGenericType()) continue; // Generic instructions specify type equality constraints between some of @@ -973,6 +976,10 @@ void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) { if (MO->isReg() && TargetRegisterInfo::isPhysicalRegister(MO->getReg())) report("Generic instruction cannot have physical register", MO, I); } + + // Avoid out of bounds in checks below. This was already reported earlier. + if (MI->getNumOperands() < MCID.getNumOperands()) + return; } StringRef ErrorInfo; @@ -1033,8 +1040,6 @@ void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) { // instructions aren't guaranteed to have the right number of operands or // types attached to them at this point assert(MCID.getNumOperands() == 2 && "Expected 2 operands G_*{EXT,TRUNC}"); - if (MI->getNumOperands() < MCID.getNumOperands()) - break; LLT DstTy = MRI->getType(MI->getOperand(0).getReg()); LLT SrcTy = MRI->getType(MI->getOperand(1).getReg()); if (!DstTy.isValid() || !SrcTy.isValid()) |