diff options
Diffstat (limited to 'clang/test')
36 files changed, 778 insertions, 24 deletions
diff --git a/clang/test/AST/ByteCode/records.cpp b/clang/test/AST/ByteCode/records.cpp index 48cf811..00218ba 100644 --- a/clang/test/AST/ByteCode/records.cpp +++ b/clang/test/AST/ByteCode/records.cpp @@ -1162,6 +1162,19 @@ namespace IndirectFieldInit { static_assert(s2.x == 1 && s2.y == 2 && s2.a == 3 && s2.b == 4); #endif + + + struct B { + struct { + union { + int x = 3; + }; + int y = this->x; + }; + + constexpr B() {} + }; + static_assert(B().y == 3, ""); } namespace InheritedConstructor { @@ -1840,3 +1853,11 @@ namespace DiamondDowncast { constexpr Middle2 &fail = (Middle2&)top1; // both-error {{must be initialized by a constant expression}} \ // both-note {{cannot cast object of dynamic type 'const Bottom' to type 'Middle2'}} } + +namespace PrimitiveInitializedByInitList { + constexpr struct { + int a; + int b{this->a}; + } c{ 17 }; + static_assert(c.b == 17, ""); +} diff --git a/clang/test/CIR/CodeGen/builtin_prefetech.c b/clang/test/CIR/CodeGen/builtin_prefetech.c new file mode 100644 index 0000000..cfe85b9 --- /dev/null +++ b/clang/test/CIR/CodeGen/builtin_prefetech.c @@ -0,0 +1,43 @@ +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-cir %s -o - | FileCheck %s -check-prefix=CIR +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o - | FileCheck %s -check-prefix=LLVM +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=OGCG + +void foo(void *a) { + __builtin_prefetch(a); // rw=0, locality=3 + __builtin_prefetch(a, 0); // rw=0, locality=3 + __builtin_prefetch(a, 1); // rw=1, locality=3 + __builtin_prefetch(a, 1, 1); // rw=1, locality=1 +} + +// CIR-LABEL: cir.func dso_local @foo( +// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.ptr<!void> +// CIR: cir.store %arg0, %[[ALLOCA]] : !cir.ptr<!void>, !cir.ptr<!cir.ptr<!void>> +// CIR: %[[P1:.*]] = cir.load{{.*}} %[[ALLOCA]] : !cir.ptr<!cir.ptr<!void>>, !cir.ptr<!void> +// CIR: cir.prefetch read locality(3) %[[P1]] : !cir.ptr<!void> +// CIR: %[[P2:.*]] = cir.load{{.*}} %[[ALLOCA]] : !cir.ptr<!cir.ptr<!void>>, !cir.ptr<!void> +// CIR: cir.prefetch read locality(3) %[[P2]] : !cir.ptr<!void> +// CIR: %[[P3:.*]] = cir.load{{.*}} %[[ALLOCA]] : !cir.ptr<!cir.ptr<!void>>, !cir.ptr<!void> +// CIR: cir.prefetch write locality(3) %[[P3]] : !cir.ptr<!void> +// CIR: %[[P4:.*]] = cir.load{{.*}} %[[ALLOCA]] : !cir.ptr<!cir.ptr<!void>>, !cir.ptr<!void> +// CIR: cir.prefetch write locality(1) %[[P4]] : !cir.ptr<!void> +// CIR: cir.return + +// LLVM-LABEL: define dso_local void @foo( +// LLVM: [[ALLOCA:%.*]] = alloca ptr, i64 1 +// LLVM: store ptr {{.*}}, ptr [[ALLOCA]] +// LLVM: [[LP1:%.*]] = load ptr, ptr [[ALLOCA]] +// LLVM: call void @llvm.prefetch.p0(ptr [[LP1]], i32 0, i32 3, i32 1) +// LLVM: [[LP2:%.*]] = load ptr, ptr [[ALLOCA]] +// LLVM: call void @llvm.prefetch.p0(ptr [[LP2]], i32 0, i32 3, i32 1) +// LLVM: [[LP3:%.*]] = load ptr, ptr [[ALLOCA]] +// LLVM: call void @llvm.prefetch.p0(ptr [[LP3]], i32 1, i32 3, i32 1) +// LLVM: [[LP4:%.*]] = load ptr, ptr [[ALLOCA]] +// LLVM: call void @llvm.prefetch.p0(ptr [[LP4]], i32 1, i32 1, i32 1) +// LLVM: ret void + +// OGCG-LABEL: define dso_local void @foo(ptr +// OGCG: call void @llvm.prefetch.p0(ptr {{.*}}, i32 0, i32 3, i32 1) +// OGCG: call void @llvm.prefetch.p0(ptr {{.*}}, i32 0, i32 3, i32 1) +// OGCG: call void @llvm.prefetch.p0(ptr {{.*}}, i32 1, i32 3, i32 1) +// OGCG: call void @llvm.prefetch.p0(ptr {{.*}}, i32 1, i32 1, i32 1) +// OGCG: ret void diff --git a/clang/test/CIR/CodeGen/dynamic-cast-exact.cpp b/clang/test/CIR/CodeGen/dynamic-cast-exact.cpp index e3b8533..9ddb68f 100644 --- a/clang/test/CIR/CodeGen/dynamic-cast-exact.cpp +++ b/clang/test/CIR/CodeGen/dynamic-cast-exact.cpp @@ -172,3 +172,37 @@ B *offset_cast(A *a) { // OGCG-NEXT: br label %[[LABEL_END]] // OGCG: [[LABEL_END]]: // OGCG-NEXT: phi ptr [ %[[RESULT]], %[[LABEL_NOTNULL]] ], [ null, %[[LABEL_NULL]] ] + +Derived *ptr_cast_always_fail(Base2 *ptr) { + return dynamic_cast<Derived *>(ptr); + } + +// CIR: cir.func {{.*}} @_Z20ptr_cast_always_failP5Base2 +// CIR: %{{.+}} = cir.load{{.*}} %{{.+}} : !cir.ptr<!cir.ptr<!rec_Base2>>, !cir.ptr<!rec_Base2> +// CIR-NEXT: %[[RESULT:.*]] = cir.const #cir.ptr<null> : !cir.ptr<!rec_Derived> +// CIR-NEXT: cir.store %[[RESULT]], %{{.*}} : !cir.ptr<!rec_Derived>, !cir.ptr<!cir.ptr<!rec_Derived>> + +// LLVM: define {{.*}} ptr @_Z20ptr_cast_always_failP5Base2 +// LLVM-NEXT: ret ptr null + +// OGCG: define {{.*}} ptr @_Z20ptr_cast_always_failP5Base2 +// OGCG-NEXT: entry: +// OGCG-NEXT: ret ptr null + +Derived &ref_cast_always_fail(Base2 &ref) { + return dynamic_cast<Derived &>(ref); +} + +// CIR: cir.func {{.*}} @_Z20ref_cast_always_failR5Base2 +// CIR: %{{.+}} = cir.load{{.*}} %{{.+}} : !cir.ptr<!cir.ptr<!rec_Base2>>, !cir.ptr<!rec_Base2> +// CIR-NEXT: cir.call @__cxa_bad_cast() : () -> () +// CIR-NEXT: cir.unreachable + +// LLVM: define {{.*}} ptr @_Z20ref_cast_always_failR5Base2 +// LLVM-NEXT: tail call void @__cxa_bad_cast() +// LLVM-NEXT: unreachable + +// OGCG: define {{.*}} ptr @_Z20ref_cast_always_failR5Base2 +// OGCG-NEXT: entry: +// OGCG-NEXT: tail call void @__cxa_bad_cast() +// OGCG-NEXT: unreachable diff --git a/clang/test/CIR/CodeGen/try-catch.cpp b/clang/test/CIR/CodeGen/try-catch.cpp index 5a50310..1e4d2a6 100644 --- a/clang/test/CIR/CodeGen/try-catch.cpp +++ b/clang/test/CIR/CodeGen/try-catch.cpp @@ -117,3 +117,50 @@ void try_catch_with_empty_catch_all_2() { // OGCG: %[[RESULT:.*]] = add nsw i32 %[[TMP_A]], 1 // OGCG: store i32 %[[RESULT]], ptr %[[A_ADDR]], align 4 // OGCG: ret void + +void try_catch_with_alloca() { + try { + int a; + int b; + int c = a + b; + } catch (...) { + } +} + +// CIR: cir.scope { +// CIR: %[[A_ADDR:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["a"] +// CIR: %[[B_ADDR:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["b"] +// CIR: %[[C_ADDR:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["c", init] +// CIR: cir.try { +// CIR: %[[TMP_A:.*]] = cir.load{{.*}} %[[A_ADDR]] : !cir.ptr<!s32i>, !s32i +// CIR: %[[TMP_B:.*]] = cir.load{{.*}} %[[B_ADDR]] : !cir.ptr<!s32i>, !s32i +// CIR: %[[RESULT:.*]] = cir.binop(add, %[[TMP_A]], %[[TMP_B]]) nsw : !s32i +// CIR: cir.store{{.*}} %[[RESULT]], %[[C_ADDR]] : !s32i, !cir.ptr<!s32i> +// CIR: cir.yield +// CIR: } +// CIR: } + +// LLVM: %[[A_ADDR:.*]] = alloca i32, i64 1, align 4 +// LLVM: %[[B_ADDR:.*]] = alloca i32, i64 1, align 4 +// LLVM: %[[C_ADDR:.*]] = alloca i32, i64 1, align 4 +// LLVM: br label %[[LABEL_1:.*]] +// LLVM: [[LABEL_1]]: +// LLVM: br label %[[LABEL_2:.*]] +// LLVM: [[LABEL_2]]: +// LLVM: %[[TMP_A:.*]] = load i32, ptr %[[A_ADDR]], align 4 +// LLVM: %[[TMP_B:.*]] = load i32, ptr %[[B_ADDR]], align 4 +// LLVM: %[[RESULT:.*]] = add nsw i32 %[[TMP_A]], %[[TMP_B]] +// LLVM: store i32 %[[RESULT]], ptr %[[C_ADDR]], align 4 +// LLVM: br label %[[LABEL_3:.*]] +// LLVM: [[LABEL_3]]: +// LLVM: br label %[[LABEL_4:.*]] +// LLVM: [[LABEL_4]]: +// LLVM: ret void + +// OGCG: %[[A_ADDR:.*]] = alloca i32, align 4 +// OGCG: %[[B_ADDR:.*]] = alloca i32, align 4 +// OGCG: %[[C_ADDR:.*]] = alloca i32, align 4 +// OGCG: %[[TMP_A:.*]] = load i32, ptr %[[A_ADDR]], align 4 +// OGCG: %[[TMP_B:.*]] = load i32, ptr %[[B_ADDR]], align 4 +// OGCG: %[[RESULT:.*]] = add nsw i32 %[[TMP_A]], %[[TMP_B]] +// OGCG: store i32 %[[RESULT]], ptr %[[C_ADDR]], align 4 diff --git a/clang/test/CIR/CodeGenOpenACC/atomic-write.cpp b/clang/test/CIR/CodeGenOpenACC/atomic-write.cpp new file mode 100644 index 0000000..1685534 --- /dev/null +++ b/clang/test/CIR/CodeGenOpenACC/atomic-write.cpp @@ -0,0 +1,55 @@ +// RUN: %clang_cc1 -fopenacc -triple x86_64-linux-gnu -Wno-openacc-self-if-potential-conflict -emit-cir -fclangir -triple x86_64-linux-pc %s -o - | FileCheck %s + +extern "C" bool condition(int x, unsigned int y, float f); +extern "C" double do_thing(float f); + +struct ConvertsToScalar { + operator float(); +}; + +void use(int x, unsigned int y, float f, ConvertsToScalar cts) { + // CHECK: cir.func{{.*}}(%[[X_ARG:.*]]: !s32i{{.*}}, %[[Y_ARG:.*]]: !u32i{{.*}}, %[[F_ARG:.*]]: !cir.float{{.*}}){{.*}}, %[[CTS_ARG:.*]]: !rec_ConvertsToScalar{{.*}}) { + // CHECK-NEXT: %[[X_ALLOC:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["x", init] + // CHECK-NEXT: %[[Y_ALLOC:.*]] = cir.alloca !u32i, !cir.ptr<!u32i>, ["y", init] + // CHECK-NEXT: %[[F_ALLOC:.*]] = cir.alloca !cir.float, !cir.ptr<!cir.float>, ["f", init] + // CHECK-NEXT: %[[CTS_ALLOC:.*]] = cir.alloca !rec_ConvertsToScalar, !cir.ptr<!rec_ConvertsToScalar>, ["cts", init] + // + // CHECK-NEXT: cir.store %[[X_ARG]], %[[X_ALLOC]] : !s32i, !cir.ptr<!s32i> + // CHECK-NEXT: cir.store %[[Y_ARG]], %[[Y_ALLOC]] : !u32i, !cir.ptr<!u32i> + // CHECK-NEXT: cir.store %[[F_ARG]], %[[F_ALLOC]] : !cir.float, !cir.ptr<!cir.float> + // CHECK-NEXT: cir.store %[[CTS_ARG]], %[[CTS_ALLOC]] : !rec_ConvertsToScalar, !cir.ptr<!rec_ConvertsToScalar> + + // CHECK-NEXT: %[[Y_LOAD:.*]] = cir.load {{.*}}%[[Y_ALLOC]] : !cir.ptr<!u32i>, !u32i + // CHECK-NEXT: %[[Y_TO_FLOAT:.*]] = cir.cast int_to_float %[[Y_LOAD]] : !u32i -> !cir.float + // CHECK-NEXT: %[[F_LOAD:.*]] = cir.load {{.*}}%[[F_ALLOC]] : !cir.ptr<!cir.float>, !cir.float + // CHECK-NEXT: %[[MUL:.*]] = cir.binop(mul, %[[Y_TO_FLOAT]], %[[F_LOAD]]) : !cir.float + // CHECK-NEXT: %[[RHS_CAST:.*]] = cir.cast float_to_int %[[MUL]] : !cir.float -> !s32i + // CHECK-NEXT: acc.atomic.write %[[X_ALLOC]] = %[[RHS_CAST]] : !cir.ptr<!s32i>, !s32i +#pragma acc atomic write + x = y * f; + + // CHECK-NEXT: %[[F_LOAD:.*]] = cir.load {{.*}}%[[F_ALLOC]] : !cir.ptr<!cir.float>, !cir.float + // CHECK-NEXT: %[[CALL:.*]] = cir.call @do_thing(%[[F_LOAD]]) : (!cir.float) -> !cir.double + // CHECK-NEXT: %[[CALL_CAST:.*]] = cir.cast float_to_int %[[CALL]] : !cir.double -> !u32i + // CHECK-NEXT: acc.atomic.write %[[Y_ALLOC]] = %[[CALL_CAST]] : !cir.ptr<!u32i>, !u32i +#pragma acc atomic write + y = do_thing(f); + + // CHECK-NEXT: %[[X_LOAD:.*]] = cir.load {{.*}}%[[X_ALLOC]] : !cir.ptr<!s32i>, !s32i + // CHECK-NEXT: %[[X_CAST:.*]] = cir.cast int_to_float %[[X_LOAD]] : !s32i -> !cir.float + // CHECK-NEXT: %[[THING_CALL:.*]] = cir.call @do_thing(%[[X_CAST]]) : (!cir.float) -> !cir.double + // CHECK-NEXT: %[[THING_CAST:.*]] = cir.cast floating %[[THING_CALL]] : !cir.double -> !cir.float + // CHECK-NEXT: %[[X_LOAD:.*]] = cir.load {{.*}}%[[X_ALLOC]] : !cir.ptr<!s32i>, !s32i + // CHECK-NEXT: %[[Y_LOAD:.*]] = cir.load {{.*}}%[[Y_ALLOC]] : !cir.ptr<!u32i>, !u32i + // CHECK-NEXT: %[[F_LOAD:.*]] = cir.load {{.*}}%[[F_ALLOC]] : !cir.ptr<!cir.float>, !cir.float + // CHECK-NEXT: %[[COND_CALL:.*]] = cir.call @condition(%[[X_LOAD]], %[[Y_LOAD]], %[[F_LOAD]]) : (!s32i, !u32i, !cir.float) -> !cir.bool + // CHECK-NEXT: %[[COND_CAST:.*]] = builtin.unrealized_conversion_cast %[[COND_CALL]] : !cir.bool to i1 + // CHECK-NEXT: acc.atomic.write if(%[[COND_CAST]]) %[[F_ALLOC]] = %[[THING_CAST]] : !cir.ptr<!cir.float>, !cir.float +#pragma acc atomic write if (condition(x, y, f)) + f = do_thing(x); + + // CHECK-NEXT: %[[CTS_CONV_CALL:.*]] = cir.call @{{.*}}(%[[CTS_ALLOC]]) : (!cir.ptr<!rec_ConvertsToScalar>) -> !cir.float + // CHECK-NEXT: acc.atomic.write %[[F_ALLOC]] = %[[CTS_CONV_CALL]] : !cir.ptr<!cir.float>, !cir.float +#pragma acc atomic write + f = cts; +} diff --git a/clang/test/CodeGen/X86/avx2-builtins.c b/clang/test/CodeGen/X86/avx2-builtins.c index 03b1bde..5c52d84 100644 --- a/clang/test/CodeGen/X86/avx2-builtins.c +++ b/clang/test/CodeGen/X86/avx2-builtins.c @@ -1155,23 +1155,30 @@ __m256i test_mm256_shufflelo_epi16(__m256i a) { return _mm256_shufflelo_epi16(a, 83); } TEST_CONSTEXPR(match_v16hi(_mm256_shufflelo_epi16(((__m256i)(__v16hi){ 0,1,2,3, 4,5,6,7, 8,9,10,11, 12,13,14,15}), 83), 3,0,1,1, 4,5,6,7, 11,8,9,9, 12,13,14,15) ); + __m256i test_mm256_sign_epi8(__m256i a, __m256i b) { // CHECK-LABEL: test_mm256_sign_epi8 // CHECK: call <32 x i8> @llvm.x86.avx2.psign.b(<32 x i8> %{{.*}}, <32 x i8> %{{.*}}) return _mm256_sign_epi8(a, b); } +TEST_CONSTEXPR(match_v32qi(_mm256_sign_epi8( + (__m256i)(__v32qs){0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1}, + (__m256i)(__v32qs){0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,-1}), + 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,-1)); __m256i test_mm256_sign_epi16(__m256i a, __m256i b) { // CHECK-LABEL: test_mm256_sign_epi16 // CHECK: call <16 x i16> @llvm.x86.avx2.psign.w(<16 x i16> %{{.*}}, <16 x i16> %{{.*}}) return _mm256_sign_epi16(a, b); } +TEST_CONSTEXPR(match_v16hi(_mm256_sign_epi16((__m256i)(__v16hi){0x77,0x77,0xbe,0xbe, -0x9,-0x9,-0x8,-0x8, 0,0,0,0, 0,0,0,0}, (__m256i)(__v16hi){-1,-256,1,256, -512,-1028,512,1028, -2048,-4096,0,0, 0,0,0,0}), -0x77,-0x77,0xbe,0xbe, 0x9,0x9,-0x8,-0x8, 0,0,0,0, 0,0,0,0)); __m256i test_mm256_sign_epi32(__m256i a, __m256i b) { // CHECK-LABEL: test_mm256_sign_epi32 // CHECK: call <8 x i32> @llvm.x86.avx2.psign.d(<8 x i32> %{{.*}}, <8 x i32> %{{.*}}) return _mm256_sign_epi32(a, b); } +TEST_CONSTEXPR(match_v8si(_mm256_sign_epi32((__m256i)(__v8si){0xbeef,0xfeed,0xbead,0xdeed, -1,2,-3,4}, (__m256i)(__v8si){0,0,0,0,-1,-1,-1,-1}), 0,0,0,0, 1,-2,3,-4)); __m256i test_mm256_slli_epi16(__m256i a) { // CHECK-LABEL: test_mm256_slli_epi16 diff --git a/clang/test/CodeGen/X86/mmx-builtins.c b/clang/test/CodeGen/X86/mmx-builtins.c index 7674255..2731380 100644 --- a/clang/test/CodeGen/X86/mmx-builtins.c +++ b/clang/test/CodeGen/X86/mmx-builtins.c @@ -602,23 +602,28 @@ __m64 test_mm_shuffle_pi16(__m64 a) { return _mm_shuffle_pi16(a, 3); } TEST_CONSTEXPR(match_v4hi(_mm_shuffle_pi16(((__m64)(__v4hi){0,1,2,3}), 3), 3,0,0,0)); + __m64 test_mm_sign_pi8(__m64 a, __m64 b) { // CHECK-LABEL: test_mm_sign_pi8 // CHECK: call <16 x i8> @llvm.x86.ssse3.psign.b.128( return _mm_sign_pi8(a, b); } +TEST_CONSTEXPR(match_v8qi(_mm_sign_pi8((__m64)(__v8qi){0,0,0,0, 0,0,0,0}, (__m64)(__v8qi){0,0,0,0, 0,0,0,0}), 0,0,0,0, 0,0,0,0)); +TEST_CONSTEXPR(match_v8qi(_mm_sign_pi8((__m64)(__v8qi){6,7,6,7, 6,7,6,7}, (__m64)(__v8qi){1,1,1,1, 0,0,0,0}), 6,7,6,7, 0,0,0,0)); __m64 test_mm_sign_pi16(__m64 a, __m64 b) { // CHECK-LABEL: test_mm_sign_pi16 // CHECK: call <8 x i16> @llvm.x86.ssse3.psign.w.128( return _mm_sign_pi16(a, b); } +TEST_CONSTEXPR(match_v4hi(_mm_sign_pi16((__m64)(__v4hi){-1,0,1,0}, (__m64)(__v4hi){1,0,-1,0}), -1,0,-1,0)); __m64 test_mm_sign_pi32(__m64 a, __m64 b) { // CHECK-LABEL: test_mm_sign_pi32 // CHECK: call <4 x i32> @llvm.x86.ssse3.psign.d.128( return _mm_sign_pi32(a, b); } +TEST_CONSTEXPR(match_v2si(_mm_sign_pi32((__m64)(__v2si){0x7FFF, -1}, (__m64)(__v2si){-1, 0x7FFF}), -0x7FFF, -1)); __m64 test_mm_sll_pi16(__m64 a, __m64 b) { // CHECK-LABEL: test_mm_sll_pi16 diff --git a/clang/test/CodeGen/X86/ssse3-builtins.c b/clang/test/CodeGen/X86/ssse3-builtins.c index f70afc0..b7a4a2f 100644 --- a/clang/test/CodeGen/X86/ssse3-builtins.c +++ b/clang/test/CodeGen/X86/ssse3-builtins.c @@ -125,15 +125,18 @@ __m128i test_mm_sign_epi8(__m128i a, __m128i b) { // CHECK: call <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8> %{{.*}}, <16 x i8> %{{.*}}) return _mm_sign_epi8(a, b); } +TEST_CONSTEXPR(match_v16qi(_mm_sign_epi8((__m128i)(__v16qs){11,0,13,14, 0,16,17,18, 19,20,21,22, 23,24,25,26}, (__m128i)(__v16qs){0,1,0,1, -1,1,0,0, 0,0,1,1, -1,0,-1,0}), 0,0,0,14, 0,16,0,0, 0,0,21,22, -23,0,-25,0)); __m128i test_mm_sign_epi16(__m128i a, __m128i b) { // CHECK-LABEL: test_mm_sign_epi16 // CHECK: call <8 x i16> @llvm.x86.ssse3.psign.w.128(<8 x i16> %{{.*}}, <8 x i16> %{{.*}}) return _mm_sign_epi16(a, b); } +TEST_CONSTEXPR(match_v8hi(_mm_sign_epi16((__m128i)(__v8hi){0,-2,0,-4,0,-6,0,-8}, (__m128i)(__v8hi){-1,-2,-3,-4,-5,-6,7,-8}), 0,2,0,4,0,6,0,8)); __m128i test_mm_sign_epi32(__m128i a, __m128i b) { // CHECK-LABEL: test_mm_sign_epi32 // CHECK: call <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32> %{{.*}}, <4 x i32> %{{.*}}) return _mm_sign_epi32(a, b); } +TEST_CONSTEXPR(match_v4si(_mm_sign_epi32((__m128i)(__v4si){-1,-2,-3,-4}, (__m128i)(__v4si){-4,-3,-2,-1}), 1,2,3,4)); diff --git a/clang/test/CodeGen/arm-acle-coproc.c b/clang/test/CodeGen/arm-acle-coproc.c index 93b713b..5acb9f6 100644 --- a/clang/test/CodeGen/arm-acle-coproc.c +++ b/clang/test/CodeGen/arm-acle-coproc.c @@ -26,6 +26,7 @@ // RUN: %clang_cc1 -triple armv9.4a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s // RUN: %clang_cc1 -triple armv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s // RUN: %clang_cc1 -triple armv9.6a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s +// RUN: %clang_cc1 -triple armv9.7a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s // RUN: %clang_cc1 -triple thumbv4 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s // RUN: %clang_cc1 -triple thumbv4t %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s // RUN: %clang_cc1 -triple thumbv5 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V5-THUMB %s @@ -56,6 +57,7 @@ // RUN: %clang_cc1 -triple thumbv9.4a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s // RUN: %clang_cc1 -triple thumbv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s // RUN: %clang_cc1 -triple thumbv9.6a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s +// RUN: %clang_cc1 -triple thumbv9.7a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s // RUN: %clang_cc1 -triple thumbv8m.base %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-BASE %s // RUN: %clang_cc1 -triple thumbv8m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s // RUN: %clang_cc1 -triple thumbv8.1m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s diff --git a/clang/test/CodeGenHLSL/semantics/semantic-struct-1.hlsl b/clang/test/CodeGenHLSL/semantics/semantic-struct-1.hlsl new file mode 100644 index 0000000..ddd0bae --- /dev/null +++ b/clang/test/CodeGenHLSL/semantics/semantic-struct-1.hlsl @@ -0,0 +1,23 @@ +// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm -finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-DXIL -DTARGET=dx +// RUN: %clang_cc1 -triple spirv-linux-vulkan-library -x hlsl -emit-llvm -finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV -DTARGET=spv + + +struct Input { + uint Idx : SV_DispatchThreadID; + +}; + +// Make sure SV_DispatchThreadID translated into dx.thread.id. + +// CHECK: define void @foo() +// CHECK-DXIL: %[[#ID:]] = call i32 @llvm.[[TARGET]].thread.id(i32 0) +// CHECK-SPIRV: %[[#ID:]] = call i32 @llvm.[[TARGET]].thread.id.i32(i32 0) +// CHECK: %[[#TMP:]] = insertvalue %struct.Input poison, i32 %[[#ID]], 0 +// CHECK: %[[#VAR:]] = alloca %struct.Input, align 8 +// CHECK: store %struct.Input %[[#TMP]], ptr %[[#VAR]], align 4 +// CHECK-DXIL: call void @{{.*}}foo{{.*}}(ptr %[[#VAR]]) +// CHECK-SPIRV: call spir_func void @{{.*}}foo{{.*}}(ptr %[[#VAR]]) +[shader("compute")] +[numthreads(8,8,1)] +void foo(Input input) {} + diff --git a/clang/test/CodeGenHLSL/semantics/semantic-struct-2.hlsl b/clang/test/CodeGenHLSL/semantics/semantic-struct-2.hlsl new file mode 100644 index 0000000..0d9c91e --- /dev/null +++ b/clang/test/CodeGenHLSL/semantics/semantic-struct-2.hlsl @@ -0,0 +1,25 @@ +// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm -finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-DXIL -DTARGET=dx +// RUN: %clang_cc1 -triple spirv-linux-vulkan-library -x hlsl -emit-llvm -finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV -DTARGET=spv + + +struct Input { + uint Idx : SV_DispatchThreadID; + uint Gid : SV_GroupID; +}; + +// Make sure SV_DispatchThreadID translated into dx.thread.id. + +// CHECK: define void @foo() +// CHECK-DXIL: %[[#ID:]] = call i32 @llvm.[[TARGET]].thread.id(i32 0) +// CHECK-SPIRV: %[[#ID:]] = call i32 @llvm.[[TARGET]].thread.id.i32(i32 0) +// CHECK: %[[#TMP1:]] = insertvalue %struct.Input poison, i32 %[[#ID]], 0 +// CHECK-DXIL: %[[#GID:]] = call i32 @llvm.[[TARGET]].group.id(i32 0) +// CHECK-SPIRV:%[[#GID:]] = call i32 @llvm.[[TARGET]].group.id.i32(i32 0) +// CHECK: %[[#TMP2:]] = insertvalue %struct.Input %[[#TMP1]], i32 %[[#GID]], 1 +// CHECK: %[[#VAR:]] = alloca %struct.Input, align 8 +// CHECK: store %struct.Input %[[#TMP2]], ptr %[[#VAR]], align 4 +// CHECK-DXIL: call void @{{.*}}foo{{.*}}(ptr %[[#VAR]]) +// CHECK-SPIRV: call spir_func void @{{.*}}foo{{.*}}(ptr %[[#VAR]]) +[shader("compute")] +[numthreads(8,8,1)] +void foo(Input input) {} diff --git a/clang/test/CodeGenHLSL/semantics/semantic-struct-nested-inherit.hlsl b/clang/test/CodeGenHLSL/semantics/semantic-struct-nested-inherit.hlsl new file mode 100644 index 0000000..f4c4d86 --- /dev/null +++ b/clang/test/CodeGenHLSL/semantics/semantic-struct-nested-inherit.hlsl @@ -0,0 +1,30 @@ +// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm -finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-DXIL -DTARGET=dx +// RUN: %clang_cc1 -triple spirv-linux-vulkan-library -x hlsl -emit-llvm -finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV -DTARGET=spv + + +struct Inner { + uint Gid; +}; + +struct Input { + uint Idx : SV_DispatchThreadID; + Inner inner : SV_GroupIndex; +}; + +// Make sure SV_DispatchThreadID translated into dx.thread.id. + +// CHECK: define void @foo() +// CHECK-DXIL: %[[#ID:]] = call i32 @llvm.[[TARGET]].thread.id(i32 0) +// CHECK-SPIRV: %[[#ID:]] = call i32 @llvm.[[TARGET]].thread.id.i32(i32 0) +// CHECK: %[[#TMP1:]] = insertvalue %struct.Input poison, i32 %[[#ID]], 0 +// CHECK-DXIL: %[[#GID:]] = call i32 @llvm.dx.flattened.thread.id.in.group() +// CHECK-SPIRV:%[[#GID:]] = call i32 @llvm.spv.flattened.thread.id.in.group() +// CHECK: %[[#TMP2:]] = insertvalue %struct.Inner poison, i32 %[[#GID]], 0 +// CHECK: %[[#TMP3:]] = insertvalue %struct.Input %[[#TMP1]], %struct.Inner %[[#TMP2]], 1 +// CHECK: %[[#VAR:]] = alloca %struct.Input, align 8 +// CHECK: store %struct.Input %[[#TMP3]], ptr %[[#VAR]], align 4 +// CHECK-DXIL: call void @{{.*}}foo{{.*}}(ptr %[[#VAR]]) +// CHECK-SPIRV: call spir_func void @{{.*}}foo{{.*}}(ptr %[[#VAR]]) +[shader("compute")] +[numthreads(8,8,1)] +void foo(Input input) {} diff --git a/clang/test/CodeGenHLSL/semantics/semantic-struct-nested-shadow.hlsl b/clang/test/CodeGenHLSL/semantics/semantic-struct-nested-shadow.hlsl new file mode 100644 index 0000000..e1344dd --- /dev/null +++ b/clang/test/CodeGenHLSL/semantics/semantic-struct-nested-shadow.hlsl @@ -0,0 +1,30 @@ +// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm -finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-DXIL -DTARGET=dx +// RUN: %clang_cc1 -triple spirv-linux-vulkan-library -x hlsl -emit-llvm -finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV -DTARGET=spv + + +struct Inner { + uint Gid : SV_GroupID; +}; + +struct Input { + uint Idx : SV_DispatchThreadID; + Inner inner : SV_GroupIndex; +}; + +// Make sure SV_DispatchThreadID translated into dx.thread.id. + +// CHECK: define void @foo() +// CHECK-DXIL: %[[#ID:]] = call i32 @llvm.[[TARGET]].thread.id(i32 0) +// CHECK-SPIRV: %[[#ID:]] = call i32 @llvm.[[TARGET]].thread.id.i32(i32 0) +// CHECK: %[[#TMP1:]] = insertvalue %struct.Input poison, i32 %[[#ID]], 0 +// CHECK-DXIL: %[[#GID:]] = call i32 @llvm.dx.flattened.thread.id.in.group() +// CHECK-SPIRV:%[[#GID:]] = call i32 @llvm.spv.flattened.thread.id.in.group() +// CHECK: %[[#TMP2:]] = insertvalue %struct.Inner poison, i32 %[[#GID]], 0 +// CHECK: %[[#TMP3:]] = insertvalue %struct.Input %[[#TMP1]], %struct.Inner %[[#TMP2]], 1 +// CHECK: %[[#VAR:]] = alloca %struct.Input, align 8 +// CHECK: store %struct.Input %[[#TMP3]], ptr %[[#VAR]], align 4 +// CHECK-DXIL: call void @{{.*}}foo{{.*}}(ptr %[[#VAR]]) +// CHECK-SPIRV: call spir_func void @{{.*}}foo{{.*}}(ptr %[[#VAR]]) +[shader("compute")] +[numthreads(8,8,1)] +void foo(Input input) {} diff --git a/clang/test/CodeGenHLSL/semantics/semantic-struct-nested.hlsl b/clang/test/CodeGenHLSL/semantics/semantic-struct-nested.hlsl new file mode 100644 index 0000000..cd6f946 --- /dev/null +++ b/clang/test/CodeGenHLSL/semantics/semantic-struct-nested.hlsl @@ -0,0 +1,30 @@ +// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm -finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-DXIL -DTARGET=dx +// RUN: %clang_cc1 -triple spirv-linux-vulkan-library -x hlsl -emit-llvm -finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV -DTARGET=spv + + +struct Inner { + uint Gid : SV_GroupID; +}; + +struct Input { + uint Idx : SV_DispatchThreadID; + Inner inner; +}; + +// Make sure SV_DispatchThreadID translated into dx.thread.id. + +// CHECK: define void @foo() +// CHECK-DXIL: %[[#ID:]] = call i32 @llvm.[[TARGET]].thread.id(i32 0) +// CHECK-SPIRV: %[[#ID:]] = call i32 @llvm.[[TARGET]].thread.id.i32(i32 0) +// CHECK: %[[#TMP1:]] = insertvalue %struct.Input poison, i32 %[[#ID]], 0 +// CHECK-DXIL: %[[#GID:]] = call i32 @llvm.[[TARGET]].group.id(i32 0) +// CHECK-SPIRV:%[[#GID:]] = call i32 @llvm.[[TARGET]].group.id.i32(i32 0) +// CHECK: %[[#TMP2:]] = insertvalue %struct.Inner poison, i32 %[[#GID]], 0 +// CHECK: %[[#TMP3:]] = insertvalue %struct.Input %[[#TMP1]], %struct.Inner %[[#TMP2]], 1 +// CHECK: %[[#VAR:]] = alloca %struct.Input, align 8 +// CHECK: store %struct.Input %[[#TMP3]], ptr %[[#VAR]], align 4 +// CHECK-DXIL: call void @{{.*}}foo{{.*}}(ptr %[[#VAR]]) +// CHECK-SPIRV: call spir_func void @{{.*}}foo{{.*}}(ptr %[[#VAR]]) +[shader("compute")] +[numthreads(8,8,1)] +void foo(Input input) {} diff --git a/clang/test/Driver/DTLTO/Inputs/dtlto-helper.py b/clang/test/Driver/DTLTO/Inputs/dtlto-helper.py new file mode 100644 index 0000000..6eb9f68 --- /dev/null +++ b/clang/test/Driver/DTLTO/Inputs/dtlto-helper.py @@ -0,0 +1,11 @@ +from pathlib import Path +import sys + +# Arg 1: "clang" path. +p = Path(sys.argv[1]) +print(f"clang-name:{p.resolve().name}") +# Arg 2: Non-zero for LLVM driver. +if sys.argv[2] != "0": + print(f'prepend-arg:"--thinlto-remote-compiler-prepend-arg={p.name}"') +else: + print("prepend-arg: ") diff --git a/clang/test/Driver/DTLTO/dtlto.c b/clang/test/Driver/DTLTO/dtlto.c index f31b635..5fbf788 100644 --- a/clang/test/Driver/DTLTO/dtlto.c +++ b/clang/test/Driver/DTLTO/dtlto.c @@ -3,16 +3,18 @@ /// Check DTLTO options are forwarded to the linker. /// Check that options are forwarded as expected with --thinlto-distributor=. -// RUN: %python %S/filename.py %clang > %t_forward.log +// RUN: %python %S/Inputs/dtlto-helper.py %clang %llvm-driver > %t_forward.log // RUN: %clang -flto=thin %s -### -fuse-ld=lld --target=x86_64-linux-gnu \ // RUN: -Xthinlto-distributor=a1 -Xthinlto-distributor=a2,a3 \ // RUN: -fthinlto-distributor=d.exe -Werror >>%t_forward.log 2>&1 // RUN: FileCheck %s --input-file=%t_forward.log --check-prefix=FORWARD -// FORWARD: filename.py:[[CLANG:.*]] -// FORWARD: ld.lld +// FORWARD: clang-name:[[CLANG:.*]] +// FORWARD-NEXT: prepend-arg:[[PREPEND_ARG:.*]] +// FORWARD: ld.lld // FORWARD-SAME: "--thinlto-distributor=d.exe" // FORWARD-SAME: "--thinlto-remote-compiler={{[^"]*}}[[CLANG]]" +// FORWARD-SAME: [[PREPEND_ARG]] // FORWARD-SAME: "--thinlto-distributor-arg=a1" // FORWARD-SAME: "--thinlto-distributor-arg=a2" // FORWARD-SAME: "--thinlto-distributor-arg=a3" @@ -30,24 +32,25 @@ /// Check the expected arguments are forwarded by default with only /// --thinlto-distributor=. -// RUN: %python %S/filename.py %clang > %t_default.log +// RUN: %python %S/Inputs/dtlto-helper.py %clang %llvm-driver > %t_default.log // RUN: %clang -flto=thin %s -### -fuse-ld=lld --target=x86_64-linux-gnu \ // RUN: -fthinlto-distributor=d.exe -Werror >>%t_default.log 2>&1 // RUN: FileCheck %s --input-file=%t_default.log --check-prefix=DEFAULT \ // RUN: --implicit-check-not=distributor --implicit-check-not=remote-compiler -// DEFAULT: filename.py:[[CLANG:.*]] -// DEFAULT: ld.lld +// DEFAULT: clang-name:[[CLANG:.*]] +// DEFAULT-NEXT: prepend-arg:[[PREPEND_ARG:.*]] +// DEFAULT: ld.lld // DEFAULT-SAME: "--thinlto-distributor=d.exe" // DEFAULT-SAME: "--thinlto-remote-compiler={{[^"]*}}[[CLANG]]" +// DEFAULT-SAME: [[PREPEND_ARG]] /// Check that nothing is forwarded when the compiler is not in LTO mode, and that /// appropriate unused option warnings are issued. -// RUN: %python %S/filename.py %clang > %t_noflto.log // RUN: %clang %s -### -fuse-ld=lld --target=x86_64-linux-gnu \ -// RUN: -fthinlto-distributor=d.exe >>%t_noflto.log 2>&1 -// RUN: FileCheck %s --input-file=%t_noflto.log --check-prefix=NOFLTO \ -// RUN: --implicit-check-not=distributor --implicit-check-not=remote-compiler +// RUN: -fthinlto-distributor=d.exe 2>&1 | \ +// RUN: FileCheck %s --check-prefix=NOFLTO --implicit-check-not=distributor \ +// RUN: --implicit-check-not=remote-compiler // NOFLTO: warning: argument unused during compilation: '-fthinlto-distributor=d.exe' // NOFLTO: ld.lld diff --git a/clang/test/Driver/DTLTO/filename.py b/clang/test/Driver/DTLTO/filename.py deleted file mode 100644 index df1aeb6..0000000 --- a/clang/test/Driver/DTLTO/filename.py +++ /dev/null @@ -1,4 +0,0 @@ -from pathlib import Path -import sys - -print(f"filename.py:{Path(sys.argv[1]).resolve().name}") diff --git a/clang/test/Driver/DTLTO/lit.local.cfg b/clang/test/Driver/DTLTO/lit.local.cfg new file mode 100644 index 0000000..0756c5c --- /dev/null +++ b/clang/test/Driver/DTLTO/lit.local.cfg @@ -0,0 +1,3 @@ +from lit.llvm import llvm_config + +config.substitutions.append(("%llvm-driver", "1" if "llvm-driver" in config.available_features else "0")) diff --git a/clang/test/Driver/DTLTO/ps5-dtlto.c b/clang/test/Driver/DTLTO/ps5-dtlto.c index 4c10a02..b59fb48 100644 --- a/clang/test/Driver/DTLTO/ps5-dtlto.c +++ b/clang/test/Driver/DTLTO/ps5-dtlto.c @@ -3,16 +3,18 @@ /// Check DTLTO options are forwarded to the linker. /// Check that options are forwarded as expected with --thinlto-distributor=. -// RUN: %python %S/filename.py %clang > %t_forward.log +// RUN: %python %S/Inputs/dtlto-helper.py %clang %llvm-driver > %t_forward.log // RUN: %clang -flto=thin %s -### --target=x86_64-sie-ps5 \ // RUN: -Xthinlto-distributor=a1 -Xthinlto-distributor=a2,a3 \ // RUN: -fthinlto-distributor=d.exe -Werror >>%t_forward.log 2>&1 // RUN: FileCheck %s --input-file=%t_forward.log --check-prefix=FORWARD -// FORWARD: filename.py:[[CLANG:.*]] -// FORWARD: prospero-lld +// FORWARD: clang-name:[[CLANG:.*]] +// FORWARD-NEXT: prepend-arg:[[PREPEND_ARG:.*]] +// FORWARD: prospero-lld // FORWARD-SAME: "--thinlto-distributor=d.exe" // FORWARD-SAME: "--thinlto-remote-compiler={{[^"]*}}[[CLANG]]" +// FORWARD-SAME: [[PREPEND_ARG]] // FORWARD-SAME: "--thinlto-distributor-arg=a1" // FORWARD-SAME: "--thinlto-distributor-arg=a2" // FORWARD-SAME: "--thinlto-distributor-arg=a3" @@ -30,20 +32,22 @@ /// Check the expected arguments are forwarded by default with only /// --thinlto-distributor=. -// RUN: %python %S/filename.py %clang > %t_default.log +// RUN: %python %S/Inputs/dtlto-helper.py %clang %llvm-driver > %t_default.log // RUN: %clang -flto=thin %s -### --target=x86_64-sie-ps5 \ // RUN: -fthinlto-distributor=d.exe -Werror >>%t_default.log 2>&1 // RUN: FileCheck %s --input-file=%t_default.log --check-prefix=DEFAULT \ // RUN: --implicit-check-not=distributor --implicit-check-not=remote-compiler -// DEFAULT: filename.py:[[CLANG:.*]] -// DEFAULT: prospero-lld +// DEFAULT: clang-name:[[CLANG:.*]] +// DEFAULT-NEXT: prepend-arg:[[PREPEND_ARG:.*]] +// DEFAULT: prospero-lld // DEFAULT-SAME: "--thinlto-distributor=d.exe" // DEFAULT-SAME: "--thinlto-remote-compiler={{[^"]*}}[[CLANG]]" +// DEFAULT-SAME: [[PREPEND_ARG]] /// Check that the arguments are forwarded unconditionally even when the /// compiler is not in LTO mode. -// RUN: %python %S/filename.py %clang > %t_noflto.log +// RUN: %python %S/Inputs/dtlto-helper.py %clang %llvm-driver > %t_noflto.log // RUN: %clang %s -### --target=x86_64-sie-ps5 \ // RUN: -fthinlto-distributor=d.exe -Werror >>%t_noflto.log 2>&1 // RUN: FileCheck %s --input-file=%t_noflto.log --check-prefix=DEFAULT \ diff --git a/clang/test/Driver/aarch64-v96a.c b/clang/test/Driver/aarch64-v96a.c index de78901..e0081bb 100644 --- a/clang/test/Driver/aarch64-v96a.c +++ b/clang/test/Driver/aarch64-v96a.c @@ -6,7 +6,7 @@ // RUN: %clang -target aarch64 -mlittle-endian -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A %s // RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A %s // RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A %s -// GENERICV96A: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+cmpbr"{{.*}} "-target-feature" "+fprcvt"{{.*}} "-target-feature" "+sve2p2" +// GENERICV96A: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+cmpbr"{{.*}} // RUN: %clang -target aarch64_be -march=armv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s // RUN: %clang -target aarch64_be -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s @@ -14,7 +14,7 @@ // RUN: %clang -target aarch64 -mbig-endian -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s // RUN: %clang -target aarch64_be -mbig-endian -march=armv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s // RUN: %clang -target aarch64_be -mbig-endian -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s -// GENERICV96A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+cmpbr"{{.*}} "-target-feature" "+fprcvt"{{.*}} "-target-feature" "+sve2p2" +// GENERICV96A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+cmpbr"{{.*}} // ===== Features supported on aarch64 ===== diff --git a/clang/test/Driver/aarch64-v97a.c b/clang/test/Driver/aarch64-v97a.c new file mode 100644 index 0000000..1e54e6b --- /dev/null +++ b/clang/test/Driver/aarch64-v97a.c @@ -0,0 +1,59 @@ +// ===== Base v9.7a architecture ===== + +// RUN: %clang -target aarch64 -march=armv9.7a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV97A %s +// RUN: %clang -target aarch64 -march=armv9.7-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV97A %s +// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.7a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV97A %s +// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.7-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV97A %s +// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.7a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV97A %s +// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.7-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV97A %s +// GENERICV97A: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+fprcvt"{{.*}} "-target-feature" "+sve2p3"{{.*}} + +// RUN: %clang -target aarch64_be -march=armv9.7a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV97A-BE %s +// RUN: %clang -target aarch64_be -march=armv9.7-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV97A-BE %s +// RUN: %clang -target aarch64 -mbig-endian -march=armv9.7a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV97A-BE %s +// RUN: %clang -target aarch64 -mbig-endian -march=armv9.7-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV97A-BE %s +// RUN: %clang -target aarch64_be -mbig-endian -march=armv9.7a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV97A-BE %s +// RUN: %clang -target aarch64_be -mbig-endian -march=armv9.7-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV97A-BE %s +// GENERICV97A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+fprcvt"{{.*}} "-target-feature" "+sve2p3"{{.*}} + +// ===== Features supported on aarch64 ===== + +// RUN: %clang -target aarch64 -march=armv9.7a+sme2p3 -### -c %s 2>&1 | FileCheck -check-prefix=V97A-SME2p3 %s +// RUN: %clang -target aarch64 -march=armv9.7-a+sme2p3 -### -c %s 2>&1 | FileCheck -check-prefix=V97A-SME2p3 %s +// V97A-SME2p3: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+sme2p3" + +// RUN: %clang -target aarch64 -march=armv9.7a+sve2p3 -### -c %s 2>&1 | FileCheck -check-prefix=V97A-SVE2p3 %s +// RUN: %clang -target aarch64 -march=armv9.7-a+sve2p3 -### -c %s 2>&1 | FileCheck -check-prefix=V97A-SVE2p3 %s +// V97A-SVE2p3: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+sve2p3" + +// RUN: %clang -target aarch64 -march=armv9.7a+sve-b16mm -### -c %s 2>&1 | FileCheck -check-prefix=V97A-SVE-B16MM %s +// RUN: %clang -target aarch64 -march=armv9.7-a+sve-b16mm -### -c %s 2>&1 | FileCheck -check-prefix=V97A-SVE-B16MM %s +// V97A-SVE-B16MM: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+sve-b16mm" + +// RUN: %clang -target aarch64 -march=armv9.7a+f16mm -### -c %s 2>&1 | FileCheck -check-prefix=V97A-F16MM %s +// RUN: %clang -target aarch64 -march=armv9.7-a+f16mm -### -c %s 2>&1 | FileCheck -check-prefix=V97A-F16MM %s +// V97A-F16MM: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+f16mm" + +// RUN: %clang -target aarch64 -march=armv9.7a+cmh -### -c %s 2>&1 | FileCheck -check-prefix=V97A-CMH %s +// RUN: %clang -target aarch64 -march=armv9.7-a+cmh -### -c %s 2>&1 | FileCheck -check-prefix=V97A-CMH %s +// V97A-CMH: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+cmh" + +// RUN: %clang -target aarch64 -march=armv9.7a+lscp -### -c %s 2>&1 | FileCheck -check-prefix=V97A-LSCP %s +// RUN: %clang -target aarch64 -march=armv9.7-a+lscp -### -c %s 2>&1 | FileCheck -check-prefix=V97A-LSCP %s +// V97A-LSCP: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+lscp" + +// RUN: %clang -target aarch64 -march=armv9.7a+tlbid -### -c %s 2>&1 | FileCheck -check-prefix=V97A-TLBID %s +// RUN: %clang -target aarch64 -march=armv9.7-a+tlbid -### -c %s 2>&1 | FileCheck -check-prefix=V97A-TLBID %s +// V97A-TLBID: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+tlbid" + +// RUN: %clang -target aarch64 -march=armv9.7a+mpamv2 -### -c %s 2>&1 | FileCheck -check-prefix=V97A-MPAMv2 %s +// RUN: %clang -target aarch64 -march=armv9.7-a+mpamv2 -### -c %s 2>&1 | FileCheck -check-prefix=V97A-MPAMv2 %s +// V97A-MPAMv2: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+mpamv2" + +// RUN: %clang -target aarch64 -march=armv9.7a+mtetc -### -c %s 2>&1 | FileCheck -check-prefix=V97A-MTETC %s +// RUN: %clang -target aarch64 -march=armv9.7-a+mtetc -### -c %s 2>&1 | FileCheck -check-prefix=V97A-MTETC %s +// V97A-MTETC: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+mtetc" + +// RUN: %clang -target aarch64 -march=armv9.7a+gcie -### -c %s 2>&1 | FileCheck -check-prefix=V97A-GCIE %s +// RUN: %clang -target aarch64 -march=armv9.7-a+gcie -### -c %s 2>&1 | FileCheck -check-prefix=V97A-GCIE %s +// V97A-GCIE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+gcie" diff --git a/clang/test/Driver/arm-cortex-cpus-1.c b/clang/test/Driver/arm-cortex-cpus-1.c index 5d3169f..08cb63b1 100644 --- a/clang/test/Driver/arm-cortex-cpus-1.c +++ b/clang/test/Driver/arm-cortex-cpus-1.c @@ -512,3 +512,20 @@ // RUN: %clang -target arm -march=armebv9.6a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V96A %s // RUN: %clang -target arm -march=armebv9.6-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V96A %s // CHECK-BE-V96A: "-cc1"{{.*}} "-triple" "armebv9.6{{.*}}" "-target-cpu" "generic" +// +// RUN: %clang -target armv9.7a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V97A %s +// RUN: %clang -target arm -march=armv9.7a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V97A %s +// RUN: %clang -target arm -march=armv9.7-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V97A %s +// RUN: %clang -target arm -march=armv9.7a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V97A %s +// RUN: %clang -target armv9.7a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V97A %s +// RUN: %clang -target arm -march=armv9.7a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V97A %s +// RUN: %clang -target arm -mlittle-endian -march=armv9.7-a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V97A %s +// CHECK-V97A: "-cc1"{{.*}} "-triple" "armv9.7{{.*}}" "-target-cpu" "generic" + +// RUN: %clang -target armebv9.7a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V97A %s +// RUN: %clang -target armv9.7a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V97A %s +// RUN: %clang -target armeb -march=armebv9.7a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V97A %s +// RUN: %clang -target armeb -march=armebv9.7-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V97A %s +// RUN: %clang -target arm -march=armebv9.7a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V97A %s +// RUN: %clang -target arm -march=armebv9.7-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V97A %s +// CHECK-BE-V97A: "-cc1"{{.*}} "-triple" "armebv9.7{{.*}}" "-target-cpu" "generic" diff --git a/clang/test/Driver/print-supported-extensions-aarch64.c b/clang/test/Driver/print-supported-extensions-aarch64.c index 5c840a6..7294c33 100644 --- a/clang/test/Driver/print-supported-extensions-aarch64.c +++ b/clang/test/Driver/print-supported-extensions-aarch64.c @@ -8,6 +8,7 @@ // CHECK-NEXT: bf16 FEAT_BF16 Enable BFloat16 Extension // CHECK-NEXT: brbe FEAT_BRBE Enable Branch Record Buffer Extension // CHECK-NEXT: bti FEAT_BTI Enable Branch Target Identification +// CHECK-NEXT: cmh FEAT_CMH Enable Armv9.7-A Contention Management Hints // CHECK-NEXT: cmpbr FEAT_CMPBR Enable Armv9.6-A base compare and branch instructions // CHECK-NEXT: fcma FEAT_FCMA Enable Armv8.3-A Floating-point complex number support // CHECK-NEXT: cpa FEAT_CPA Enable Armv9.5-A Checked Pointer Arithmetic @@ -17,6 +18,9 @@ // CHECK-NEXT: d128 FEAT_D128, FEAT_LVA3, FEAT_SYSREG128, FEAT_SYSINSTR128 Enable Armv9.4-A 128-bit Page Table Descriptors, System Registers and instructions // CHECK-NEXT: dit FEAT_DIT Enable Armv8.4-A Data Independent Timing instructions // CHECK-NEXT: dotprod FEAT_DotProd Enable dot product support +// CHECK-NEXT: f16f32dot FEAT_F16F32DOT Enable Armv9.7-A Advanced SIMD half-precision dot product accumulate to single-precision +// CHECK-NEXT: f16f32mm FEAT_F16F32MM Enable Armv9.7-A Advanced SIMD half-precision matrix multiply-accumulate to single-precision +// CHECK-NEXT: f16mm FEAT_F16MM Enable Armv9.7-A non-widening half-precision matrix multiply-accumulate // CHECK-NEXT: f32mm FEAT_F32MM Enable Matrix Multiply FP32 Extension // CHECK-NEXT: f64mm FEAT_F64MM Enable Matrix Multiply FP64 Extension // CHECK-NEXT: f8f16mm FEAT_F8F16MM Enable Armv9.6-A FP8 to Half-Precision Matrix Multiplication @@ -31,19 +35,23 @@ // CHECK-NEXT: fp8fma FEAT_FP8FMA Enable Armv9.5-A FP8 multiply-add instructions // CHECK-NEXT: fprcvt FEAT_FPRCVT Enable Armv9.6-A base convert instructions for SIMD&FP scalar register operands of different input and output sizes // CHECK-NEXT: fp16 FEAT_FP16 Enable half-precision floating-point data processing +// CHECK-NEXT: gcie FEAT_GCIE Enable GICv5 (Generic Interrupt Controller) CPU Interface Extension // CHECK-NEXT: gcs FEAT_GCS Enable Armv9.4-A Guarded Call Stack Extension // CHECK-NEXT: hbc FEAT_HBC Enable Armv8.8-A Hinted Conditional Branches Extension // CHECK-NEXT: i8mm FEAT_I8MM Enable Matrix Multiply Int8 Extension // CHECK-NEXT: ite FEAT_ITE Enable Armv9.4-A Instrumentation Extension // CHECK-NEXT: jscvt FEAT_JSCVT Enable Armv8.3-A JavaScript FP conversion instructions // CHECK-NEXT: ls64 FEAT_LS64, FEAT_LS64_V, FEAT_LS64_ACCDATA Enable Armv8.7-A LD64B/ST64B Accelerator Extension +// CHECK-NEXT: lscp FEAT_LSCP Enable Armv9.7-A Load-acquire and store-release pair extension // CHECK-NEXT: lse FEAT_LSE Enable Armv8.1-A Large System Extension (LSE) atomic instructions // CHECK-NEXT: lse128 FEAT_LSE128 Enable Armv9.4-A 128-bit Atomic instructions // CHECK-NEXT: lsfe FEAT_LSFE Enable Armv9.6-A base Atomic floating-point in-memory instructions // CHECK-NEXT: lsui FEAT_LSUI Enable Armv9.6-A unprivileged load/store instructions // CHECK-NEXT: lut FEAT_LUT Enable Lookup Table instructions // CHECK-NEXT: mops FEAT_MOPS Enable Armv8.8-A memcpy and memset acceleration instructions +// CHECK-NEXT: mpamv2 FEAT_MPAMv2 Enable Armv9.7-A MPAMv2 Lookaside Buffer Invalidate instructions // CHECK-NEXT: memtag FEAT_MTE, FEAT_MTE2 Enable Memory Tagging Extension +// CHECK-NEXT: mtetc FEAT_MTETC Enable Virtual Memory Tagging Extension // CHECK-NEXT: simd FEAT_AdvSIMD Enable Advanced SIMD instructions // CHECK-NEXT: occmo FEAT_OCCMO Enable Armv9.6-A Outer cacheable cache maintenance operations // CHECK-NEXT: pauth FEAT_PAuth Enable Armv8.3-A Pointer Authentication extension @@ -76,6 +84,7 @@ // CHECK-NEXT: sme2 FEAT_SME2 Enable Scalable Matrix Extension 2 (SME2) instructions // CHECK-NEXT: sme2p1 FEAT_SME2p1 Enable Scalable Matrix Extension 2.1 instructions // CHECK-NEXT: sme2p2 FEAT_SME2p2 Enable Armv9.6-A Scalable Matrix Extension 2.2 instructions +// CHECK-NEXT: sme2p3 FEAT_SME2p3 Enable Armv9.7-A Scalable Matrix Extension 2.3 instructions // CHECK-NEXT: profile FEAT_SPE Enable Statistical Profiling extension // CHECK-NEXT: predres2 FEAT_SPECRES2 Enable Speculation Restriction Instruction // CHECK-NEXT: ssbs FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit @@ -89,6 +98,7 @@ // CHECK-NEXT: sve-aes FEAT_SVE_AES, FEAT_SVE_PMULL128 Enable SVE AES and quadword SVE polynomial multiply instructions // CHECK-NEXT: sve-aes2 FEAT_SVE_AES2 Enable Armv9.6-A SVE multi-vector AES and multi-vector quadword polynomial multiply instructions // CHECK-NEXT: sve-b16b16 FEAT_SVE_B16B16 Enable SVE2 non-widening and SME2 Z-targeting non-widening BFloat16 instructions +// CHECK-NEXT: sve-b16mm FEAT_SVE_B16MM Enable Armv9.7-A SVE non-widening BFloat16 matrix multiply-accumulate // CHECK-NEXT: sve-bfscale FEAT_SVE_BFSCALE Enable Armv9.6-A SVE BFloat16 scaling instructions // CHECK-NEXT: sve-bitperm FEAT_SVE_BitPerm Enable bit permutation SVE2 instructions // CHECK-NEXT: sve-f16f32mm FEAT_SVE_F16F32MM Enable Armv9.6-A FP16 to FP32 Matrix Multiply @@ -101,7 +111,9 @@ // CHECK-NEXT: sve2-sm4 Shorthand for +sve2+sve-sm4 // CHECK-NEXT: sve2p1 FEAT_SVE2p1 Enable Scalable Vector Extension 2.1 instructions // CHECK-NEXT: sve2p2 FEAT_SVE2p2 Enable Armv9.6-A Scalable Vector Extension 2.2 instructions +// CHECK-NEXT: sve2p3 FEAT_SVE2p3 Enable Armv9.7-A Scalable Vector Extension 2.3 instructions // CHECK-NEXT: the FEAT_THE Enable Armv8.9-A Translation Hardening Extension +// CHECK-NEXT: tlbid FEAT_TLBID Enable Armv9.7-A TLBI Domains extension // CHECK-NEXT: tlbiw FEAT_TLBIW Enable Armv9.5-A TLBI VMALL for Dirty State // CHECK-NEXT: tme FEAT_TME Enable Transactional Memory Extension // CHECK-NEXT: wfxt FEAT_WFxT Enable Armv8.7-A WFET and WFIT instruction diff --git a/clang/test/Headers/floatneeds.c b/clang/test/Headers/floatneeds.c new file mode 100644 index 0000000..e544b41 --- /dev/null +++ b/clang/test/Headers/floatneeds.c @@ -0,0 +1,41 @@ +// RUN: rm -fR %t +// RUN: split-file %s %t +// RUN: %clang_cc1 -fsyntax-only -verify=c99 -std=c99 %t/floatneeds0.c +// RUN: %clang_cc1 -fsyntax-only -verify=c99 -std=c99 %t/floatneeds1.c +// RUN: %clang_cc1 -fsyntax-only -verify=c23 -std=c23 %t/floatneeds0.c +// RUN: %clang_cc1 -fsyntax-only -verify=c23 -std=c23 %t/floatneeds1.c +// RUN: %clang_cc1 -fsyntax-only -verify=c99-modules -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -std=c99 %t/floatneeds0.c +// RUN: %clang_cc1 -fsyntax-only -verify=c99-modules -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -std=c99 %t/floatneeds1.c +// RUN: %clang_cc1 -fsyntax-only -verify=c23-modules -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -std=c23 %t/floatneeds0.c +// RUN: %clang_cc1 -fsyntax-only -verify=c23-modules -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -std=c23 %t/floatneeds1.c + +// Use C99 to verify that __need_ can be used to get types that wouldn't normally be available. + +//--- floatneeds0.c +float infinity0 = INFINITY; // c99-error{{undeclared identifier 'INFINITY'}} c23-error{{undeclared identifier 'INFINITY'}} \ + c99-modules-error{{undeclared identifier 'INFINITY'}} c23-modules-error{{undeclared identifier 'INFINITY'}} +float nan0 = NAN; // c99-error{{undeclared identifier 'NAN'}} c23-error{{undeclared identifier 'NAN'}} \ + c99-modules-error{{undeclared identifier 'NAN'}} c23-modules-error{{undeclared identifier 'NAN'}} +float max0 = FLT_MAX; // c99-error{{undeclared identifier 'FLT_MAX'}} c23-error{{undeclared identifier 'FLT_MAX'}} \ + c99-modules-error{{undeclared identifier 'FLT_MAX'}} c23-modules-error{{undeclared identifier 'FLT_MAX'}} + +#define __need_infinity_nan +#include <float.h> +float infinity1 = INFINITY; +float nan1 = NAN; +float max1 = FLT_MAX; // c99-error{{undeclared identifier}} c23-error{{undeclared identifier}} \ + c99-modules-error{{undeclared identifier}} c23-modules-error{{undeclared identifier}} + +#include <float.h> +float infinity2 = INFINITY; +float nan2 = NAN; +float max2 = FLT_MAX; + +//--- floatneeds1.c +// c23-no-diagnostics +// c23-modules-no-diagnostics + +#include <float.h> +float infinity0 = INFINITY; // c99-error{{undeclared identifier}} c99-modules-error{{undeclared identifier}} +float nan0 = NAN; // c99-error{{undeclared identifier}} c99-modules-error{{undeclared identifier}} +float max0 = FLT_MAX; diff --git a/clang/test/Modules/explicit-build-cwd.c b/clang/test/Modules/explicit-build-cwd.c new file mode 100644 index 0000000..af8b743 --- /dev/null +++ b/clang/test/Modules/explicit-build-cwd.c @@ -0,0 +1,17 @@ +// This test checks that explicitly building the same module from different +// working directories results in the same PCM contents. + +// RUN: rm -rf %t +// RUN: split-file %s %t +// RUN: mkdir %t/one +// RUN: mkdir %t/two + +//--- module.modulemap +module M { header "M.h" } + +//--- M.h + +// RUN: cd %t/one && %clang_cc1 -fmodules -emit-module %t/module.modulemap -fmodule-name=M -o %t/M_one.pcm +// RUN: cd %t/two && %clang_cc1 -fmodules -emit-module %t/module.modulemap -fmodule-name=M -o %t/M_two.pcm + +// RUN: diff %t/M_one.pcm %t/M_two.pcm diff --git a/clang/test/Modules/relative-resource-dir.m b/clang/test/Modules/relative-resource-dir.m index 96f2d8e..1183184 100644 --- a/clang/test/Modules/relative-resource-dir.m +++ b/clang/test/Modules/relative-resource-dir.m @@ -8,5 +8,6 @@ // RUN: -fimplicit-module-maps -fmodules-cache-path=%t.mcp \ // RUN: -fbuiltin-headers-in-system-modules \ // RUN: -resource-dir resource-dir \ +// RUN: -internal-isystem resource-dir/include \ // RUN: -emit-module %S/Inputs/builtin-headers/module.modulemap \ // RUN: -fmodule-name=ModuleWithBuiltinHeader -o %t.pcm diff --git a/clang/test/Preprocessor/aarch64-target-features.c b/clang/test/Preprocessor/aarch64-target-features.c index d720120..4dd243e 100644 --- a/clang/test/Preprocessor/aarch64-target-features.c +++ b/clang/test/Preprocessor/aarch64-target-features.c @@ -215,6 +215,7 @@ // RUN: %clang -target aarch64-none-linux-gnu -march=armv9.4-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s // RUN: %clang -target aarch64-none-linux-gnu -march=armv9.5-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s // RUN: %clang -target aarch64-none-linux-gnu -march=armv9.6-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s +// RUN: %clang -target aarch64-none-linux-gnu -march=armv9.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s // RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve2 -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s // CHECK-SVE2: __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1 // CHECK-SVE2: __ARM_FEATURE_FP16_VECTOR_ARITHMETIC 1 @@ -691,6 +692,7 @@ // RUN: %clang -target aarch64-none-elf -march=armv9.4-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s // RUN: %clang -target aarch64-none-elf -march=armv9.5-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s // RUN: %clang -target aarch64-none-elf -march=armv9.6-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s +// RUN: %clang -target aarch64-none-elf -march=armv9.7-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s // CHECK-V81-OR-LATER: __ARM_FEATURE_ATOMICS 1 // CHECK-V85-OR-LATER: __ARM_FEATURE_BTI 1 // CHECK-V83-OR-LATER: __ARM_FEATURE_COMPLEX 1 diff --git a/clang/test/Preprocessor/arm-target-features.c b/clang/test/Preprocessor/arm-target-features.c index fc37beb..689cd81 100644 --- a/clang/test/Preprocessor/arm-target-features.c +++ b/clang/test/Preprocessor/arm-target-features.c @@ -934,6 +934,11 @@ // CHECK-V96A: #define __ARM_ARCH_9_6A__ 1 // CHECK-V96A: #define __ARM_ARCH_PROFILE 'A' +// RUN: %clang -target armv9.7a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V97A %s +// CHECK-V97A: #define __ARM_ARCH 9 +// CHECK-V97A: #define __ARM_ARCH_9_7A__ 1 +// CHECK-V97A: #define __ARM_ARCH_PROFILE 'A' + // RUN: %clang -target arm-none-none-eabi -march=armv7-m -mfpu=softvfp -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SOFTVFP %s // CHECK-SOFTVFP-NOT: #define __ARM_FP 0x diff --git a/clang/test/Preprocessor/cxx_oper_comma.cpp b/clang/test/Preprocessor/cxx_oper_comma.cpp new file mode 100644 index 0000000..5db803a --- /dev/null +++ b/clang/test/Preprocessor/cxx_oper_comma.cpp @@ -0,0 +1,45 @@ +// RUN: %clang_cc1 -E -pedantic-errors %s -verify -std=c++98 +// RUN: %clang_cc1 -E -pedantic-errors %s -verify -std=c++11 +// RUN: %clang_cc1 -E -pedantic-errors %s -verify -std=c++14 +// RUN: %clang_cc1 -E -pedantic-errors %s -verify -std=c++17 +// RUN: %clang_cc1 -E -pedantic-errors %s -verify -std=c++20 +// RUN: %clang_cc1 -E -pedantic-errors %s -verify=expected,since-cxx23 -std=c++23 -Wno-c23-extensions +// RUN: %clang_cc1 -E -pedantic-errors %s -verify=expected,since-cxx23 -std=c++2c -Wno-c23-extensions + +// Test 1: Top-level comma +// expected-error@+1 {{expected end of line in preprocessor expression}} +#if 1, 2 +#endif + +// Test 2: Comma in conditional expression(CWG3017) +// Per CWG 3017, this exact case highlights the specification gap +// where C++ lacks explicit prohibition of comma operators in #if +// expected-error@+1 {{comma operator in operand of #if}} +#if 1 ? 1, 0 : 3 +#endif + +// Test 3: Parenthesized comma +// expected-error@+1 {{comma operator in operand of #if}} +#if (1, 2) +#endif + +// Test 4: Multiple commas +// expected-error@+1 {{expected end of line in preprocessor expression}} +#if 1, 2, 3 +#endif + +// Test 5: Comma in #elif +#if 0 +#elif (1, 2) // expected-error {{comma operator in operand of #if}} +#endif + +// Test 6: Leading comma (syntax error) +// expected-error@+1 {{invalid token at start of a preprocessor expression}} +#if , +#endif + +// Test 7: Comma in #embed limit parameter (C++23+) +#if __cplusplus >= 202302L +// since-cxx23-error@+1 {{expected ')'}} +#embed "jk.txt" limit(1, 2) +#endif diff --git a/clang/test/SemaCXX/alloc-token.cpp b/clang/test/SemaCXX/alloc-token.cpp new file mode 100644 index 0000000..be7acb7 --- /dev/null +++ b/clang/test/SemaCXX/alloc-token.cpp @@ -0,0 +1,79 @@ +// RUN: %clang_cc1 -triple x86_64-linux-gnu -std=c++23 -fsyntax-only -verify %s +// RUN: %clang_cc1 -triple x86_64-linux-gnu -std=c++23 -fsyntax-only -verify %s -fexperimental-new-constant-interpreter +// RUN: %clang_cc1 -triple x86_64-linux-gnu -std=c++23 -fsyntax-only -verify %s -falloc-token-mode=typehash -DMODE_TYPEHASH +// RUN: %clang_cc1 -triple x86_64-linux-gnu -std=c++23 -fsyntax-only -verify %s -falloc-token-max=2 -DTOKEN_MAX=2 + +#if !__has_builtin(__builtin_infer_alloc_token) +#error "missing __builtin_infer_alloc_token" +#endif + +struct NoPtr { + int x; + long y; +}; + +struct WithPtr { + int a; + char *buf; +}; + +// Check specific known values; these are guaranteed to be stable. +#ifdef MODE_TYPEHASH +static_assert(__builtin_infer_alloc_token(sizeof(int)) == 2689373973731826898ULL); +static_assert(__builtin_infer_alloc_token(sizeof(char*)) == 2250492667400517147ULL); +static_assert(__builtin_infer_alloc_token(sizeof(NoPtr)) == 7465259095297095368ULL); +static_assert(__builtin_infer_alloc_token(sizeof(WithPtr)) == 11898882936532569145ULL); +#elif defined(TOKEN_MAX) +# if TOKEN_MAX == 2 +static_assert(__builtin_infer_alloc_token(sizeof(int)) == 0); +static_assert(__builtin_infer_alloc_token(sizeof(char*)) == 1); +static_assert(__builtin_infer_alloc_token(sizeof(NoPtr)) == 0); +static_assert(__builtin_infer_alloc_token(sizeof(WithPtr)) == 1); +# else +# error "unhandled TOKEN_MAX case" +# endif +#else +static_assert(__builtin_infer_alloc_token(sizeof(int)) == 2689373973731826898ULL); +static_assert(__builtin_infer_alloc_token(sizeof(char*)) == 11473864704255292954ULL); +static_assert(__builtin_infer_alloc_token(sizeof(NoPtr)) == 7465259095297095368ULL); +static_assert(__builtin_infer_alloc_token(sizeof(WithPtr)) == 11898882936532569145ULL); +#endif + +// Template function. +template <typename T> +constexpr unsigned long get_token() { + return __builtin_infer_alloc_token(sizeof(T)); +} +static_assert(__builtin_infer_alloc_token(sizeof(int)) == get_token<int>()); + +// Test complex expressions. +static_assert(__builtin_constant_p(__builtin_infer_alloc_token(sizeof(int)))); +static_assert(__builtin_infer_alloc_token(sizeof(NoPtr) * 2, 1) == get_token<NoPtr>()); +static_assert(__builtin_infer_alloc_token(1, 4 + sizeof(NoPtr)) == get_token<NoPtr>()); +static_assert(__builtin_infer_alloc_token(sizeof(NoPtr) << 8) == get_token<NoPtr>()); + +// Test usable as a template param. +template <unsigned long ID, typename T> +struct token_for_type { + static_assert(ID == get_token<T>()); + static constexpr unsigned long value = ID; +}; +static_assert(token_for_type<__builtin_infer_alloc_token(sizeof(int)), int>::value == get_token<int>()); + +template <typename T = void> +void template_test() { + __builtin_infer_alloc_token(T()); // no error if not instantiated +} + +template <typename T> +void negative_template_test() { + __builtin_infer_alloc_token(T()); // expected-error {{argument may not have 'void' type}} +} + +void negative_tests() { + __builtin_infer_alloc_token(); // expected-error {{too few arguments to function call}} + __builtin_infer_alloc_token((void)0); // expected-error {{argument may not have 'void' type}} + negative_template_test<void>(); // expected-note {{in instantiation of function template specialization 'negative_template_test<void>' requested here}} + constexpr auto inference_fail = __builtin_infer_alloc_token(123); // expected-error {{must be initialized by a constant expression}} \ + // expected-note {{could not infer allocation type for __builtin_infer_alloc_token}} +} diff --git a/clang/test/SemaCXX/ptrauth-nested-incomplete-types.cpp b/clang/test/SemaCXX/ptrauth-nested-incomplete-types.cpp new file mode 100644 index 0000000..8fad2fb --- /dev/null +++ b/clang/test/SemaCXX/ptrauth-nested-incomplete-types.cpp @@ -0,0 +1,46 @@ +// RUN: %clang_cc1 -fptrauth-intrinsics -fsyntax-only -ferror-limit 1 -verify -std=c++26 %s +// RUN: %clang_cc1 -fptrauth-intrinsics -fsyntax-only -ferror-limit 1 -verify -std=c++03 %s +// RUN: %clang_cc1 -fsyntax-only -ferror-limit 1 -verify -std=c++03 %s + +/// Force two errors so we hit the error limit leading to skip of template instantiation +# "" // expected-error {{invalid preprocessing directive}} +# "" +// expected-error@* {{too many errors emitted}} + +template <typename> +struct a {}; +struct test_polymorphic { + virtual ~test_polymorphic(); + a<int> field; +}; +static_assert(__is_trivially_relocatable(test_polymorphic)); + +struct test_struct { + test_struct(int) {} + void test_instantiate() { + test_struct d(0); + } + void test_type_trait_query() { + __is_trivially_relocatable(test_struct); + } + a<int> e; +}; + +struct test_struct2 { + test_struct member; + void test() { + test_struct2 t{.member = {0}}; + } +}; + +struct test_subclass : test_struct { + test_subclass() : test_struct(0) { + } + + void test_subclass_instantiation() { + test_subclass subclass{}; + } + void test_subclass_type_trait_query() { + __is_trivially_relocatable(test_subclass); + } +}; diff --git a/clang/test/SemaHLSL/Semantics/entry_parameter.hlsl b/clang/test/SemaHLSL/Semantics/entry_parameter.hlsl index 393d730..bcc94f0 100644 --- a/clang/test/SemaHLSL/Semantics/entry_parameter.hlsl +++ b/clang/test/SemaHLSL/Semantics/entry_parameter.hlsl @@ -11,4 +11,9 @@ void CSMain(int GI : SV_GroupIndex, uint ID : SV_DispatchThreadID, uint GID : SV // CHECK-NEXT: HLSLSV_GroupIDAttr // CHECK-NEXT: ParmVarDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:96 GThreadID 'uint' // CHECK-NEXT: HLSLSV_GroupThreadIDAttr + +// CHECK: HLSLSV_GroupIndexAttr 0x{{[0-9a-fA-F]+}} <{{.*}}> ParmVar 0x{{[0-9a-fA-F]+}} 'GI' 'int' 0 +// CHECK-NEXT: HLSLSV_DispatchThreadIDAttr 0x{{[0-9a-fA-F]+}} <{{.*}}> ParmVar 0x{{[0-9a-fA-F]+}} 'ID' 'uint':'unsigned int' 0 +// CHECK-NEXT: HLSLSV_GroupIDAttr 0x{{[0-9a-fA-F]+}} <{{.*}}> ParmVar 0x{{[0-9a-fA-F]+}} 'GID' 'uint':'unsigned int' 0 +// CHECK-NEXT: HLSLSV_GroupThreadIDAttr 0x{{[0-9a-fA-F]+}} <{{.*}}> ParmVar 0x{{[0-9a-fA-F]+}} 'GThreadID' 'uint':'unsigned int' 0 } diff --git a/clang/test/SemaHLSL/Semantics/position.ps.hlsl b/clang/test/SemaHLSL/Semantics/position.ps.hlsl index 32bc5f5..27a8e4a 100644 --- a/clang/test/SemaHLSL/Semantics/position.ps.hlsl +++ b/clang/test/SemaHLSL/Semantics/position.ps.hlsl @@ -1,7 +1,10 @@ // RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-pixel -x hlsl -finclude-default-header -o - %s -ast-dump | FileCheck %s -float4 main(float4 a : SV_Position) { +// FIXME(Keenuts): add mandatory output semantic once those are implemented. +float4 main(float4 a : SV_Position2) { // CHECK: FunctionDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> line:[[@LINE-1]]:8 main 'float4 (float4)' // CHECK-NEXT: ParmVarDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:20 a 'float4':'vector<float, 4>' // CHECK-NEXT: HLSLSV_PositionAttr 0x{{[0-9a-fA-F]+}} <{{.*}}> + +// CHECK: HLSLSV_PositionAttr 0x{{[0-9a-fA-F]+}} <{{.*}}> ParmVar 0x{{[0-9a-fA-F]+}} 'a' 'float4':'vector<float, 4>' 2 SemanticExplicitIndex } diff --git a/clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl b/clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl new file mode 100644 index 0000000..9f57231 --- /dev/null +++ b/clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl @@ -0,0 +1,19 @@ +// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-pixel -x hlsl -finclude-default-header -o - %s -ast-dump | FileCheck %s + +struct S { + float4 f0 : SV_Position; +// CHECK: FieldDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:10 f0 'float4':'vector<float, 4>' +// CHECK: HLSLSV_PositionAttr 0x{{[0-9a-fA-F]+}} <col:15> <<<NULL>>> 0 + float4 f1 : SV_Position3; +// CHECK: FieldDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:10 f1 'float4':'vector<float, 4>' +// CHECK: HLSLSV_PositionAttr 0x{{[0-9a-fA-F]+}} <col:15> <<<NULL>>> 3 SemanticExplicitIndex +}; + +// FIXME(Keenuts): add mandatory output semantic once those are implemented. +float4 main(S s) { +// CHECK: FunctionDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> line:[[@LINE-1]]:8 main 'float4 (S)' +// CHECK-NEXT: ParmVarDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:15 s 'S' + +// CHECK: HLSLSV_PositionAttr 0x{{[0-9a-fA-F]+}} <{{.*}}> Field 0x{{[0-9a-fA-F]+}} 'f0' 'float4':'vector<float, 4>' 0 +// CHECK: HLSLSV_PositionAttr 0x{{[0-9a-fA-F]+}} <{{.*}}> Field 0x{{[0-9a-fA-F]+}} 'f1' 'float4':'vector<float, 4>' 3 SemanticExplicitIndex +} diff --git a/clang/test/SemaHLSL/Semantics/struct_input.hlsl b/clang/test/SemaHLSL/Semantics/struct_input.hlsl new file mode 100644 index 0000000..66cab95 --- /dev/null +++ b/clang/test/SemaHLSL/Semantics/struct_input.hlsl @@ -0,0 +1,19 @@ +// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-library -x hlsl -finclude-default-header -o - %s -verify + +struct S { + float4 f0 : SV_Position; +// expected-error@+2 {{semantic annotations must be present for all parameters of an entry function or patch constant function}} +// expected-note@+1 {{'f1' used here}} + float4 f1; +}; + +[shader("pixel")] +// expected-note@+1 {{'s' declared here}} +void main(S s) { +} + +[shader("pixel")] +// expected-error@+2 {{semantic annotations must be present for all parameters of an entry function or patch constant function}} +// expected-note@+1 {{'f' declared here}} +void main2(float4 p : SV_POSITION, float4 f) +{ } diff --git a/clang/test/SemaOpenMP/openmp-begin-declare-variant_template.cpp b/clang/test/SemaOpenMP/openmp-begin-declare-variant_template.cpp new file mode 100644 index 0000000..ded8f58 --- /dev/null +++ b/clang/test/SemaOpenMP/openmp-begin-declare-variant_template.cpp @@ -0,0 +1,12 @@ +// RUN: %clang_cc1 -triple x86_64 -fopenmp -verify %s + +// FIXME: Is this supposed to work? + +#pragma omp begin declare variant match(implementation={extension(allow_templates)}) +template <class T> void f(T) {} +// expected-note@-1 {{explicit instantiation refers here}} +#pragma end +template <int> struct A {}; +template <bool B> A<B> f() = delete; +template void f<float>(float); +// expected-error@-1 {{explicit instantiation of undefined function template 'f'}} |