diff options
Diffstat (limited to 'clang/lib')
41 files changed, 747 insertions, 188 deletions
diff --git a/clang/lib/AST/ByteCode/Floating.h b/clang/lib/AST/ByteCode/Floating.h index 659892e..cc918dc 100644 --- a/clang/lib/AST/ByteCode/Floating.h +++ b/clang/lib/AST/ByteCode/Floating.h @@ -45,7 +45,8 @@ private: if (singleWord()) return APFloat(getSemantics(), APInt(BitWidth, Val)); unsigned NumWords = numWords(); - return APFloat(getSemantics(), APInt(BitWidth, NumWords, Memory)); + return APFloat(getSemantics(), + APInt(BitWidth, llvm::ArrayRef(Memory, NumWords))); } public: diff --git a/clang/lib/AST/ByteCode/IntegralAP.h b/clang/lib/AST/ByteCode/IntegralAP.h index 6683db9..b11e6ee 100644 --- a/clang/lib/AST/ByteCode/IntegralAP.h +++ b/clang/lib/AST/ByteCode/IntegralAP.h @@ -63,7 +63,7 @@ public: if (singleWord()) return APInt(BitWidth, Val, Signed); unsigned NumWords = llvm::APInt::getNumWords(BitWidth); - return llvm::APInt(BitWidth, NumWords, Memory); + return llvm::APInt(BitWidth, llvm::ArrayRef(Memory, NumWords)); } public: diff --git a/clang/lib/AST/CommentSema.cpp b/clang/lib/AST/CommentSema.cpp index 27ff5ab..d5ba240 100644 --- a/clang/lib/AST/CommentSema.cpp +++ b/clang/lib/AST/CommentSema.cpp @@ -225,7 +225,7 @@ static ParamCommandPassDirection getParamPassDirection(StringRef Arg) { return llvm::StringSwitch<ParamCommandPassDirection>(Arg) .Case("[in]", ParamCommandPassDirection::In) .Case("[out]", ParamCommandPassDirection::Out) - .Cases("[in,out]", "[out,in]", ParamCommandPassDirection::InOut) + .Cases({"[in,out]", "[out,in]"}, ParamCommandPassDirection::InOut) .Default(static_cast<ParamCommandPassDirection>(-1)); } diff --git a/clang/lib/Analysis/ExprMutationAnalyzer.cpp b/clang/lib/Analysis/ExprMutationAnalyzer.cpp index 75b17c54..54c30c0 100644 --- a/clang/lib/Analysis/ExprMutationAnalyzer.cpp +++ b/clang/lib/Analysis/ExprMutationAnalyzer.cpp @@ -746,11 +746,14 @@ ExprMutationAnalyzer::Analyzer::findPointeeMemberMutation(const Expr *Exp) { Stm, Context)); if (MemberCallExpr) return MemberCallExpr; - const auto Matches = - match(stmt(forEachDescendant( - memberExpr(hasObjectExpression(canResolveToExprPointee(Exp))) - .bind(NodeID<Expr>::value))), - Stm, Context); + const auto Matches = match( + stmt(forEachDescendant( + expr(anyOf(memberExpr( + hasObjectExpression(canResolveToExprPointee(Exp))), + binaryOperator(hasOperatorName("->*"), + hasLHS(canResolveToExprPointee(Exp))))) + .bind(NodeID<Expr>::value))), + Stm, Context); return findExprMutation(Matches); } diff --git a/clang/lib/Basic/SourceManager.cpp b/clang/lib/Basic/SourceManager.cpp index 938c648..97aa0f2 100644 --- a/clang/lib/Basic/SourceManager.cpp +++ b/clang/lib/Basic/SourceManager.cpp @@ -907,19 +907,23 @@ getExpansionLocSlowCase(SourceLocation Loc) const { SourceLocation SourceManager::getSpellingLocSlowCase(SourceLocation Loc) const { do { - FileIDAndOffset LocInfo = getDecomposedLoc(Loc); - Loc = getSLocEntry(LocInfo.first).getExpansion().getSpellingLoc(); - Loc = Loc.getLocWithOffset(LocInfo.second); + const SLocEntry &Entry = getSLocEntry(getFileID(Loc)); + Loc = Entry.getExpansion().getSpellingLoc().getLocWithOffset( + Loc.getOffset() - Entry.getOffset()); } while (!Loc.isFileID()); return Loc; } SourceLocation SourceManager::getFileLocSlowCase(SourceLocation Loc) const { do { - if (isMacroArgExpansion(Loc)) - Loc = getImmediateSpellingLoc(Loc); - else - Loc = getImmediateExpansionRange(Loc).getBegin(); + const SLocEntry &Entry = getSLocEntry(getFileID(Loc)); + const ExpansionInfo &ExpInfo = Entry.getExpansion(); + if (ExpInfo.isMacroArgExpansion()) { + Loc = ExpInfo.getSpellingLoc().getLocWithOffset(Loc.getOffset() - + Entry.getOffset()); + } else { + Loc = ExpInfo.getExpansionLocStart(); + } } while (!Loc.isFileID()); return Loc; } diff --git a/clang/lib/Basic/Targets/AVR.cpp b/clang/lib/Basic/Targets/AVR.cpp index 2673669..90b4ac1 100644 --- a/clang/lib/Basic/Targets/AVR.cpp +++ b/clang/lib/Basic/Targets/AVR.cpp @@ -30,13 +30,13 @@ struct LLVM_LIBRARY_VISIBILITY MCUInfo { // NOTE: This list has been synchronized with gcc-avr 5.4.0 and avr-libc 2.0.0. static MCUInfo AVRMcus[] = { - {"avr1", NULL, "1", 0}, + {"avr1", nullptr, "1", 0}, {"at90s1200", "__AVR_AT90S1200__", "1", 0}, {"attiny11", "__AVR_ATtiny11__", "1", 0}, {"attiny12", "__AVR_ATtiny12__", "1", 0}, {"attiny15", "__AVR_ATtiny15__", "1", 0}, {"attiny28", "__AVR_ATtiny28__", "1", 0}, - {"avr2", NULL, "2", 1}, + {"avr2", nullptr, "2", 1}, {"at90s2313", "__AVR_AT90S2313__", "2", 1}, {"at90s2323", "__AVR_AT90S2323__", "2", 1}, {"at90s2333", "__AVR_AT90S2333__", "2", 1}, @@ -50,7 +50,7 @@ static MCUInfo AVRMcus[] = { {"at90s8515", "__AVR_AT90S8515__", "2", 1}, {"at90c8534", "__AVR_AT90c8534__", "2", 1}, {"at90s8535", "__AVR_AT90S8535__", "2", 1}, - {"avr25", NULL, "25", 1}, + {"avr25", nullptr, "25", 1}, {"ata5272", "__AVR_ATA5272__", "25", 1}, {"ata6616c", "__AVR_ATA6616c__", "25", 1}, {"attiny13", "__AVR_ATtiny13__", "25", 1}, @@ -80,13 +80,13 @@ static MCUInfo AVRMcus[] = { {"attiny48", "__AVR_ATtiny48__", "25", 1}, {"attiny88", "__AVR_ATtiny88__", "25", 1}, {"attiny828", "__AVR_ATtiny828__", "25", 1}, - {"avr3", NULL, "3", 1}, + {"avr3", nullptr, "3", 1}, {"at43usb355", "__AVR_AT43USB355__", "3", 1}, {"at76c711", "__AVR_AT76C711__", "3", 1}, - {"avr31", NULL, "31", 1}, + {"avr31", nullptr, "31", 1}, {"atmega103", "__AVR_ATmega103__", "31", 1}, {"at43usb320", "__AVR_AT43USB320__", "31", 1}, - {"avr35", NULL, "35", 1}, + {"avr35", nullptr, "35", 1}, {"attiny167", "__AVR_ATtiny167__", "35", 1}, {"at90usb82", "__AVR_AT90USB82__", "35", 1}, {"at90usb162", "__AVR_AT90USB162__", "35", 1}, @@ -97,7 +97,7 @@ static MCUInfo AVRMcus[] = { {"atmega16u2", "__AVR_ATmega16U2__", "35", 1}, {"atmega32u2", "__AVR_ATmega32U2__", "35", 1}, {"attiny1634", "__AVR_ATtiny1634__", "35", 1}, - {"avr4", NULL, "4", 1}, + {"avr4", nullptr, "4", 1}, {"atmega8", "__AVR_ATmega8__", "4", 1}, {"ata6289", "__AVR_ATA6289__", "4", 1}, {"atmega8a", "__AVR_ATmega8A__", "4", 1}, @@ -123,7 +123,7 @@ static MCUInfo AVRMcus[] = { {"at90pwm3", "__AVR_AT90PWM3__", "4", 1}, {"at90pwm3b", "__AVR_AT90PWM3B__", "4", 1}, {"at90pwm81", "__AVR_AT90PWM81__", "4", 1}, - {"avr5", NULL, "5", 1}, + {"avr5", nullptr, "5", 1}, {"ata5702m322", "__AVR_ATA5702M322__", "5", 1}, {"ata5782", "__AVR_ATA5782__", "5", 1}, {"ata5790", "__AVR_ATA5790__", "5", 1}, @@ -230,7 +230,7 @@ static MCUInfo AVRMcus[] = { {"at90scr100", "__AVR_AT90SCR100__", "5", 1}, {"at94k", "__AVR_AT94K__", "5", 1}, {"m3000", "__AVR_AT000__", "5", 1}, - {"avr51", NULL, "51", 2}, + {"avr51", nullptr, "51", 2}, {"atmega128", "__AVR_ATmega128__", "51", 2}, {"atmega128a", "__AVR_ATmega128A__", "51", 2}, {"atmega1280", "__AVR_ATmega1280__", "51", 2}, @@ -243,12 +243,12 @@ static MCUInfo AVRMcus[] = { {"at90can128", "__AVR_AT90CAN128__", "51", 2}, {"at90usb1286", "__AVR_AT90USB1286__", "51", 2}, {"at90usb1287", "__AVR_AT90USB1287__", "51", 2}, - {"avr6", NULL, "6", 4}, + {"avr6", nullptr, "6", 4}, {"atmega2560", "__AVR_ATmega2560__", "6", 4}, {"atmega2561", "__AVR_ATmega2561__", "6", 4}, {"atmega256rfr2", "__AVR_ATmega256RFR2__", "6", 4}, {"atmega2564rfr2", "__AVR_ATmega2564RFR2__", "6", 4}, - {"avrxmega2", NULL, "102", 1}, + {"avrxmega2", nullptr, "102", 1}, {"atxmega16a4", "__AVR_ATxmega16A4__", "102", 1}, {"atxmega16a4u", "__AVR_ATxmega16A4U__", "102", 1}, {"atxmega16c4", "__AVR_ATxmega16C4__", "102", 1}, @@ -262,7 +262,7 @@ static MCUInfo AVRMcus[] = { {"atxmega32e5", "__AVR_ATxmega32E5__", "102", 1}, {"atxmega16e5", "__AVR_ATxmega16E5__", "102", 1}, {"atxmega8e5", "__AVR_ATxmega8E5__", "102", 1}, - {"avrxmega4", NULL, "104", 1}, + {"avrxmega4", nullptr, "104", 1}, {"atxmega64a3", "__AVR_ATxmega64A3__", "104", 1}, {"atxmega64a3u", "__AVR_ATxmega64A3U__", "104", 1}, {"atxmega64a4u", "__AVR_ATxmega64A4U__", "104", 1}, @@ -271,10 +271,10 @@ static MCUInfo AVRMcus[] = { {"atxmega64c3", "__AVR_ATxmega64C3__", "104", 1}, {"atxmega64d3", "__AVR_ATxmega64D3__", "104", 1}, {"atxmega64d4", "__AVR_ATxmega64D4__", "104", 1}, - {"avrxmega5", NULL, "105", 1}, + {"avrxmega5", nullptr, "105", 1}, {"atxmega64a1", "__AVR_ATxmega64A1__", "105", 1}, {"atxmega64a1u", "__AVR_ATxmega64A1U__", "105", 1}, - {"avrxmega6", NULL, "106", 6}, + {"avrxmega6", nullptr, "106", 6}, {"atxmega128a3", "__AVR_ATxmega128A3__", "106", 2}, {"atxmega128a3u", "__AVR_ATxmega128A3U__", "106", 2}, {"atxmega128b1", "__AVR_ATxmega128B1__", "106", 2}, @@ -294,11 +294,11 @@ static MCUInfo AVRMcus[] = { {"atxmega256d3", "__AVR_ATxmega256D3__", "106", 4}, {"atxmega384c3", "__AVR_ATxmega384C3__", "106", 6}, {"atxmega384d3", "__AVR_ATxmega384D3__", "106", 6}, - {"avrxmega7", NULL, "107", 2}, + {"avrxmega7", nullptr, "107", 2}, {"atxmega128a1", "__AVR_ATxmega128A1__", "107", 2}, {"atxmega128a1u", "__AVR_ATxmega128A1U__", "107", 2}, {"atxmega128a4u", "__AVR_ATxmega128A4U__", "107", 2}, - {"avrtiny", NULL, "100", 0}, + {"avrtiny", nullptr, "100", 0}, {"attiny4", "__AVR_ATtiny4__", "100", 0}, {"attiny5", "__AVR_ATtiny5__", "100", 0}, {"attiny9", "__AVR_ATtiny9__", "100", 0}, @@ -307,7 +307,7 @@ static MCUInfo AVRMcus[] = { {"attiny40", "__AVR_ATtiny40__", "100", 0}, {"attiny102", "__AVR_ATtiny102__", "100", 0}, {"attiny104", "__AVR_ATtiny104__", "100", 0}, - {"avrxmega3", NULL, "103", 1}, + {"avrxmega3", nullptr, "103", 1}, {"attiny202", "__AVR_ATtiny202__", "103", 1}, {"attiny402", "__AVR_ATtiny402__", "103", 1}, {"attiny204", "__AVR_ATtiny204__", "103", 1}, diff --git a/clang/lib/Basic/Targets/NVPTX.cpp b/clang/lib/Basic/Targets/NVPTX.cpp index 9651c38..ec4e40b 100644 --- a/clang/lib/Basic/Targets/NVPTX.cpp +++ b/clang/lib/Basic/Targets/NVPTX.cpp @@ -171,7 +171,7 @@ ArrayRef<const char *> NVPTXTargetInfo::getGCCRegNames() const { bool NVPTXTargetInfo::hasFeature(StringRef Feature) const { return llvm::StringSwitch<bool>(Feature) - .Cases("ptx", "nvptx", true) + .Cases({"ptx", "nvptx"}, true) .Default(false); } diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h index d2eb9c5..d4ada2a 100644 --- a/clang/lib/Basic/Targets/PPC.h +++ b/clang/lib/Basic/Targets/PPC.h @@ -125,9 +125,8 @@ public: .Cases({"power3", "pwr3"}, ArchDefinePpcgr) .Cases({"power4", "pwr4"}, ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq) - .Cases("power5", "pwr5", - ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr | - ArchDefinePpcsq) + .Cases({"power5", "pwr5"}, ArchDefinePwr5 | ArchDefinePwr4 | + ArchDefinePpcgr | ArchDefinePpcsq) .Cases({"power5x", "pwr5x"}, ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq) @@ -166,7 +165,7 @@ public: ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7 | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq) - .Cases("8548", "e500", ArchDefineE500) + .Cases({"8548", "e500"}, ArchDefineE500) .Default(ArchDefineNone); } return CPUKnown; diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp index e35100f..d9b9e3b 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp @@ -211,6 +211,17 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID, assert(!cir::MissingFeatures::fastMathFlags()); return emitUnaryMaybeConstrainedFPBuiltin<cir::CosOp>(*this, *e); + case Builtin::BIceil: + case Builtin::BIceilf: + case Builtin::BIceill: + case Builtin::BI__builtin_ceil: + case Builtin::BI__builtin_ceilf: + case Builtin::BI__builtin_ceilf16: + case Builtin::BI__builtin_ceill: + case Builtin::BI__builtin_ceilf128: + assert(!cir::MissingFeatures::fastMathFlags()); + return emitUnaryMaybeConstrainedFPBuiltin<cir::CeilOp>(*this, *e); + case Builtin::BIfabs: case Builtin::BIfabsf: case Builtin::BIfabsl: diff --git a/clang/lib/CIR/CodeGen/CIRGenOpenACCClause.cpp b/clang/lib/CIR/CodeGen/CIRGenOpenACCClause.cpp index 5010137..527dfd2 100644 --- a/clang/lib/CIR/CodeGen/CIRGenOpenACCClause.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenOpenACCClause.cpp @@ -126,7 +126,7 @@ class OpenACCClauseCIREmitter final .CaseLower("default", mlir::acc::DeviceType::Default) .CaseLower("host", mlir::acc::DeviceType::Host) .CaseLower("multicore", mlir::acc::DeviceType::Multicore) - .CasesLower("nvidia", "acc_device_nvidia", + .CasesLower({"nvidia", "acc_device_nvidia"}, mlir::acc::DeviceType::Nvidia) .CaseLower("radeon", mlir::acc::DeviceType::Radeon); } diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp index 5a6193f..d941082 100644 --- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp +++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp @@ -1336,6 +1336,14 @@ mlir::LogicalResult CIRToLLVMATanOpLowering::matchAndRewrite( return mlir::success(); } +mlir::LogicalResult CIRToLLVMCeilOpLowering::matchAndRewrite( + cir::CeilOp op, OpAdaptor adaptor, + mlir::ConversionPatternRewriter &rewriter) const { + mlir::Type resTy = typeConverter->convertType(op.getType()); + rewriter.replaceOpWithNewOp<mlir::LLVM::FCeilOp>(op, resTy, adaptor.getSrc()); + return mlir::success(); +} + mlir::LogicalResult CIRToLLVMAllocaOpLowering::matchAndRewrite( cir::AllocaOp op, OpAdaptor adaptor, mlir::ConversionPatternRewriter &rewriter) const { diff --git a/clang/lib/CodeGen/BackendUtil.cpp b/clang/lib/CodeGen/BackendUtil.cpp index 3c31314..b967a26 100644 --- a/clang/lib/CodeGen/BackendUtil.cpp +++ b/clang/lib/CodeGen/BackendUtil.cpp @@ -313,7 +313,7 @@ getCodeModel(const CodeGenOptions &CodeGenOpts) { .Case("kernel", llvm::CodeModel::Kernel) .Case("medium", llvm::CodeModel::Medium) .Case("large", llvm::CodeModel::Large) - .Cases("default", "", ~1u) + .Cases({"default", ""}, ~1u) .Default(~0u); assert(CodeModel != ~0u && "invalid code model!"); if (CodeModel == ~1u) diff --git a/clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp b/clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp index 6da65b6..8a1cab3 100644 --- a/clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp +++ b/clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp @@ -375,28 +375,28 @@ static Value *MakeCpAsync(unsigned IntrinsicID, unsigned IntrinsicIDS, CGF.EmitScalarExpr(E->getArg(1))}); } -static Value *MakeHalfType(unsigned IntrinsicID, unsigned BuiltinID, - const CallExpr *E, CodeGenFunction &CGF) { +static bool EnsureNativeHalfSupport(unsigned BuiltinID, const CallExpr *E, + CodeGenFunction &CGF) { auto &C = CGF.CGM.getContext(); - if (!(C.getLangOpts().NativeHalfType || - !C.getTargetInfo().useFP16ConversionIntrinsics())) { + if (!C.getLangOpts().NativeHalfType && + C.getTargetInfo().useFP16ConversionIntrinsics()) { CGF.CGM.Error(E->getExprLoc(), C.BuiltinInfo.getQuotedName(BuiltinID) + " requires native half type support."); - return nullptr; + return false; } + return true; +} - if (BuiltinID == NVPTX::BI__nvvm_ldg_h || BuiltinID == NVPTX::BI__nvvm_ldg_h2) - return MakeLdg(CGF, E); - - if (IntrinsicID == Intrinsic::nvvm_ldu_global_f) - return MakeLdu(IntrinsicID, CGF, E); +static Value *MakeHalfType(Function *Intrinsic, unsigned BuiltinID, + const CallExpr *E, CodeGenFunction &CGF) { + if (!EnsureNativeHalfSupport(BuiltinID, E, CGF)) + return nullptr; SmallVector<Value *, 16> Args; - auto *F = CGF.CGM.getIntrinsic(IntrinsicID); - auto *FTy = F->getFunctionType(); + auto *FTy = Intrinsic->getFunctionType(); unsigned ICEArguments = 0; ASTContext::GetBuiltinTypeError Error; - C.GetBuiltinType(BuiltinID, Error, &ICEArguments); + CGF.CGM.getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); assert(Error == ASTContext::GE_None && "Should not codegen an error"); for (unsigned i = 0, e = E->getNumArgs(); i != e; ++i) { assert((ICEArguments & (1 << i)) == 0); @@ -407,8 +407,14 @@ static Value *MakeHalfType(unsigned IntrinsicID, unsigned BuiltinID, Args.push_back(ArgValue); } - return CGF.Builder.CreateCall(F, Args); + return CGF.Builder.CreateCall(Intrinsic, Args); } + +static Value *MakeHalfType(unsigned IntrinsicID, unsigned BuiltinID, + const CallExpr *E, CodeGenFunction &CGF) { + return MakeHalfType(CGF.CGM.getIntrinsic(IntrinsicID), BuiltinID, E, CGF); +} + } // namespace Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, @@ -913,9 +919,14 @@ Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, } // The following builtins require half type support case NVPTX::BI__nvvm_ex2_approx_f16: - return MakeHalfType(Intrinsic::nvvm_ex2_approx_f16, BuiltinID, E, *this); + return MakeHalfType( + CGM.getIntrinsic(Intrinsic::nvvm_ex2_approx, Builder.getHalfTy()), + BuiltinID, E, *this); case NVPTX::BI__nvvm_ex2_approx_f16x2: - return MakeHalfType(Intrinsic::nvvm_ex2_approx_f16x2, BuiltinID, E, *this); + return MakeHalfType( + CGM.getIntrinsic(Intrinsic::nvvm_ex2_approx, + FixedVectorType::get(Builder.getHalfTy(), 2)), + BuiltinID, E, *this); case NVPTX::BI__nvvm_ff2f16x2_rn: return MakeHalfType(Intrinsic::nvvm_ff2f16x2_rn, BuiltinID, E, *this); case NVPTX::BI__nvvm_ff2f16x2_rn_relu: @@ -1049,12 +1060,22 @@ Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, case NVPTX::BI__nvvm_fabs_d: return Builder.CreateUnaryIntrinsic(Intrinsic::fabs, EmitScalarExpr(E->getArg(0))); + case NVPTX::BI__nvvm_ex2_approx_d: + case NVPTX::BI__nvvm_ex2_approx_f: + return Builder.CreateUnaryIntrinsic(Intrinsic::nvvm_ex2_approx, + EmitScalarExpr(E->getArg(0))); + case NVPTX::BI__nvvm_ex2_approx_ftz_f: + return Builder.CreateUnaryIntrinsic(Intrinsic::nvvm_ex2_approx_ftz, + EmitScalarExpr(E->getArg(0))); case NVPTX::BI__nvvm_ldg_h: case NVPTX::BI__nvvm_ldg_h2: - return MakeHalfType(Intrinsic::not_intrinsic, BuiltinID, E, *this); + return EnsureNativeHalfSupport(BuiltinID, E, *this) ? MakeLdg(*this, E) + : nullptr; case NVPTX::BI__nvvm_ldu_h: case NVPTX::BI__nvvm_ldu_h2: - return MakeHalfType(Intrinsic::nvvm_ldu_global_f, BuiltinID, E, *this); + return EnsureNativeHalfSupport(BuiltinID, E, *this) + ? MakeLdu(Intrinsic::nvvm_ldu_global_f, *this, E) + : nullptr; case NVPTX::BI__nvvm_cp_async_ca_shared_global_4: return MakeCpAsync(Intrinsic::nvvm_cp_async_ca_shared_global_4, Intrinsic::nvvm_cp_async_ca_shared_global_4_s, *this, E, diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp index 71c5280..51618d1 100644 --- a/clang/lib/Driver/Driver.cpp +++ b/clang/lib/Driver/Driver.cpp @@ -2540,10 +2540,14 @@ bool Driver::HandleImmediateArgs(Compilation &C) { } if (C.getArgs().hasArg(options::OPT_print_runtime_dir)) { - if (std::optional<std::string> RuntimePath = TC.getRuntimePath()) - llvm::outs() << *RuntimePath << '\n'; - else - llvm::outs() << TC.getCompilerRTPath() << '\n'; + for (auto RuntimePath : + {TC.getRuntimePath(), std::make_optional(TC.getCompilerRTPath())}) { + if (RuntimePath && getVFS().exists(*RuntimePath)) { + llvm::outs() << *RuntimePath << '\n'; + return false; + } + } + llvm::outs() << "(runtime dir is not present)" << '\n'; return false; } diff --git a/clang/lib/Driver/ToolChains/Arch/M68k.cpp b/clang/lib/Driver/ToolChains/Arch/M68k.cpp index 1037c0e..708ec84 100644 --- a/clang/lib/Driver/ToolChains/Arch/M68k.cpp +++ b/clang/lib/Driver/ToolChains/Arch/M68k.cpp @@ -36,12 +36,12 @@ std::string m68k::getM68kTargetCPU(const ArgList &Args) { return "generic"; return llvm::StringSwitch<std::string>(CPUName) - .Cases("m68000", "68000", "M68000") - .Cases("m68010", "68010", "M68010") - .Cases("m68020", "68020", "M68020") - .Cases("m68030", "68030", "M68030") - .Cases("m68040", "68040", "M68040") - .Cases("m68060", "68060", "M68060") + .Cases({"m68000", "68000"}, "M68000") + .Cases({"m68010", "68010"}, "M68010") + .Cases({"m68020", "68020"}, "M68020") + .Cases({"m68030", "68030"}, "M68030") + .Cases({"m68040", "68040"}, "M68040") + .Cases({"m68060", "68060"}, "M68060") .Default(CPUName.str()); } // FIXME: Throw error when multiple sub-architecture flag exist diff --git a/clang/lib/Driver/ToolChains/Arch/Mips.cpp b/clang/lib/Driver/ToolChains/Arch/Mips.cpp index 6a6a4ee..8d7b85d 100644 --- a/clang/lib/Driver/ToolChains/Arch/Mips.cpp +++ b/clang/lib/Driver/ToolChains/Arch/Mips.cpp @@ -117,7 +117,7 @@ void mips::getMipsCPUAndABI(const ArgList &Args, const llvm::Triple &Triple, // Deduce CPU name from ABI name. CPUName = llvm::StringSwitch<const char *>(ABIName) .Case("o32", DefMips32CPU) - .Cases("n32", "n64", DefMips64CPU) + .Cases({"n32", "n64"}, DefMips64CPU) .Default(""); } @@ -467,7 +467,7 @@ bool mips::isNaN2008(const Driver &D, const ArgList &Args, // NaN2008 is the default for MIPS32r6/MIPS64r6. return llvm::StringSwitch<bool>(getCPUName(D, Args, Triple)) - .Cases("mips32r6", "mips64r6", true) + .Cases({"mips32r6", "mips64r6"}, true) .Default(false); } diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index d3ab6f1..30d3e52 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -7879,10 +7879,13 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, !TC.getTriple().isAndroid() && TC.useIntegratedAs())) CmdArgs.push_back("-faddrsig"); - if ((Triple.isOSBinFormatELF() || Triple.isOSBinFormatMachO()) && + const bool HasDefaultDwarf2CFIASM = + (Triple.isOSBinFormatELF() || Triple.isOSBinFormatMachO()) && (EH || UnwindTables || AsyncUnwindTables || - DebugInfoKind != llvm::codegenoptions::NoDebugInfo)) - CmdArgs.push_back("-D__GCC_HAVE_DWARF2_CFI_ASM=1"); + DebugInfoKind != llvm::codegenoptions::NoDebugInfo); + if (Args.hasFlag(options::OPT_fdwarf2_cfi_asm, + options::OPT_fno_dwarf2_cfi_asm, HasDefaultDwarf2CFIASM)) + CmdArgs.push_back("-fdwarf2-cfi-asm"); if (Arg *A = Args.getLastArg(options::OPT_fsymbol_partition_EQ)) { std::string Str = A->getAsString(Args); diff --git a/clang/lib/Driver/ToolChains/Darwin.cpp b/clang/lib/Driver/ToolChains/Darwin.cpp index cc5bcd1..2fb7652 100644 --- a/clang/lib/Driver/ToolChains/Darwin.cpp +++ b/clang/lib/Driver/ToolChains/Darwin.cpp @@ -1035,12 +1035,12 @@ static const char *ArmMachOArchName(StringRef Arch) { .Case("xscale", "xscale") .Case("armv4t", "armv4t") .Case("armv7", "armv7") - .Cases("armv7a", "armv7-a", "armv7") - .Cases("armv7r", "armv7-r", "armv7") - .Cases("armv7em", "armv7e-m", "armv7em") - .Cases("armv7k", "armv7-k", "armv7k") - .Cases("armv7m", "armv7-m", "armv7m") - .Cases("armv7s", "armv7-s", "armv7s") + .Cases({"armv7a", "armv7-a"}, "armv7") + .Cases({"armv7r", "armv7-r"}, "armv7") + .Cases({"armv7em", "armv7e-m"}, "armv7em") + .Cases({"armv7k", "armv7-k"}, "armv7k") + .Cases({"armv7m", "armv7-m"}, "armv7m") + .Cases({"armv7s", "armv7-s"}, "armv7s") .Default(nullptr); } diff --git a/clang/lib/Driver/ToolChains/Solaris.cpp b/clang/lib/Driver/ToolChains/Solaris.cpp index 02aa598..64c7d1c 100644 --- a/clang/lib/Driver/ToolChains/Solaris.cpp +++ b/clang/lib/Driver/ToolChains/Solaris.cpp @@ -346,7 +346,7 @@ SanitizerMask Solaris::getSupportedSanitizers() const { const char *Solaris::getDefaultLinker() const { // FIXME: Only handle Solaris ld and GNU ld here. return llvm::StringSwitch<const char *>(getDriver().getPreferredLinker()) - .Cases("bfd", "gld", "/usr/gnu/bin/ld") + .Cases({"bfd", "gld"}, "/usr/gnu/bin/ld") .Default("/usr/bin/ld"); } diff --git a/clang/lib/Format/FormatTokenLexer.cpp b/clang/lib/Format/FormatTokenLexer.cpp index ab32938..a9ea5ec 100644 --- a/clang/lib/Format/FormatTokenLexer.cpp +++ b/clang/lib/Format/FormatTokenLexer.cpp @@ -318,14 +318,21 @@ void FormatTokenLexer::tryMergePreviousTokens() { {tok::equal, tok::greater}, {tok::star, tok::greater}, {tok::pipeequal, tok::greater}, - {tok::pipe, tok::arrow}, - {tok::hash, tok::minus, tok::hash}, - {tok::hash, tok::equal, tok::hash}}, + {tok::pipe, tok::arrow}}, TT_BinaryOperator) || Tokens.back()->is(tok::arrow)) { Tokens.back()->ForcedPrecedence = prec::Comma; return; } + if (Tokens.size() >= 3 && + Tokens[Tokens.size() - 3]->is(Keywords.kw_verilogHash) && + Tokens[Tokens.size() - 2]->isOneOf(tok::minus, tok::equal) && + Tokens[Tokens.size() - 1]->is(Keywords.kw_verilogHash) && + tryMergeTokens(3, TT_BinaryOperator)) { + Tokens.back()->setFinalizedType(TT_BinaryOperator); + Tokens.back()->ForcedPrecedence = prec::Comma; + return; + } } else if (Style.isTableGen()) { // TableGen's Multi line string starts with [{ if (tryMergeTokens({tok::l_square, tok::l_brace}, diff --git a/clang/lib/Format/TokenAnnotator.cpp b/clang/lib/Format/TokenAnnotator.cpp index 8e227da..cb41756c 100644 --- a/clang/lib/Format/TokenAnnotator.cpp +++ b/clang/lib/Format/TokenAnnotator.cpp @@ -358,11 +358,11 @@ private: Contexts.back().IsExpression = false; } else if (OpeningParen.Previous && (OpeningParen.Previous->isOneOf( - tok::kw_static_assert, tok::kw_noexcept, tok::kw_explicit, - tok::kw_while, tok::l_paren, tok::comma, TT_CastRParen, + tok::kw_noexcept, tok::kw_explicit, tok::kw_while, + tok::l_paren, tok::comma, TT_CastRParen, TT_BinaryOperator) || OpeningParen.Previous->isIf())) { - // static_assert, if and while usually contain expressions. + // if and while usually contain expressions. Contexts.back().IsExpression = true; } else if (Style.isJavaScript() && OpeningParen.Previous && (OpeningParen.Previous->is(Keywords.kw_function) || @@ -454,6 +454,11 @@ private: if (StartsObjCSelector) OpeningParen.setType(TT_ObjCSelector); + const bool IsStaticAssert = + PrevNonComment && PrevNonComment->is(tok::kw_static_assert); + if (IsStaticAssert) + Contexts.back().InStaticAssertFirstArgument = true; + // MightBeFunctionType and ProbablyFunctionType are used for // function pointer and reference types as well as Objective-C // block types: @@ -583,8 +588,12 @@ private: } // When we discover a 'new', we set CanBeExpression to 'false' in order to // parse the type correctly. Reset that after a comma. - if (CurrentToken->is(tok::comma)) - Contexts.back().CanBeExpression = true; + if (CurrentToken->is(tok::comma)) { + if (IsStaticAssert) + Contexts.back().InStaticAssertFirstArgument = false; + else + Contexts.back().CanBeExpression = true; + } if (Style.isTableGen()) { if (CurrentToken->is(tok::comma)) { @@ -2144,6 +2153,7 @@ private: bool CaretFound = false; bool InCpp11AttributeSpecifier = false; bool InCSharpAttributeSpecifier = false; + bool InStaticAssertFirstArgument = false; bool VerilogAssignmentFound = false; // Whether the braces may mean concatenation instead of structure or array // literal. @@ -2440,7 +2450,8 @@ private: } else if (Current.isPointerOrReference()) { Current.setType(determineStarAmpUsage( Current, - Contexts.back().CanBeExpression && Contexts.back().IsExpression, + (Contexts.back().CanBeExpression && Contexts.back().IsExpression) || + Contexts.back().InStaticAssertFirstArgument, Contexts.back().ContextType == Context::TemplateArgument)); } else if (Current.isOneOf(tok::minus, tok::plus, tok::caret) || (Style.isVerilog() && Current.is(tok::pipe))) { diff --git a/clang/lib/Format/WhitespaceManager.cpp b/clang/lib/Format/WhitespaceManager.cpp index f24b8ab..406c77c 100644 --- a/clang/lib/Format/WhitespaceManager.cpp +++ b/clang/lib/Format/WhitespaceManager.cpp @@ -591,7 +591,8 @@ static unsigned AlignTokens(const FormatStyle &Style, F &&Matches, CurrentChangeWidthRight = CurrentChange.TokenLength; const FormatToken *MatchingParenToEncounter = nullptr; for (unsigned J = I + 1; - J != E && (Changes[J].NewlinesBefore == 0 || MatchingParenToEncounter); + J != E && (Changes[J].NewlinesBefore == 0 || + MatchingParenToEncounter || Changes[J].IsAligned); ++J) { const auto &Change = Changes[J]; const auto *Tok = Change.Tok; diff --git a/clang/lib/Frontend/ASTUnit.cpp b/clang/lib/Frontend/ASTUnit.cpp index 6cc7094..1169acb 100644 --- a/clang/lib/Frontend/ASTUnit.cpp +++ b/clang/lib/Frontend/ASTUnit.cpp @@ -518,14 +518,14 @@ class ASTInfoCollector : public ASTReaderListener { LangOptions &LangOpts; CodeGenOptions &CodeGenOpts; TargetOptions &TargetOpts; - unsigned &Counter; + uint32_t &Counter; public: ASTInfoCollector(HeaderSearchOptions &HSOpts, std::string &SpecificModuleCachePath, PreprocessorOptions &PPOpts, LangOptions &LangOpts, CodeGenOptions &CodeGenOpts, TargetOptions &TargetOpts, - unsigned &Counter) + uint32_t &Counter) : HSOpts(HSOpts), SpecificModuleCachePath(SpecificModuleCachePath), PPOpts(PPOpts), LangOpts(LangOpts), CodeGenOpts(CodeGenOpts), TargetOpts(TargetOpts), Counter(Counter) {} @@ -577,7 +577,7 @@ public: } void ReadCounter(const serialization::ModuleFile &M, - unsigned NewCounter) override { + uint32_t NewCounter) override { Counter = NewCounter; } }; diff --git a/clang/lib/Frontend/CompilerInvocation.cpp b/clang/lib/Frontend/CompilerInvocation.cpp index 1951e7f..be7c1d3 100644 --- a/clang/lib/Frontend/CompilerInvocation.cpp +++ b/clang/lib/Frontend/CompilerInvocation.cpp @@ -4049,18 +4049,18 @@ bool CompilerInvocation::ParseLangArgs(LangOptions &Opts, ArgList &Args, // -cl-std only applies for OpenCL language standards. // Override the -std option in this case. if (const Arg *A = Args.getLastArg(OPT_cl_std_EQ)) { - LangStandard::Kind OpenCLLangStd - = llvm::StringSwitch<LangStandard::Kind>(A->getValue()) - .Cases("cl", "CL", LangStandard::lang_opencl10) - .Cases("cl1.0", "CL1.0", LangStandard::lang_opencl10) - .Cases("cl1.1", "CL1.1", LangStandard::lang_opencl11) - .Cases("cl1.2", "CL1.2", LangStandard::lang_opencl12) - .Cases("cl2.0", "CL2.0", LangStandard::lang_opencl20) - .Cases("cl3.0", "CL3.0", LangStandard::lang_opencl30) - .Cases("clc++", "CLC++", LangStandard::lang_openclcpp10) - .Cases("clc++1.0", "CLC++1.0", LangStandard::lang_openclcpp10) - .Cases("clc++2021", "CLC++2021", LangStandard::lang_openclcpp2021) - .Default(LangStandard::lang_unspecified); + LangStandard::Kind OpenCLLangStd = + llvm::StringSwitch<LangStandard::Kind>(A->getValue()) + .Cases({"cl", "CL"}, LangStandard::lang_opencl10) + .Cases({"cl1.0", "CL1.0"}, LangStandard::lang_opencl10) + .Cases({"cl1.1", "CL1.1"}, LangStandard::lang_opencl11) + .Cases({"cl1.2", "CL1.2"}, LangStandard::lang_opencl12) + .Cases({"cl2.0", "CL2.0"}, LangStandard::lang_opencl20) + .Cases({"cl3.0", "CL3.0"}, LangStandard::lang_opencl30) + .Cases({"clc++", "CLC++"}, LangStandard::lang_openclcpp10) + .Cases({"clc++1.0", "CLC++1.0"}, LangStandard::lang_openclcpp10) + .Cases({"clc++2021", "CLC++2021"}, LangStandard::lang_openclcpp2021) + .Default(LangStandard::lang_unspecified); if (OpenCLLangStd == LangStandard::lang_unspecified) { Diags.Report(diag::err_drv_invalid_value) diff --git a/clang/lib/Frontend/InitPreprocessor.cpp b/clang/lib/Frontend/InitPreprocessor.cpp index 8602be1..b88d9f8 100644 --- a/clang/lib/Frontend/InitPreprocessor.cpp +++ b/clang/lib/Frontend/InitPreprocessor.cpp @@ -1516,6 +1516,9 @@ static void InitializePredefinedMacros(const TargetInfo &TI, if (LangOpts.PointerAuthIntrinsics) Builder.defineMacro("__PTRAUTH__"); + if (CGOpts.Dwarf2CFIAsm) + Builder.defineMacro("__GCC_HAVE_DWARF2_CFI_ASM"); + // Get other target #defines. TI.getTargetDefines(LangOpts, Builder); } @@ -1542,6 +1545,9 @@ void clang::InitializePreprocessor(Preprocessor &PP, llvm::raw_string_ostream Predefines(PredefineBuffer); MacroBuilder Builder(Predefines); + // Ensure that the initial value of __COUNTER__ is hooked up. + PP.setCounterValue(InitOpts.InitialCounterValue); + // Emit line markers for various builtin sections of the file. The 3 here // marks <built-in> as being a system header, which suppresses warnings when // the same macro is defined multiple times. diff --git a/clang/lib/Frontend/TextDiagnostic.cpp b/clang/lib/Frontend/TextDiagnostic.cpp index aea3e72..1003218 100644 --- a/clang/lib/Frontend/TextDiagnostic.cpp +++ b/clang/lib/Frontend/TextDiagnostic.cpp @@ -349,14 +349,13 @@ private: /// When the source code line we want to print is too long for /// the terminal, select the "interesting" region. -static void selectInterestingSourceRegion(std::string &SourceLine, - std::string &CaretLine, - std::string &FixItInsertionLine, - Columns NonGutterColumns, - const SourceColumnMap &Map) { - Columns CaretColumns = Columns(CaretLine.size()); - Columns FixItColumns = - Columns(llvm::sys::locale::columnWidth(FixItInsertionLine)); +static void selectInterestingSourceRegion( + std::string &SourceLine, std::string &CaretLine, + std::string &FixItInsertionLine, Columns NonGutterColumns, + const SourceColumnMap &Map, + SmallVectorImpl<clang::TextDiagnostic::StyleRange> &Styles) { + Columns CaretColumns = CaretLine.size(); + Columns FixItColumns = llvm::sys::locale::columnWidth(FixItInsertionLine); Columns MaxColumns = std::max({Map.columns().V, CaretColumns.V, FixItColumns.V}); // if the number of columns is less than the desired number we're done @@ -369,13 +368,11 @@ static void selectInterestingSourceRegion(std::string &SourceLine, // Find the slice that we need to display the full caret line // correctly. Columns CaretStart = 0, CaretEnd = CaretLine.size(); - for (; CaretStart != CaretEnd; CaretStart = CaretStart.next()) - if (!isWhitespace(CaretLine[CaretStart.V])) - break; + while (CaretStart != CaretEnd && isWhitespace(CaretLine[CaretStart.V])) + CaretStart = CaretStart.next(); - for (; CaretEnd != CaretStart; CaretEnd = CaretEnd.prev()) - if (!isWhitespace(CaretLine[CaretEnd.V - 1])) - break; + while (CaretEnd != CaretStart && isWhitespace(CaretLine[CaretEnd.V])) + CaretEnd = CaretEnd.prev(); // caret has already been inserted into CaretLine so the above whitespace // check is guaranteed to include the caret @@ -516,13 +513,45 @@ static void selectInterestingSourceRegion(std::string &SourceLine, assert(FrontColumnsRemoved + ColumnsKept + BackColumnsRemoved > NonGutterColumns); + // Since we've modified the SourceLine, we also need to adjust the line's + // highlighting information. In particular, if we've removed + // from the front of the line, we need to move the style ranges to the + // left and remove unneeded ranges. + // Note in particular that variables like CaretEnd are defined in the + // CaretLine, which only contains ASCII, while the style ranges are defined in + // the source line, where we have to care for the byte-index != column-index + // case. + Bytes BytesRemoved = + FrontColumnsRemoved > FrontEllipse.size() + ? (Map.columnToByte(FrontColumnsRemoved) - Bytes(FrontEllipse.size())) + : 0; + Bytes CodeEnd = + CaretEnd < Map.columns() ? Map.columnToByte(CaretEnd.V) : CaretEnd.V; + for (TextDiagnostic::StyleRange &R : Styles) { + // Remove style ranges before and after the new truncated snippet. + if (R.Start >= static_cast<unsigned>(CodeEnd.V) || + R.End < static_cast<unsigned>(BytesRemoved.V)) { + R.Start = R.End = std::numeric_limits<int>::max(); + continue; + } + // Move them left. (Note that this can wrap R.Start, but that doesn't + // matter). + R.Start -= BytesRemoved.V; + R.End -= BytesRemoved.V; + + // Don't leak into the ellipse at the end. + if (R.Start < static_cast<unsigned>(CodeEnd.V) && + R.End > static_cast<unsigned>(CodeEnd.V)) + R.End = CodeEnd.V + 1; // R.End is inclusive. + } + // The line needs some truncation, and we'd prefer to keep the front // if possible, so remove the back if (BackColumnsRemoved > Columns(BackEllipse.size())) SourceLine.replace(SourceEnd.V, std::string::npos, BackEllipse); // If that's enough then we're done - if (FrontColumnsRemoved + ColumnsKept <= Columns(NonGutterColumns)) + if (FrontColumnsRemoved + ColumnsKept <= NonGutterColumns) return; // Otherwise remove the front as well @@ -1391,6 +1420,11 @@ void TextDiagnostic::emitSnippetAndCaret( OS.indent(MaxLineNoDisplayWidth + 2) << "| "; }; + Columns MessageLength = DiagOpts.MessageLength; + // If we don't have enough columns available, just abort now. + if (MessageLength != 0 && MessageLength <= Columns(MaxLineNoDisplayWidth + 4)) + return; + // Prepare source highlighting information for the lines we're about to // emit, starting from the first line. std::unique_ptr<SmallVector<StyleRange>[]> SourceStyles = @@ -1450,10 +1484,14 @@ void TextDiagnostic::emitSnippetAndCaret( // If the source line is too long for our terminal, select only the // "interesting" source region within that line. - Columns MessageLength = DiagOpts.MessageLength; - if (MessageLength.V != 0) + if (MessageLength != 0) { + Columns NonGutterColumns = MessageLength; + if (MaxLineNoDisplayWidth != 0) + NonGutterColumns -= Columns(MaxLineNoDisplayWidth + 4); selectInterestingSourceRegion(SourceLine, CaretLine, FixItInsertionLine, - MessageLength, SourceColMap); + NonGutterColumns, SourceColMap, + SourceStyles[LineNo - Lines.first]); + } // If we are in -fdiagnostics-print-source-range-info mode, we are trying // to produce easily machine parsable output. Add a space before the @@ -1508,7 +1546,7 @@ void TextDiagnostic::emitSnippet(StringRef SourceLine, // Print the source line one character at a time. bool PrintReversed = false; std::optional<llvm::raw_ostream::Colors> CurrentColor; - size_t I = 0; + size_t I = 0; // Bytes. while (I < SourceLine.size()) { auto [Str, WasPrintable] = printableTextForNextCharacter(SourceLine, &I, DiagOpts.TabStop); diff --git a/clang/lib/Headers/hlsl/hlsl_compat_overloads.h b/clang/lib/Headers/hlsl/hlsl_compat_overloads.h index fe4277e..ee243ab 100644 --- a/clang/lib/Headers/hlsl/hlsl_compat_overloads.h +++ b/clang/lib/Headers/hlsl/hlsl_compat_overloads.h @@ -7,7 +7,7 @@ //===----------------------------------------------------------------------===// #ifndef _HLSL_COMPAT_OVERLOADS_H_ -#define _HLSl_COMPAT_OVERLOADS_H_ +#define _HLSL_COMPAT_OVERLOADS_H_ namespace hlsl { diff --git a/clang/lib/Headers/hvx_hexagon_protos.h b/clang/lib/Headers/hvx_hexagon_protos.h index fd120a5..19309a4 100644 --- a/clang/lib/Headers/hvx_hexagon_protos.h +++ b/clang/lib/Headers/hvx_hexagon_protos.h @@ -5605,6 +5605,399 @@ __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_hf_f8)(Vu, Vv) #endif /* __HEXAGON_ARCH___ >= 79 */ +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=vabs(Vu32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vabs_Vhf(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf16_vabs_Vhf(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_qf16_hf)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=vabs(Vu32.qf16) + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vabs_Vqf16(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf16_vabs_Vqf16(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_qf16_qf16)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.qf32=vabs(Vu32.qf32) + C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vabs_Vqf32(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf32_vabs_Vqf32(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_qf32_qf32)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.qf32=vabs(Vu32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vabs_Vsf(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf32_vabs_Vsf(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_qf32_sf)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32=valign4(Vu32,Vv32,Rt8) + C Intrinsic Prototype: HVX_Vector Q6_V_valign4_VVR(HVX_Vector Vu, HVX_Vector + Vv, Word32 Rt) Instruction Type: CVI_VA Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_valign4_VVR(Vu, Vv, Rt) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_valign4)(Vu, Vv, Rt) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.bf=Vuu32.qf32 + C Intrinsic Prototype: HVX_Vector Q6_Vbf_equals_Wqf32(HVX_VectorPair Vuu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vbf_equals_Wqf32(Vuu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_bf_qf32)(Vuu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.f8=Vu32.qf16 + C Intrinsic Prototype: HVX_Vector Q6_V_equals_Vqf16(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_equals_Vqf16(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_f8_qf16)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.h=Vu32.hf:rnd + C Intrinsic Prototype: HVX_Vector Q6_Vh_equals_Vhf_rnd(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_equals_Vhf_rnd(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_h_hf_rnd)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vdd32.qf16=Vu32.f8 + C Intrinsic Prototype: HVX_VectorPair Q6_Wqf16_equals_V(HVX_Vector Vu) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wqf16_equals_V(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_qf16_f8)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=Vu32.hf + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_equals_Vhf(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf16_equals_Vhf(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_qf16_hf)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=Vu32.qf16 + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_equals_Vqf16(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf16_equals_Vqf16(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_qf16_qf16)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.qf32=Vu32.qf32 + C Intrinsic Prototype: HVX_Vector Q6_Vqf32_equals_Vqf32(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf32_equals_Vqf32(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_qf32_qf32)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.qf32=Vu32.sf + C Intrinsic Prototype: HVX_Vector Q6_Vqf32_equals_Vsf(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf32_equals_Vsf(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_qf32_sf)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.eq(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VhfVhf(HVX_Vector Vu, + HVX_Vector Vv) Instruction Type: CVI_VA Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eq_VhfVhf(Vu, Vv) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ + (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqhf)(Vu, Vv)), -1) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.eq(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVhfVhf(HVX_VectorPred + Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution + Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqand_QVhfVhf(Qx, Vu, Vv) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ + (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqhf_and)( \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \ + Vv)), \ + -1) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.eq(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVhfVhf(HVX_VectorPred + Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution + Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqor_QVhfVhf(Qx, Vu, Vv) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ + (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqhf_or)( \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \ + Vv)), \ + -1) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.eq(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVhfVhf(HVX_VectorPred + Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution + Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqxacc_QVhfVhf(Qx, Vu, Vv) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ + (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqhf_xor)( \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \ + Vv)), \ + -1) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.eq(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VsfVsf(HVX_Vector Vu, + HVX_Vector Vv) Instruction Type: CVI_VA Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eq_VsfVsf(Vu, Vv) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ + (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqsf)(Vu, Vv)), -1) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.eq(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVsfVsf(HVX_VectorPred + Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution + Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqand_QVsfVsf(Qx, Vu, Vv) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ + (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqsf_and)( \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \ + Vv)), \ + -1) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.eq(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVsfVsf(HVX_VectorPred + Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution + Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqor_QVsfVsf(Qx, Vu, Vv) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ + (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqsf_or)( \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \ + Vv)), \ + -1) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.eq(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVsfVsf(HVX_VectorPred + Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution + Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqxacc_QVsfVsf(Qx, Vu, Vv) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ + (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqsf_xor)( \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \ + Vv)), \ + -1) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.w=vilog2(Vu32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vilog2_Vhf(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vilog2_Vhf(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vilog2_hf)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.w=vilog2(Vu32.qf16) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vilog2_Vqf16(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vilog2_Vqf16(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vilog2_qf16)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.w=vilog2(Vu32.qf32) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vilog2_Vqf32(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vilog2_Vqf32(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vilog2_qf32)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.w=vilog2(Vu32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vilog2_Vsf(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vilog2_Vsf(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vilog2_sf)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=vneg(Vu32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vneg_Vhf(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf16_vneg_Vhf(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vneg_qf16_hf)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=vneg(Vu32.qf16) + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vneg_Vqf16(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf16_vneg_Vqf16(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vneg_qf16_qf16)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.qf32=vneg(Vu32.qf32) + C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vneg_Vqf32(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf32_vneg_Vqf32(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vneg_qf32_qf32)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.qf32=vneg(Vu32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vneg_Vsf(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf32_vneg_Vsf(Vu) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vneg_qf32_sf)(Vu) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=vsub(Vu32.hf,Vv32.qf16) + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vsub_VhfVqf16(HVX_Vector Vu, + HVX_Vector Vv) Instruction Type: CVI_VS Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf16_vsub_VhfVqf16(Vu, Vv) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_hf_mix)(Vu, Vv) +#endif /* __HEXAGON_ARCH___ >= 81 */ + +#if __HVX_ARCH__ >= 81 +/* ========================================================================== + Assembly Syntax: Vd32.qf32=vsub(Vu32.sf,Vv32.qf32) + C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vsub_VsfVqf32(HVX_Vector Vu, + HVX_Vector Vv) Instruction Type: CVI_VS Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf32_vsub_VsfVqf32(Vu, Vv) \ + __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf_mix)(Vu, Vv) +#endif /* __HEXAGON_ARCH___ >= 81 */ + #endif /* __HVX__ */ #endif diff --git a/clang/lib/Headers/module.modulemap b/clang/lib/Headers/module.modulemap index 2e4d533..c13dd3f 100644 --- a/clang/lib/Headers/module.modulemap +++ b/clang/lib/Headers/module.modulemap @@ -253,6 +253,11 @@ module _Builtin_stdbool [system] { export * } +module _Builtin_stdckdint [system] { + header "stdckdint.h" + export * +} + module _Builtin_stdcountof [system] { header "stdcountof.h" export * diff --git a/clang/lib/Lex/ModuleMap.cpp b/clang/lib/Lex/ModuleMap.cpp index 637a08f..b8202ea 100644 --- a/clang/lib/Lex/ModuleMap.cpp +++ b/clang/lib/Lex/ModuleMap.cpp @@ -258,6 +258,7 @@ static bool isBuiltinHeaderName(StringRef FileName) { .Case("stdarg.h", true) .Case("stdatomic.h", true) .Case("stdbool.h", true) + .Case("stdckdint.h", true) .Case("stdcountof.h", true) .Case("stddef.h", true) .Case("stdint.h", true) diff --git a/clang/lib/Lex/PPMacroExpansion.cpp b/clang/lib/Lex/PPMacroExpansion.cpp index dd80ae5..5efa4b5 100644 --- a/clang/lib/Lex/PPMacroExpansion.cpp +++ b/clang/lib/Lex/PPMacroExpansion.cpp @@ -1735,7 +1735,19 @@ void Preprocessor::ExpandBuiltinMacro(Token &Tok) { Diag(getLastFPEvalPragmaLocation(), diag::note_pragma_entered_here); } } else if (II == Ident__COUNTER__) { - // __COUNTER__ expands to a simple numeric value. + Diag(Tok.getLocation(), + getLangOpts().C2y ? diag::warn_counter : diag::ext_counter); + // __COUNTER__ expands to a simple numeric value that must be less than + // 2147483647. + constexpr uint32_t MaxPosValue = std::numeric_limits<int32_t>::max(); + if (CounterValue > MaxPosValue) { + Diag(Tok.getLocation(), diag::err_counter_overflow); + // Retain the maximal value so we don't issue conversion-related + // diagnostics by overflowing into a long long. While this does produce + // a duplicate value, there's no way to ignore this error so there's no + // translation anyway. + CounterValue = MaxPosValue; + } OS << CounterValue++; Tok.setKind(tok::numeric_constant); } else if (II == Ident__has_feature) { diff --git a/clang/lib/Sema/SemaFunctionEffects.cpp b/clang/lib/Sema/SemaFunctionEffects.cpp index 8590ee8..4b63eb7 100644 --- a/clang/lib/Sema/SemaFunctionEffects.cpp +++ b/clang/lib/Sema/SemaFunctionEffects.cpp @@ -1208,8 +1208,16 @@ private: return true; } - // No Decl, just an Expr. Just check based on its type. - checkIndirectCall(Call, CalleeExpr->getType()); + // No Decl, just an Expr. Just check based on its type. Bound member + // functions are a special expression type and need to be specially + // unpacked. + QualType CalleeExprQT = CalleeExpr->getType(); + if (CalleeExpr->isBoundMemberFunction(Outer.S.getASTContext())) { + QualType QT = Expr::findBoundMemberType(CalleeExpr); + if (!QT.isNull()) + CalleeExprQT = QT; + } + checkIndirectCall(Call, CalleeExprQT); return true; } @@ -1271,7 +1279,15 @@ private: const CXXConstructorDecl *Ctor = Construct->getConstructor(); CallableInfo CI(*Ctor); followCall(CI, Construct->getLocation()); + return true; + } + bool VisitCXXBindTemporaryExpr(CXXBindTemporaryExpr *BTE) override { + const CXXDestructorDecl *Dtor = BTE->getTemporary()->getDestructor(); + if (Dtor != nullptr) { + CallableInfo CI(*Dtor); + followCall(CI, BTE->getBeginLoc()); + } return true; } diff --git a/clang/lib/Sema/SemaStmt.cpp b/clang/lib/Sema/SemaStmt.cpp index f398963..5b3ef1a 100644 --- a/clang/lib/Sema/SemaStmt.cpp +++ b/clang/lib/Sema/SemaStmt.cpp @@ -3281,6 +3281,9 @@ static Scope *FindLabeledBreakContinueScope(Sema &S, Scope *CurScope, SourceLocation LabelLoc, bool IsContinue) { assert(Target && "not a named break/continue?"); + + Target->markUsed(S.Context); + Scope *Found = nullptr; for (Scope *Scope = CurScope; Scope; Scope = Scope->getParent()) { if (Scope->isFunctionScope()) diff --git a/clang/lib/Sema/SemaTemplateDeductionGuide.cpp b/clang/lib/Sema/SemaTemplateDeductionGuide.cpp index ad50600..bfcd397 100644 --- a/clang/lib/Sema/SemaTemplateDeductionGuide.cpp +++ b/clang/lib/Sema/SemaTemplateDeductionGuide.cpp @@ -659,7 +659,8 @@ private: SemaRef, MaterializedTypedefs, NestedPattern, TransformingOuterPatterns ? &Args : nullptr) .transform(NewDI); - + if (!NewDI) + return nullptr; // Resolving a wording defect, we also inherit default arguments from the // constructor. ExprResult NewDefArg; diff --git a/clang/lib/Sema/SemaType.cpp b/clang/lib/Sema/SemaType.cpp index 280b3c9..c483930 100644 --- a/clang/lib/Sema/SemaType.cpp +++ b/clang/lib/Sema/SemaType.cpp @@ -2358,6 +2358,11 @@ QualType Sema::BuildVectorType(QualType CurType, Expr *SizeExpr, return QualType(); } + if (VecSize->isNegative()) { + Diag(SizeExpr->getExprLoc(), diag::err_attribute_vec_negative_size); + return QualType(); + } + if (CurType->isDependentType()) return Context.getDependentVectorType(CurType, SizeExpr, AttrLoc, VectorKind::Generic); @@ -2394,7 +2399,7 @@ QualType Sema::BuildVectorType(QualType CurType, Expr *SizeExpr, VectorKind::Generic); } -QualType Sema::BuildExtVectorType(QualType T, Expr *ArraySize, +QualType Sema::BuildExtVectorType(QualType T, Expr *SizeExpr, SourceLocation AttrLoc) { // Unlike gcc's vector_size attribute, we do not allow vectors to be defined // in conjunction with complex types (pointers, arrays, functions, etc.). @@ -2417,35 +2422,40 @@ QualType Sema::BuildExtVectorType(QualType T, Expr *ArraySize, BIT && CheckBitIntElementType(*this, AttrLoc, BIT)) return QualType(); - if (!ArraySize->isTypeDependent() && !ArraySize->isValueDependent()) { - std::optional<llvm::APSInt> vecSize = - ArraySize->getIntegerConstantExpr(Context); - if (!vecSize) { + if (!SizeExpr->isTypeDependent() && !SizeExpr->isValueDependent()) { + std::optional<llvm::APSInt> VecSize = + SizeExpr->getIntegerConstantExpr(Context); + if (!VecSize) { Diag(AttrLoc, diag::err_attribute_argument_type) - << "ext_vector_type" << AANT_ArgumentIntegerConstant - << ArraySize->getSourceRange(); + << "ext_vector_type" << AANT_ArgumentIntegerConstant + << SizeExpr->getSourceRange(); + return QualType(); + } + + if (VecSize->isNegative()) { + Diag(SizeExpr->getExprLoc(), diag::err_attribute_vec_negative_size); return QualType(); } - if (!vecSize->isIntN(32)) { + if (!VecSize->isIntN(32)) { Diag(AttrLoc, diag::err_attribute_size_too_large) - << ArraySize->getSourceRange() << "vector"; + << SizeExpr->getSourceRange() << "vector"; return QualType(); } // Unlike gcc's vector_size attribute, the size is specified as the // number of elements, not the number of bytes. - unsigned vectorSize = static_cast<unsigned>(vecSize->getZExtValue()); + unsigned VectorSize = static_cast<unsigned>(VecSize->getZExtValue()); - if (vectorSize == 0) { + if (VectorSize == 0) { Diag(AttrLoc, diag::err_attribute_zero_size) - << ArraySize->getSourceRange() << "vector"; + << SizeExpr->getSourceRange() << "vector"; return QualType(); } - return Context.getExtVectorType(T, vectorSize); + return Context.getExtVectorType(T, VectorSize); } - return Context.getDependentSizedExtVectorType(T, ArraySize, AttrLoc); + return Context.getDependentSizedExtVectorType(T, SizeExpr, AttrLoc); } QualType Sema::BuildMatrixType(QualType ElementTy, Expr *NumRows, Expr *NumCols, diff --git a/clang/lib/Serialization/ASTReader.cpp b/clang/lib/Serialization/ASTReader.cpp index e3106f8d..d552821 100644 --- a/clang/lib/Serialization/ASTReader.cpp +++ b/clang/lib/Serialization/ASTReader.cpp @@ -225,7 +225,7 @@ bool ChainedASTReaderListener::ReadPreprocessorOptions( } void ChainedASTReaderListener::ReadCounter(const serialization::ModuleFile &M, - unsigned Value) { + uint32_t Value) { First->ReadCounter(M, Value); Second->ReadCounter(M, Value); } @@ -973,7 +973,7 @@ bool PCHValidator::ReadHeaderSearchOptions(const HeaderSearchOptions &HSOpts, PP.getPreprocessorOpts()); } -void PCHValidator::ReadCounter(const ModuleFile &M, unsigned Value) { +void PCHValidator::ReadCounter(const ModuleFile &M, uint32_t Value) { PP.setCounterValue(Value); } diff --git a/clang/lib/Serialization/ASTWriter.cpp b/clang/lib/Serialization/ASTWriter.cpp index 3ac338e..b1fd151 100644 --- a/clang/lib/Serialization/ASTWriter.cpp +++ b/clang/lib/Serialization/ASTWriter.cpp @@ -4374,8 +4374,7 @@ private: // parent of parent. We DON'T remove the enum constant from its parent. So // we don't need to care about merging problems here. if (auto *ECD = dyn_cast<EnumConstantDecl>(D); - ECD && DC.isFileContext() && ECD->getOwningModule() && - ECD->getTopLevelOwningNamedModule()->isNamedModule()) { + ECD && DC.isFileContext() && ECD->getTopLevelOwningNamedModule()) { if (llvm::all_of( DC.noload_lookup( cast<EnumDecl>(ECD->getDeclContext())->getDeclName()), diff --git a/clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp b/clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp index 70baab5..ec7ef23 100644 --- a/clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp +++ b/clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp @@ -6,41 +6,45 @@ // //===----------------------------------------------------------------------===// // -// This file defines a variety of memory management related checkers, such as +// This file defines checkers that report memory management errors such as // leak, double free, and use-after-free. // -// The following checkers are defined here: +// The logic for modeling memory allocations is implemented in the checker +// family which is called 'MallocChecker' for historical reasons. (This name is +// inaccurate, something like 'DynamicMemory' would be more precise.) // -// * MallocChecker -// Despite its name, it models all sorts of memory allocations and -// de- or reallocation, including but not limited to malloc, free, -// relloc, new, delete. It also reports on a variety of memory misuse -// errors. -// Many other checkers interact very closely with this checker, in fact, -// most are merely options to this one. Other checkers may register -// MallocChecker, but do not enable MallocChecker's reports (more details -// to follow around its field, ChecksEnabled). -// It also has a boolean "Optimistic" checker option, which if set to true -// will cause the checker to model user defined memory management related -// functions annotated via the attribute ownership_takes, ownership_holds -// and ownership_returns. +// The reports produced by this backend are exposed through several frontends: +// * MallocChecker: reports all misuse of dynamic memory allocated by +// malloc, related functions (like calloc, realloc etc.) and the functions +// annotated by ownership_returns. (Here the name "MallocChecker" is +// reasonably accurate; don't confuse this checker frontend with the whole +// misnamed family.) +// * NewDeleteChecker: reports most misuse (anything but memory leaks) of +// memory managed by the C++ operators new and new[]. +// * NewDeleteLeaksChecker: reports leaks of dynamic memory allocated by +// the C++ operators new and new[]. +// * MismatchedDeallocatorChecker: reports situations where the allocation +// and deallocation is mismatched, e.g. memory allocated via malloc is +// passed to operator delete. +// * InnerPointerChecker: reports use of pointers to the internal buffer of +// a std::string instance after operations that invalidate them. +// * TaintedAllocChecker: reports situations where the size argument of a +// memory allocation function or array new operator is tainted (i.e. comes +// from an untrusted source and can be controlled by an attacker). // -// * NewDeleteChecker -// Enables the modeling of new, new[], delete, delete[] in MallocChecker, -// and checks for related double-free and use-after-free errors. +// In addition to these frontends this file also defines the registration +// functions for "unix.DynamicMemoryModeling". This registers the callbacks of +// the checker family MallocChecker without enabling any of the frontends and +// and handle two checker options which are attached to this "modeling +// checker" because they affect multiple checker frontends. // -// * NewDeleteLeaksChecker -// Checks for leaks related to new, new[], delete, delete[]. -// Depends on NewDeleteChecker. -// -// * MismatchedDeallocatorChecker -// Enables checking whether memory is deallocated with the corresponding -// allocation function in MallocChecker, such as malloc() allocated -// regions are only freed by free(), new by delete, new[] by delete[]. -// -// InnerPointerChecker interacts very closely with MallocChecker, but unlike -// the above checkers, it has it's own file, hence the many InnerPointerChecker -// related headers and non-static functions. +// Note that what the users see as the checker "cplusplus.InnerPointer" is a +// combination of the frontend InnerPointerChecker (within this family) which +// emits the bug reports and a separate checker class (also named +// InnerPointerChecker) which is defined in InnerPointerChecker.cpp and does a +// significant part of the modeling. This cooperation is enabled by several +// non-static helper functions that are defined within this translation unit +// and used in InnerPointerChecker.cpp. // //===----------------------------------------------------------------------===// diff --git a/clang/lib/StaticAnalyzer/Core/CallEvent.cpp b/clang/lib/StaticAnalyzer/Core/CallEvent.cpp index 62460cc..d04c827 100644 --- a/clang/lib/StaticAnalyzer/Core/CallEvent.cpp +++ b/clang/lib/StaticAnalyzer/Core/CallEvent.cpp @@ -230,13 +230,11 @@ static void findPtrToConstParams(llvm::SmallSet<unsigned, 4> &PreserveArgs, } ProgramStateRef CallEvent::invalidateRegions(unsigned BlockCount, - ProgramStateRef Orig) const { - ProgramStateRef Result = (Orig ? Orig : getState()); - + ProgramStateRef State) const { // Don't invalidate anything if the callee is marked pure/const. - if (const Decl *callee = getDecl()) - if (callee->hasAttr<PureAttr>() || callee->hasAttr<ConstAttr>()) - return Result; + if (const Decl *Callee = getDecl()) + if (Callee->hasAttr<PureAttr>() || Callee->hasAttr<ConstAttr>()) + return State; SmallVector<SVal, 8> ValuesToInvalidate; RegionAndSymbolInvalidationTraits ETraits; @@ -278,10 +276,10 @@ ProgramStateRef CallEvent::invalidateRegions(unsigned BlockCount, // Invalidate designated regions using the batch invalidation API. // NOTE: Even if RegionsToInvalidate is empty, we may still invalidate // global variables. - return Result->invalidateRegions(ValuesToInvalidate, getCFGElementRef(), - BlockCount, getLocationContext(), - /*CausedByPointerEscape*/ true, - /*Symbols=*/nullptr, this, &ETraits); + return State->invalidateRegions(ValuesToInvalidate, getCFGElementRef(), + BlockCount, getLocationContext(), + /*CausedByPointerEscape*/ true, + /*Symbols=*/nullptr, this, &ETraits); } ProgramPoint CallEvent::getProgramPoint(bool IsPreVisit, diff --git a/clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp b/clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp index 75d7e26..00e3ef8 100644 --- a/clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp +++ b/clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp @@ -1013,7 +1013,7 @@ void ExprEngine::VisitCXXNewExpr(const CXXNewExpr *CNE, ExplodedNode *Pred, // FIXME: Once we figure out how we want allocators to work, // we should be using the usual pre-/(default-)eval-/post-call checkers // here. - State = Call->invalidateRegions(blockCount); + State = Call->invalidateRegions(blockCount, State); if (!State) return; diff --git a/clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp b/clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp index 42f52d0..eebecdb 100644 --- a/clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp +++ b/clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp @@ -350,7 +350,7 @@ void sanitizeDiagOpts(DiagnosticOptions &DiagOpts) { // See `test/ClangScanDeps/diagnostic-pragmas.c` for an example. llvm::erase_if(DiagOpts.Warnings, [](StringRef Warning) { return llvm::StringSwitch<bool>(Warning) - .Cases("pch-vfs-diff", "error=pch-vfs-diff", false) + .Cases({"pch-vfs-diff", "error=pch-vfs-diff"}, false) .StartsWith("no-error=", false) .Default(true); }); |