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-rw-r--r--clang/lib/Basic/Targets.cpp4
-rw-r--r--clang/lib/Basic/Targets/AArch64.cpp11
-rw-r--r--clang/lib/Basic/Targets/AArch64.h2
-rw-r--r--clang/lib/Basic/Targets/ARM.cpp7
-rw-r--r--clang/lib/Basic/Targets/Mips.cpp10
-rw-r--r--clang/lib/Basic/Targets/NVPTX.h2
-rw-r--r--clang/lib/Basic/Targets/RISCV.cpp5
-rw-r--r--clang/lib/Basic/Targets/RISCV.h6
8 files changed, 37 insertions, 10 deletions
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index b7e8bad..f39c698 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -222,6 +222,8 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<OHOSTargetInfo<ARMleTargetInfo>>(Triple, Opts);
case llvm::Triple::FreeBSD:
return std::make_unique<FreeBSDTargetInfo<ARMleTargetInfo>>(Triple, Opts);
+ case llvm::Triple::Fuchsia:
+ return std::make_unique<FuchsiaTargetInfo<ARMleTargetInfo>>(Triple, Opts);
case llvm::Triple::NetBSD:
return std::make_unique<NetBSDTargetInfo<ARMleTargetInfo>>(Triple, Opts);
case llvm::Triple::OpenBSD:
@@ -254,6 +256,8 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<AppleMachOARMTargetInfo>(Triple, Opts);
switch (os) {
+ case llvm::Triple::Fuchsia:
+ return std::make_unique<FuchsiaTargetInfo<ARMbeTargetInfo>>(Triple, Opts);
case llvm::Triple::Linux:
return std::make_unique<LinuxTargetInfo<ARMbeTargetInfo>>(Triple, Opts);
case llvm::Triple::NetBSD:
diff --git a/clang/lib/Basic/Targets/AArch64.cpp b/clang/lib/Basic/Targets/AArch64.cpp
index 18641a9..146f058 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -398,6 +398,12 @@ void AArch64TargetInfo::getTargetDefinesARMV96A(const LangOptions &Opts,
getTargetDefinesARMV95A(Opts, Builder);
}
+void AArch64TargetInfo::getTargetDefinesARMV97A(const LangOptions &Opts,
+ MacroBuilder &Builder) const {
+ // Armv9.7-A does not have a v8.* equivalent, but is a superset of v9.6-A.
+ getTargetDefinesARMV96A(Opts, Builder);
+}
+
void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const {
// Target identification.
@@ -714,6 +720,8 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts,
getTargetDefinesARMV95A(Opts, Builder);
else if (*ArchInfo == llvm::AArch64::ARMV9_6A)
getTargetDefinesARMV96A(Opts, Builder);
+ else if (*ArchInfo == llvm::AArch64::ARMV9_7A)
+ getTargetDefinesARMV97A(Opts, Builder);
// All of the __sync_(bool|val)_compare_and_swap_(1|2|4|8|16) builtins work.
Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
@@ -1152,6 +1160,9 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
if (Feature == "+v9.6a" &&
ArchInfo->Version < llvm::AArch64::ARMV9_6A.Version)
ArchInfo = &llvm::AArch64::ARMV9_6A;
+ if (Feature == "+v9.7a" &&
+ ArchInfo->Version < llvm::AArch64::ARMV9_7A.Version)
+ ArchInfo = &llvm::AArch64::ARMV9_7A;
if (Feature == "+v8r")
ArchInfo = &llvm::AArch64::ARMV8R;
if (Feature == "+fullfp16") {
diff --git a/clang/lib/Basic/Targets/AArch64.h b/clang/lib/Basic/Targets/AArch64.h
index dfd89be..3952e7b 100644
--- a/clang/lib/Basic/Targets/AArch64.h
+++ b/clang/lib/Basic/Targets/AArch64.h
@@ -190,6 +190,8 @@ public:
MacroBuilder &Builder) const;
void getTargetDefinesARMV96A(const LangOptions &Opts,
MacroBuilder &Builder) const;
+ void getTargetDefinesARMV97A(const LangOptions &Opts,
+ MacroBuilder &Builder) const;
void getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const override;
diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index 3de17d2..394b50b 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -231,6 +231,8 @@ StringRef ARMTargetInfo::getCPUAttr() const {
return "9_5A";
case llvm::ARM::ArchKind::ARMV9_6A:
return "9_6A";
+ case llvm::ARM::ArchKind::ARMV9_7A:
+ return "9_7A";
case llvm::ARM::ArchKind::ARMV8MBaseline:
return "8M_BASE";
case llvm::ARM::ArchKind::ARMV8MMainline:
@@ -260,6 +262,7 @@ ARMTargetInfo::ARMTargetInfo(const llvm::Triple &Triple,
: TargetInfo(Triple), FPMath(FP_Default), IsAAPCS(true), LDREX(0),
HW_FP(0) {
bool IsFreeBSD = Triple.isOSFreeBSD();
+ bool IsFuchsia = Triple.isOSFuchsia();
bool IsOpenBSD = Triple.isOSOpenBSD();
bool IsNetBSD = Triple.isOSNetBSD();
bool IsHaiku = Triple.isOSHaiku();
@@ -332,7 +335,7 @@ ARMTargetInfo::ARMTargetInfo(const llvm::Triple &Triple,
default:
if (IsNetBSD)
setABI("apcs-gnu");
- else if (IsFreeBSD || IsOpenBSD || IsHaiku || IsOHOS)
+ else if (IsFreeBSD || IsFuchsia || IsOpenBSD || IsHaiku || IsOHOS)
setABI("aapcs-linux");
else
setABI("aapcs");
@@ -903,6 +906,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
case llvm::ARM::ArchKind::ARMV9_4A:
case llvm::ARM::ArchKind::ARMV9_5A:
case llvm::ARM::ArchKind::ARMV9_6A:
+ case llvm::ARM::ArchKind::ARMV9_7A:
// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
break;
@@ -1073,6 +1077,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
case llvm::ARM::ArchKind::ARMV9_4A:
case llvm::ARM::ArchKind::ARMV9_5A:
case llvm::ARM::ArchKind::ARMV9_6A:
+ case llvm::ARM::ArchKind::ARMV9_7A:
getTargetDefinesARMV83A(Opts, Builder);
break;
}
diff --git a/clang/lib/Basic/Targets/Mips.cpp b/clang/lib/Basic/Targets/Mips.cpp
index de6ccff..a999d14 100644
--- a/clang/lib/Basic/Targets/Mips.cpp
+++ b/clang/lib/Basic/Targets/Mips.cpp
@@ -68,11 +68,11 @@ void MipsTargetInfo::fillValidCPUList(
unsigned MipsTargetInfo::getISARev() const {
return llvm::StringSwitch<unsigned>(getCPU())
- .Cases("mips32", "mips64", 1)
- .Cases("mips32r2", "mips64r2", "octeon", "octeon+", 2)
- .Cases("mips32r3", "mips64r3", 3)
- .Cases("mips32r5", "mips64r5", "p5600", 5)
- .Cases("mips32r6", "mips64r6", "i6400", "i6500", 6)
+ .Cases({"mips32", "mips64"}, 1)
+ .Cases({"mips32r2", "mips64r2", "octeon", "octeon+"}, 2)
+ .Cases({"mips32r3", "mips64r3"}, 3)
+ .Cases({"mips32r5", "mips64r5", "p5600"}, 5)
+ .Cases({"mips32r6", "mips64r6", "i6400", "i6500"}, 6)
.Default(0);
}
diff --git a/clang/lib/Basic/Targets/NVPTX.h b/clang/lib/Basic/Targets/NVPTX.h
index 33c2958..f5c8396 100644
--- a/clang/lib/Basic/Targets/NVPTX.h
+++ b/clang/lib/Basic/Targets/NVPTX.h
@@ -200,7 +200,7 @@ public:
// a host function.
if (HostTarget)
return HostTarget->checkCallingConvention(CC);
- return CCCR_Warning;
+ return CC == CC_DeviceKernel ? CCCR_OK : CCCR_Warning;
}
bool hasBitIntType() const override { return true; }
diff --git a/clang/lib/Basic/Targets/RISCV.cpp b/clang/lib/Basic/Targets/RISCV.cpp
index 04da4e6..685925b 100644
--- a/clang/lib/Basic/Targets/RISCV.cpp
+++ b/clang/lib/Basic/Targets/RISCV.cpp
@@ -192,8 +192,11 @@ void RISCVTargetInfo::getTargetDefines(const LangOptions &Opts,
Builder.defineMacro("__riscv_muldiv");
}
- if (ISAInfo->hasExtension("a")) {
+ // The "a" extension is composed of "zalrsc" and "zaamo"
+ if (ISAInfo->hasExtension("a"))
Builder.defineMacro("__riscv_atomic");
+
+ if (ISAInfo->hasExtension("zalrsc")) {
Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
diff --git a/clang/lib/Basic/Targets/RISCV.h b/clang/lib/Basic/Targets/RISCV.h
index d8b0e64..85fa4cc 100644
--- a/clang/lib/Basic/Targets/RISCV.h
+++ b/clang/lib/Basic/Targets/RISCV.h
@@ -195,7 +195,8 @@ public:
void setMaxAtomicWidth() override {
MaxAtomicPromoteWidth = 128;
- if (ISAInfo->hasExtension("a"))
+ // "a" implies "zalrsc" which is sufficient to inline atomics
+ if (ISAInfo->hasExtension("zalrsc"))
MaxAtomicInlineWidth = 32;
}
};
@@ -225,7 +226,8 @@ public:
void setMaxAtomicWidth() override {
MaxAtomicPromoteWidth = 128;
- if (ISAInfo->hasExtension("a"))
+ // "a" implies "zalrsc" which is sufficient to inline atomics
+ if (ISAInfo->hasExtension("zalrsc"))
MaxAtomicInlineWidth = 64;
}
};
generated by cgit v1.1 at 2025-10-24 09:08:08 +0000