aboutsummaryrefslogtreecommitdiff
path: root/clang/lib/Basic/Targets
diff options
context:
space:
mode:
Diffstat (limited to 'clang/lib/Basic/Targets')
-rw-r--r--clang/lib/Basic/Targets/AArch64.cpp1
-rw-r--r--clang/lib/Basic/Targets/AVR.cpp30
-rw-r--r--clang/lib/Basic/Targets/DirectX.h5
-rw-r--r--clang/lib/Basic/Targets/SystemZ.cpp13
-rw-r--r--clang/lib/Basic/Targets/SystemZ.h6
-rw-r--r--clang/lib/Basic/Targets/X86.cpp3
6 files changed, 42 insertions, 16 deletions
diff --git a/clang/lib/Basic/Targets/AArch64.cpp b/clang/lib/Basic/Targets/AArch64.cpp
index 9e03a08..18641a9 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -1568,6 +1568,7 @@ bool AArch64TargetInfo::validateAsmConstraint(
if (const unsigned Len = matchAsmCCConstraint(Name)) {
Name += Len - 1;
Info.setAllowsRegister();
+ Info.setOutputOperandBounds(0, 2);
return true;
}
}
diff --git a/clang/lib/Basic/Targets/AVR.cpp b/clang/lib/Basic/Targets/AVR.cpp
index bbe7b01..2673669 100644
--- a/clang/lib/Basic/Targets/AVR.cpp
+++ b/clang/lib/Basic/Targets/AVR.cpp
@@ -420,23 +420,23 @@ static MCUInfo AVRMcus[] = {
static bool ArchHasELPM(StringRef Arch) {
return llvm::StringSwitch<bool>(Arch)
- .Cases("31", "51", "6", true)
- .Cases("102", "104", "105", "106", "107", true)
- .Default(false);
+ .Cases({"31", "51", "6"}, true)
+ .Cases({"102", "104", "105", "106", "107"}, true)
+ .Default(false);
}
static bool ArchHasELPMX(StringRef Arch) {
return llvm::StringSwitch<bool>(Arch)
- .Cases("51", "6", true)
- .Cases("102", "104", "105", "106", "107", true)
- .Default(false);
+ .Cases({"51", "6"}, true)
+ .Cases({"102", "104", "105", "106", "107"}, true)
+ .Default(false);
}
static bool ArchHasMOVW(StringRef Arch) {
return llvm::StringSwitch<bool>(Arch)
- .Cases("25", "35", "4", "5", "51", "6", true)
- .Cases("102", "103", "104", "105", "106", "107", true)
- .Default(false);
+ .Cases({"25", "35", "4", "5", "51", "6"}, true)
+ .Cases({"102", "103", "104", "105", "106", "107"}, true)
+ .Default(false);
}
static bool ArchHasLPMX(StringRef Arch) {
@@ -445,16 +445,16 @@ static bool ArchHasLPMX(StringRef Arch) {
static bool ArchHasMUL(StringRef Arch) {
return llvm::StringSwitch<bool>(Arch)
- .Cases("4", "5", "51", "6", true)
- .Cases("102", "103", "104", "105", "106", "107", true)
- .Default(false);
+ .Cases({"4", "5", "51", "6"}, true)
+ .Cases({"102", "103", "104", "105", "106", "107"}, true)
+ .Default(false);
}
static bool ArchHasJMPCALL(StringRef Arch) {
return llvm::StringSwitch<bool>(Arch)
- .Cases("3", "31", "35", "5", "51", "6", true)
- .Cases("102", "103", "104", "105", "106", "107", true)
- .Default(false);
+ .Cases({"3", "31", "35", "5", "51", "6"}, true)
+ .Cases({"102", "103", "104", "105", "106", "107"}, true)
+ .Default(false);
}
static bool ArchHas3BytePC(StringRef Arch) {
diff --git a/clang/lib/Basic/Targets/DirectX.h b/clang/lib/Basic/Targets/DirectX.h
index bd13c9e..a21a593 100644
--- a/clang/lib/Basic/Targets/DirectX.h
+++ b/clang/lib/Basic/Targets/DirectX.h
@@ -64,8 +64,11 @@ public:
NoAsmVariants = true;
PlatformMinVersion = Triple.getOSVersion();
PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
+ // TODO: We need to align vectors on the element size generally, but for now
+ // we hard code this for 3-element 32- and 64-bit vectors as a workaround.
+ // See https://github.com/llvm/llvm-project/issues/123968
resetDataLayout("e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-f32:"
- "32-f64:64-n8:16:32:64");
+ "32-f64:64-n8:16:32:64-v48:16:16-v96:32:32-v192:64:64");
TheCXXABI.set(TargetCXXABI::GenericItanium);
}
bool useFP16ConversionIntrinsics() const override { return false; }
diff --git a/clang/lib/Basic/Targets/SystemZ.cpp b/clang/lib/Basic/Targets/SystemZ.cpp
index 13b8623..30f846c 100644
--- a/clang/lib/Basic/Targets/SystemZ.cpp
+++ b/clang/lib/Basic/Targets/SystemZ.cpp
@@ -99,6 +99,16 @@ bool SystemZTargetInfo::validateAsmConstraint(
case 'T': // Likewise, plus an index
Info.setAllowsMemory();
return true;
+ case '@':
+ // CC condition changes.
+ if (StringRef(Name) == "@cc") {
+ Name += 2;
+ Info.setAllowsRegister();
+ // SystemZ has 2-bits CC, and hence Interval [0, 4).
+ Info.setOutputOperandBounds(0, 4);
+ return true;
+ }
+ return false;
}
}
@@ -161,6 +171,9 @@ unsigned SystemZTargetInfo::getMinGlobalAlign(uint64_t Size,
void SystemZTargetInfo::getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const {
+ // Inline assembly supports SystemZ flag outputs.
+ Builder.defineMacro("__GCC_ASM_FLAG_OUTPUTS__");
+
Builder.defineMacro("__s390__");
Builder.defineMacro("__s390x__");
Builder.defineMacro("__zarch__");
diff --git a/clang/lib/Basic/Targets/SystemZ.h b/clang/lib/Basic/Targets/SystemZ.h
index dc2185e..4e15d5a 100644
--- a/clang/lib/Basic/Targets/SystemZ.h
+++ b/clang/lib/Basic/Targets/SystemZ.h
@@ -136,6 +136,12 @@ public:
std::string convertConstraint(const char *&Constraint) const override {
switch (Constraint[0]) {
+ case '@': // Flag output operand.
+ if (llvm::StringRef(Constraint) == "@cc") {
+ Constraint += 2;
+ return std::string("{@cc}");
+ }
+ break;
case 'p': // Keep 'p' constraint.
return std::string("p");
case 'Z':
diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index 6eb4db5..ef4973c 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -625,6 +625,7 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
case CK_ArrowlakeS:
case CK_Lunarlake:
case CK_Pantherlake:
+ case CK_Wildcatlake:
case CK_Sierraforest:
case CK_Grandridge:
case CK_Graniterapids:
@@ -1516,6 +1517,7 @@ bool X86TargetInfo::validateAsmConstraint(
if (auto Len = matchAsmCCConstraint(Name)) {
Name += Len - 1;
Info.setAllowsRegister();
+ Info.setOutputOperandBounds(0, 2);
return true;
}
return false;
@@ -1612,6 +1614,7 @@ std::optional<unsigned> X86TargetInfo::getCPUCacheLineSize() const {
case CK_ArrowlakeS:
case CK_Lunarlake:
case CK_Pantherlake:
+ case CK_Wildcatlake:
case CK_Sierraforest:
case CK_Grandridge:
case CK_Graniterapids:
generated by cgit v1.1 at 2025-10-16 01:27:33 +0000