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-rw-r--r--llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp4
-rw-r--r--llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp4
-rw-r--r--llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp2
3 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp b/llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
index fc794c4..48452f6 100644
--- a/llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
+++ b/llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
@@ -252,7 +252,7 @@ public:
O << "Token: \"" << getToken() << "\"";
break;
case k_Register:
- O << "Register: " << getReg();
+ O << "Register: " << getReg().id();
break;
case k_Immediate:
O << "Immediate: \"";
@@ -262,7 +262,7 @@ public:
case k_Memri: {
// only manually print the size for non-negative values,
// as the sign is inserted automatically.
- O << "Memri: \"" << getReg() << '+';
+ O << "Memri: \"" << getReg().id() << '+';
MAI.printExpr(O, *getImm());
O << "\"";
break;
diff --git a/llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp b/llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
index 5548ad1..84a64ba 100644
--- a/llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
+++ b/llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
@@ -82,7 +82,7 @@ static DecodeStatus DecodeGPR8RegisterClass(MCInst &Inst, unsigned RegNo,
if (RegNo > 31)
return MCDisassembler::Fail;
- unsigned Register = GPRDecoderTable[RegNo];
+ MCRegister Register = GPRDecoderTable[RegNo];
Inst.addOperand(MCOperand::createReg(Register));
return MCDisassembler::Success;
}
@@ -174,7 +174,7 @@ static DecodeStatus decodeLoadStore(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder) {
// Get the register will be loaded or stored.
- unsigned RegVal = GPRDecoderTable[(Insn >> 4) & 0x1f];
+ MCRegister RegVal = GPRDecoderTable[(Insn >> 4) & 0x1f];
// Decode LDD/STD with offset less than 8.
if ((Insn & 0xf000) == 0x8000) {
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
index 4bb16e2..fbb130c 100644
--- a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
+++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
@@ -96,7 +96,7 @@ AVRMCCodeEmitter::loadStorePostEncoder(const MCInst &MI, unsigned EncodedValue,
EncodedValue |= (1 << 12);
// Encode the pointer register.
- switch (MI.getOperand(Idx).getReg()) {
+ switch (MI.getOperand(Idx).getReg().id()) {
case AVR::R27R26:
EncodedValue |= 0xc;
break;