diff options
273 files changed, 7935 insertions, 10730 deletions
diff --git a/.ci/monolithic-windows.sh b/.ci/monolithic-windows.sh index 219979dd..5fb8f69 100755 --- a/.ci/monolithic-windows.sh +++ b/.ci/monolithic-windows.sh @@ -23,8 +23,8 @@ runtimes_targets="${4}" start-group "CMake" pip install -q -r "${MONOREPO_ROOT}"/.ci/all_requirements.txt -export CC=cl -export CXX=cl +export CC=C:/clang/clang-msvc/bin/clang-cl.exe +export CXX=C:/clang/clang-msvc/bin/clang-cl.exe export LD=link # The CMAKE_*_LINKER_FLAGS to disable the manifest come from research @@ -49,6 +49,7 @@ cmake -S "${MONOREPO_ROOT}"/llvm -B "${BUILD_DIR}" \ -D CMAKE_EXE_LINKER_FLAGS="/MANIFEST:NO" \ -D CMAKE_MODULE_LINKER_FLAGS="/MANIFEST:NO" \ -D CMAKE_SHARED_LINKER_FLAGS="/MANIFEST:NO" \ + -D CMAKE_CXX_FLAGS="-Wno-c++98-compat -Wno-c++14-compat -Wno-unsafe-buffer-usage -Wno-old-style-cast" \ -D LLVM_ENABLE_RUNTIMES="${runtimes}" start-group "ninja" diff --git a/.ci/premerge_advisor_upload.py b/.ci/premerge_advisor_upload.py index 1fc2423d..cb379b0 100644 --- a/.ci/premerge_advisor_upload.py +++ b/.ci/premerge_advisor_upload.py @@ -12,9 +12,12 @@ import requests import generate_test_report_lib -PREMERGE_ADVISOR_URL = ( - "http://premerge-advisor.premerge-advisor.svc.cluster.local:5000/upload" -) +# These are IP addresses of the two premerge advisor instances. They should +# eventually be updated to domain names. +PREMERGE_ADVISOR_URLS = [ + "http://34.82.126.63:5000/upload", + "http://136.114.125.23:5000/upload", +] def main(commit_sha, workflow_run_number, build_log_files): @@ -41,7 +44,8 @@ def main(commit_sha, workflow_run_number, build_log_files): ninja_failures = generate_test_report_lib.find_failure_in_ninja_logs(ninja_logs) for name, failure_message in ninja_failures: failure_info["failures"].append({"name": name, "message": failure_message}) - requests.post(PREMERGE_ADVISOR_URL, json=failure_info) + for premerge_advisor_url in PREMERGE_ADVISOR_URLS: + requests.post(premerge_advisor_url, json=failure_info) if __name__ == "__main__": diff --git a/.ci/utils.sh b/.ci/utils.sh index dc8ce9b..540acfa 100644 --- a/.ci/utils.sh +++ b/.ci/utils.sh @@ -40,13 +40,17 @@ function at-exit { fi if [[ "$retcode" != "0" ]]; then - python "${MONOREPO_ROOT}"/.ci/premerge_advisor_upload.py \ - $(git rev-parse HEAD~1) $GITHUB_RUN_NUMBER \ - "${BUILD_DIR}"/test-results.*.xml "${MONOREPO_ROOT}"/ninja*.log if [[ "$GITHUB_ACTIONS" != "" ]]; then python "${MONOREPO_ROOT}"/.ci/premerge_advisor_explain.py \ $(git rev-parse HEAD~1) "${BUILD_DIR}"/test-results.*.xml \ "${MONOREPO_ROOT}"/ninja*.log + python "${MONOREPO_ROOT}"/.ci/premerge_advisor_upload.py \ + $(git rev-parse HEAD~1) $GITHUB_RUN_NUMBER \ + "${BUILD_DIR}"/test-results.*.xml "${MONOREPO_ROOT}"/ninja*.log + else + python "${MONOREPO_ROOT}"/.ci/premerge_advisor_upload.py \ + $(git rev-parse HEAD) $BUILDBOT_BUILDNUMBER \ + "${BUILD_DIR}"/test-results.*.xml "${MONOREPO_ROOT}"/ninja*.log fi fi } diff --git a/.github/workflows/containers/github-action-ci-tooling/Dockerfile b/.github/workflows/containers/github-action-ci-tooling/Dockerfile index 9d2aaf6..8aaa2e8 100644 --- a/.github/workflows/containers/github-action-ci-tooling/Dockerfile +++ b/.github/workflows/containers/github-action-ci-tooling/Dockerfile @@ -37,6 +37,14 @@ RUN apt-get update && \ apt-get clean && \ rm -rf /var/lib/apt/lists/* +# Create a new user with id 1001 as that is the user id that +# Github Actions uses to perform the checkout action. +RUN useradd gha -u 1001 -m -s /bin/bash +RUN adduser gha sudo +RUN echo '%sudo ALL=(ALL) NOPASSWD:ALL' >> /etc/sudoers +# Don't set USER gha right away because we still need to install packages +# as root in 'ci-container-code-format' and 'ci-container-code-lint' containers + FROM base AS ci-container-code-format ARG LLVM_VERSION @@ -51,6 +59,8 @@ ENV PATH=${LLVM_SYSROOT}/bin:${PATH} COPY llvm/utils/git/requirements_formatting.txt requirements_formatting.txt RUN pip install -r requirements_formatting.txt --break-system-packages && \ rm requirements_formatting.txt +USER gha +WORKDIR /home/gha FROM base AS ci-container-code-lint @@ -80,3 +90,5 @@ RUN apt-get update && \ COPY llvm/utils/git/requirements_linting.txt requirements_linting.txt RUN pip install -r requirements_linting.txt --break-system-packages && \ rm requirements_linting.txt +USER gha +WORKDIR /home/gha diff --git a/.github/workflows/pr-code-format.yml b/.github/workflows/pr-code-format.yml index 2b85d8b..ac0689b 100644 --- a/.github/workflows/pr-code-format.yml +++ b/.github/workflows/pr-code-format.yml @@ -25,14 +25,6 @@ jobs: with: fetch-depth: 2 - # We need to set the repo checkout as safe, otherwise tj-actions/changed-files - # will fail due to the changed ownership inside the container. - # TODO(boomanaiden154): We should probably fix this by having the default user - # in the container have the same ID as the GHA user on the host. - - name: Set Safe Directory - run: | - chown -R root $(pwd) - - name: Get changed files id: changed-files uses: tj-actions/changed-files@ed68ef82c095e0d48ec87eccea555d944a631a4c # v46.0.5 diff --git a/.github/workflows/pr-code-lint.yml b/.github/workflows/pr-code-lint.yml index e67b518..8ba93787 100644 --- a/.github/workflows/pr-code-lint.yml +++ b/.github/workflows/pr-code-lint.yml @@ -31,11 +31,6 @@ jobs: with: fetch-depth: 2 - # FIXME: same as in ".github/workflows/pr-code-format.yml" - - name: Set Safe Directory - run: | - chown -R root $(pwd) - - name: Get changed files id: changed-files uses: tj-actions/changed-files@ed68ef82c095e0d48ec87eccea555d944a631a4c # v46.0.5 diff --git a/.github/workflows/release-binaries.yml b/.github/workflows/release-binaries.yml index 3f2eb3a..512eacc 100644 --- a/.github/workflows/release-binaries.yml +++ b/.github/workflows/release-binaries.yml @@ -141,15 +141,12 @@ jobs: target_cmake_flags="$target_cmake_flags -DBOOTSTRAP_BOOTSTRAP_DARWIN_osx_ARCHS=$arches -DBOOTSTRAP_BOOTSTRAP_DARWIN_osx_BUILTIN_ARCHS=$arches" fi - build_flang="true" - if [ "$RUNNER_OS" = "Windows" ]; then # The build times out on Windows, so we need to disable LTO. target_cmake_flags="$target_cmake_flags -DLLVM_RELEASE_ENABLE_LTO=OFF" fi echo "target-cmake-flags=$target_cmake_flags" >> $GITHUB_OUTPUT - echo "build-flang=$build_flang" >> $GITHUB_OUTPUT case "${{ inputs.runs-on }}" in ubuntu-22.04*) build_runs_on="depot-${{ inputs.runs-on }}-16" diff --git a/clang/docs/UsersManual.rst b/clang/docs/UsersManual.rst index e82b16f..fb22ad3 100644 --- a/clang/docs/UsersManual.rst +++ b/clang/docs/UsersManual.rst @@ -11,7 +11,7 @@ Introduction ============ The Clang Compiler is an open-source compiler for the C family of -programming languages, aiming to be the best in class implementation of +programming languages, aiming to be the best-in-class implementation of these languages. Clang builds on the LLVM optimizer and code generator, allowing it to provide high-quality optimization and code generation support for many targets. For more general information, please see the @@ -56,7 +56,7 @@ migration from GCC to Clang. In most cases, code "just works". Clang also provides an alternative driver, :ref:`clang-cl`, that is designed to be compatible with the Visual C++ compiler, cl.exe. -In addition to language specific features, Clang has a variety of +In addition to language-specific features, Clang has a variety of features that depend on what CPU architecture or operating system is being compiled for. Please see the :ref:`Target-Specific Features and Limitations <target_features>` section for more details. @@ -299,7 +299,7 @@ output format of the diagnostics that it generates. This option controls the output format of the filename, line number, and column printed in diagnostic messages. The options, and their - affect on formatting a simple conversion diagnostic, follow: + effect on formatting a simple conversion diagnostic, follow: **clang** (default) :: @@ -360,7 +360,7 @@ output format of the diagnostics that it generates. t.c:3:11: warning: conversion specifies type 'char *' but the argument has type 'int' [-Wformat,Format String] This category can be used by clients that want to group diagnostics - by category, so it should be a high level category. We want dozens + by category, so it should be a high-level category. We want dozens of these, not hundreds or thousands of them. .. _opt_fsave-optimization-record: @@ -750,7 +750,7 @@ control the crash diagnostics. Disable auto-generation of preprocessed source files during a clang crash. - The -fno-crash-diagnostics flag can be helpful for speeding the process + The ``-fno-crash-diagnostics`` flag can be helpful for speeding the process of generating a delta reduced test case. .. option:: -fcrash-diagnostics-dir=<dir> @@ -779,7 +779,7 @@ Options to Emit Optimization Reports ------------------------------------ Optimization reports trace, at a high-level, all the major decisions -done by compiler transformations. For instance, when the inliner +made by compiler transformations. For instance, when the inliner decides to inline function ``foo()`` into ``bar()``, or the loop unroller decides to unroll a loop N times, or the vectorizer decides to vectorize a loop body. @@ -845,11 +845,11 @@ compilations steps. .. option:: -fproc-stat-report= - This option requests driver to print used memory and execution time of each + This option requests the driver to print used memory and execution time of each compilation step. The ``clang`` driver during execution calls different tools, like compiler, assembler, linker etc. With this option the driver reports total execution time, the execution time spent in user mode and peak memory - usage of each the called tool. Value of the option specifies where the report + usage of each called tool. Value of the option specifies where the report is sent to. If it specifies a regular file, the data are saved to this file in CSV format: @@ -869,7 +869,7 @@ compilations steps. * peak memory usage in Kb. It is possible to specify this option without any value. In this case statistics - are printed on standard output in human readable format: + are printed on standard output in human-readable format: .. code-block:: console @@ -884,7 +884,7 @@ compilations steps. You can also use environment variables to control the process statistics reporting. Setting ``CC_PRINT_PROC_STAT`` to ``1`` enables the feature, the report goes to - stdout in human readable format. + stdout in human-readable format. Setting ``CC_PRINT_PROC_STAT_FILE`` to a fully qualified file path makes it report process statistics to the given file in the CSV format. Specifying a relative path will likely lead to multiple files with the same name created in different @@ -922,7 +922,7 @@ Clang options that don't fit neatly into other categories. most filenames can be written to the file without any special formatting. Different Make tools will treat different sets of characters as "special" and use different conventions for telling the Make tool that the character - is actually part of the filename. Normally Clang uses backslash to "escape" + is actually part of the filename. Normally, Clang uses backslash to "escape" a special character, which is the convention used by GNU Make. The -MV option tells Clang to put double-quotes around the entire filename, which is the convention used by NMake and Jom. @@ -957,7 +957,7 @@ Configuration files Configuration files group command-line options and allow all of them to be specified just by referencing the configuration file. They may be used, for -example, to collect options required to tune compilation for particular +example, to collect options required to tune compilation for a particular target, such as ``-L``, ``-I``, ``-l``, ``--sysroot``, codegen options, etc. Configuration files can be either specified on the command line or loaded @@ -986,7 +986,7 @@ either during build or during runtime. At build time, use ``CLANG_CONFIG_FILE_USER_DIR`` and ``CLANG_CONFIG_FILE_SYSTEM_DIR``. At run time use the ``--config-user-dir=`` and ``--config-system-dir=`` command line options. Specifying config directories at runtime overrides the config -directories set at build time The first file found is used. It is an error if +directories set at build time. The first file found is used. It is an error if the required file cannot be found. The default configuration files are searched for in the same directories @@ -996,7 +996,7 @@ the ``--no-default-config`` flag. First, the algorithm searches for a configuration file named ``<triple>-<driver>.cfg`` where `triple` is the triple for the target being -built for, and `driver` is the name of the currently used driver. The algorithm +built, and `driver` is the name of the currently used driver. The algorithm first attempts to use the canonical name for the driver used, then falls back to the one found in the executable name. @@ -1047,7 +1047,7 @@ It is not an error if either of these files is not found. The configuration file consists of command-line options specified on one or more lines. Lines composed of whitespace characters only are ignored as well as lines in which the first non-blank character is ``#``. Long options may be split -between several lines by a trailing backslash. Here is example of a +between several lines by a trailing backslash. Here is an example of a configuration file: :: @@ -1229,7 +1229,7 @@ Clang also allows you to push and pop the current warning state. This is particularly useful when writing a header file that will be compiled by other people, because you don't know what warning flags they build with. -In the below example :option:`-Wextra-tokens` is ignored for only a single line +In the example below, :option:`-Wextra-tokens` is ignored for only a single line of code, after which the diagnostics return to whatever state had previously existed. @@ -1253,7 +1253,7 @@ of warnings, so even when using GCC-compatible #pragmas there is no guarantee that they will have identical behaviour on both compilers. Clang also doesn't yet support GCC behavior for ``#pragma diagnostic pop`` -that doesn't have a corresponding ``#pragma diagnostic push``. In this case +that doesn't have a corresponding ``#pragma diagnostic push``. In this case, GCC pretends that there is a ``#pragma diagnostic push`` at the very beginning of the source file, so "unpaired" ``#pragma diagnostic pop`` matches that implicit push. This makes a difference for ``#pragma GCC diagnostic ignored`` @@ -1406,7 +1406,7 @@ project even if there are violations in some headers. # directory. But it'll still complain for all the other sources, e.g: $ cat foo/bar.cc #include "dir/include.h" // Clang flags unused declarations here. - #include "foo/include.h" // but unused warnings under this source is omitted. + #include "foo/include.h" // but unused warnings under this source are omitted. #include "next_to_bar_cc.h" // as are unused warnings from this header file. // Further, unused warnings in the remainder of bar.cc are also omitted. @@ -1648,7 +1648,7 @@ for more details. .. option:: -fno-fast-math - Disable fast-math mode. This options disables unsafe floating-point + Disable fast-math mode. This option disables unsafe floating-point optimizations by preventing the compiler from making any transformations that could affect the results. @@ -1766,7 +1766,7 @@ for more details. * ``fast``: enable fusion across statements disregarding pragmas, breaking compliance with the C and C++ standards (default for CUDA). - * ``on``: enable C and C++ standard complaint fusion in the same statement + * ``on``: enable C and C++ standard compliant fusion in the same statement unless dictated by pragmas (default for languages other than CUDA/HIP) * ``off``: disable fusion * ``fast-honor-pragmas``: fuse across statements unless dictated by pragmas @@ -1919,7 +1919,7 @@ for more details. a single expression of the code. Valid values are: ``source``, ``double``, and ``extended``. - For 64-bit targets, the default value is ``source``. For 32-bit x86 targets + For 64-bit targets, the default value is ``source``. For 32-bit x86 targets, however, in the case of NETBSD 6.99.26 and under, the default value is ``double``; in the case of NETBSD greater than 6.99.26, with NoSSE, the default value is ``extended``, with SSE the default value is ``source``. @@ -3881,9 +3881,9 @@ See :doc:`LanguageExtensions`. Differences between various standard modes ------------------------------------------ -clang supports the -std option, which changes what language mode clang uses. +clang supports the ``-std`` option, which changes what language mode clang uses. The supported modes for C are c89, gnu89, c94, c99, gnu99, c11, gnu11, c17, -gnu17, c23, gnu23, c2y, gnu2y, and various aliases for those modes. If no -std +gnu17, c23, gnu23, c2y, gnu2y, and various aliases for those modes. If no ``-std`` option is specified, clang defaults to gnu17 mode. Many C99 and C11 features are supported in earlier modes as a conforming extension, with a warning. Use ``-pedantic-errors`` to request an error if a feature from a later standard @@ -4609,7 +4609,7 @@ codebases. On ``x86_64-mingw32``, passing i128(by value) is incompatible with the Microsoft x64 calling convention. You might need to tweak -``WinX86_64ABIInfo::classify()`` in lib/CodeGen/Targets/X86.cpp. +``WinX86_64ABIInfo::classify()`` in ``lib/CodeGen/Targets/X86.cpp``. For the X86 target, clang supports the `-m16` command line argument which enables 16-bit code output. This is broadly similar to @@ -4760,8 +4760,8 @@ is imported, the linker will generate fixup code for reading or writing to the variable. When multiple toc-data options are used, the last option used has the affect. -For example: -mno-tocdata=g5,g1 -mtocdata=g1,g2 -mno-tocdata=g2 -mtocdata=g3,g4 -results in -mtocdata=g1,g3,g4 +For example: ``-mno-tocdata=g5,g1 -mtocdata=g1,g2 -mno-tocdata=g2 -mtocdata=g3,g4`` +results in ``-mtocdata=g1,g3,g4`` Names of variables not having external linkage will be ignored. @@ -5143,16 +5143,16 @@ Execute ``clang-cl /?`` to see a list of supported options: Instrument only functions from files where names match any regex separated by a semi-colon -fprofile-generate=<dirname> Generate instrumented code to collect execution counts into a raw profile file in the directory specified by the argument. The filename uses default_%m.profraw pattern - (overridden by LLVM_PROFILE_FILE env var) + (overridden by ``LLVM_PROFILE_FILE`` env var) -fprofile-generate Generate instrumented code to collect execution counts into default_%m.profraw file - (overridden by '=' form of option or LLVM_PROFILE_FILE env var) + (overridden by '=' form of option or ``LLVM_PROFILE_FILE`` env var) -fprofile-instr-generate=<file_name_pattern> Generate instrumented code to collect execution counts into the file whose name pattern is specified as the argument - (overridden by LLVM_PROFILE_FILE env var) + (overridden by ``LLVM_PROFILE_FILE`` env var) -fprofile-instr-generate Generate instrumented code to collect execution counts into default.profraw file - (overridden by '=' form of option or LLVM_PROFILE_FILE env var) + (overridden by '=' form of option or ``LLVM_PROFILE_FILE`` env var) -fprofile-instr-use=<value> Use instrumentation data for coverage testing or profile-guided optimization -fprofile-use=<value> diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td b/clang/include/clang/Basic/DiagnosticSemaKinds.td index 13f0d59..6087893 100644 --- a/clang/include/clang/Basic/DiagnosticSemaKinds.td +++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td @@ -2418,9 +2418,9 @@ def err_init_conversion_failed : Error< "cannot initialize %select{a variable|a parameter|template parameter|" "return object|statement expression result|an " "exception object|a member subobject|an array element|a new value|a value|a " - "base class|a constructor delegation|a vector element|a block element|a " - "block element|a complex element|a lambda capture|a compound literal " - "initializer|a related result|a parameter of CF audited function|a " + "base class|a constructor delegation|a vector element|a matrix element|a " + "block element|a block element|a complex element|a lambda capture|a compound" + " literal initializer|a related result|a parameter of CF audited function|a " "structured binding|a member subobject}0 " "%diff{of type $ with an %select{rvalue|lvalue}2 of type $|" "with an %select{rvalue|lvalue}2 of incompatible type}1,3" @@ -6549,9 +6549,9 @@ def warn_extern_init : Warning<"'extern' variable has an initializer">, def err_variable_object_no_init : Error< "variable-sized object may not be initialized">; def err_excess_initializers : Error< - "excess elements in %select{array|vector|scalar|union|struct}0 initializer">; + "excess elements in %select{array|vector|matrix|scalar|union|struct}0 initializer">; def ext_excess_initializers : ExtWarn< - "excess elements in %select{array|vector|scalar|union|struct}0 initializer">, + "excess elements in %select{array|vector|matrix|scalar|union|struct}0 initializer">, InGroup<ExcessInitializers>; def err_excess_initializers_for_sizeless_type : Error< "excess elements in initializer for indivisible sizeless type %0">; @@ -13148,6 +13148,7 @@ def err_riscv_attribute_interrupt_requires_extension : Error< "RISC-V 'interrupt' attribute '%0' requires extension '%1'">; def err_riscv_attribute_interrupt_invalid_combination : Error< "RISC-V 'interrupt' attribute contains invalid combination of interrupt types">; +def err_riscv_builtin_invalid_twiden : Error<"RISC-V XSfmm twiden must be 1, 2 or 4">; def err_std_source_location_impl_not_found : Error< "'std::source_location::__impl' was not found; it must be defined before '__builtin_source_location' is called">; diff --git a/clang/include/clang/Basic/riscv_sifive_vector.td b/clang/include/clang/Basic/riscv_sifive_vector.td index 772fd3e..89e644a 100644 --- a/clang/include/clang/Basic/riscv_sifive_vector.td +++ b/clang/include/clang/Basic/riscv_sifive_vector.td @@ -14,6 +14,10 @@ include "riscv_vector_common.td" +class IsFloat<string type> { + bit val = !or(!eq(type, "x"), !eq(type, "f"), !eq(type, "d"), !eq(type, "y")); +} + //===----------------------------------------------------------------------===// // Instruction definitions //===----------------------------------------------------------------------===// @@ -198,3 +202,169 @@ let ManualCodegen = [{ defm sf_vfnrclip_xu_f_qf : RVVVFNRCLIPBuiltinSet<"Uv", "UvFqf", "c">; } } + +multiclass RVVSFTileLoadStoreBuiltinSet<list<string> types, + list<string> RequiredFeatures = []> { + let OverloadedName = NAME, + Name = NAME, + IRName = NAME, + Log2LMUL = [0], + HasMasked = false, + ManualCodegen = [{IntrinsicTypes = {Ops.back()->getType()};}] in + foreach type = types in { + let RequiredFeatures = !listconcat(RequiredFeatures, + !cond(!eq(type, "x"): ["zvfhmin"], + !eq(type, "y"): ["zvfbfmin"], + true: []<string>)) in { + def : RVVBuiltin<"e", "0zPCe", type>; + if !not(IsFloat<type>.val) then + def : RVVBuiltin<"Ue", "0zPCUe", type>; + } + } +} + +multiclass RVVSFTileMoveBuiltinSet<list<list<string>> suffixes_prototypes, + list<int> intrinsic_types, + string type, + list<string> RequiredFeatures = []> { + foreach sp = suffixes_prototypes in + let RequiredFeatures = !listconcat(RequiredFeatures, + !cond(!eq(type, "x"): ["zvfhmin"], + !eq(type, "y"): ["zvfbfmin"], + true: []<string>)), + SupportOverloading = false, + HasMasked = false, + Name = NAME, + IRName = NAME, + HasVL = true, + Log2LMUL = [3], + IntrinsicTypes = intrinsic_types in + def : RVVBuiltin<sp[0], sp[1], type>; +} + +multiclass RVVSFTileMoveVTBuiltinSet<list<string> RequiredFeatures = []> { + foreach type = ["c", "s", "i", "l"] in + defm NAME : + RVVSFTileMoveBuiltinSet<[["v", "vz"], ["Uv", "Uvz"]], [-1], type, + RequiredFeatures>; + foreach type = ["x", "y", "f", "d"] in + defm NAME : + RVVSFTileMoveBuiltinSet<[["v", "vz"]], [-1], type, RequiredFeatures>; +} + +multiclass RVVSFTileMoveTVBuiltinSet<list<string> RequiredFeatures = []> { + let SupportOverloading = true, OverloadedName = NAME in { + foreach type = ["c", "s", "i", "l"] in + defm NAME : + RVVSFTileMoveBuiltinSet<[["v", "0zv"], ["Uv", "0zUv"]], [1], type, + RequiredFeatures>; + foreach type = ["x", "y", "f", "d"] in + defm NAME : + RVVSFTileMoveBuiltinSet<[["v", "0zv"]], [1], type, RequiredFeatures>; + } +} + +multiclass RVVOp0Op1Op2BuiltinSet<string intrinsic_name, string type_range, + list<list<string>> suffixes_prototypes> + : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [0, 1, 2]>; + +multiclass RVVSFMatMulBuiltinSet<string prototype, string suffix, + string type_range, list<int> widens> { + foreach widen = widens in + let OverloadedName = NAME, + TWiden = widen, + HasVL = false, + Log2LMUL = [3], + HasMasked = false in + defm NAME : RVVOp0Op1Op2BuiltinSet<NAME, type_range, + [[!strconcat("w", !cast<string>(widen)), suffix, prototype]]>; +} + +multiclass RVVSFMatMulFloatBuiltinSet<string name, string prototype, string suffix, + list<string> type_range, int widen> { + // Currently the XSfmm spec doesn't support w8. + foreach type = type_range in + let OverloadedName = name # !strconcat("_w", !cast<string>(widen)), + TWiden = widen, + HasVL = false, + Log2LMUL = [3], + Name = name # "_" # !strconcat("w", !cast<string>(widen)), + HasMasked = false in + defm : RVVOp0Op1BuiltinSet<name, type, [["", suffix, prototype]]>; +} + +multiclass RVVSFVTZeroBuiltinSet { + let SupportOverloading = false, + HasVL = false, + HasMasked = false, + Name = NAME, + IRName = NAME, + Log2LMUL = [0] in + defm : RVVOp0BuiltinSet<NAME, "i", [["", "", "0Kzzzzz"]]>; +} + +multiclass RVVSFVTDiscardBuiltinSet { + let SupportOverloading = false, + HasVL = false, + HasMasked = false, + Name = NAME, + IRName = NAME, + Log2LMUL = [0] in + defm : RVVBuiltinSet<NAME, "i", [["", "", "0"]], []>; +} + +let RequiredFeatures = ["xsfmmbase"] in { + let SupportOverloading = false, + HasVL = false, + HasMasked = false, + Log2LMUL = [0], + ManualCodegen = [{IntrinsicTypes = {ResultType};}] in // Set XLEN type + { + // let HasBuiltinAlias = false in + def sf_vsettnt : RVVBuiltin<"", "zzKzKz", "i">; + def sf_vsettm : RVVBuiltin<"", "zzKzKz", "i">; + let IRName = "sf_vsettnt" in + def sf_vsettn : RVVBuiltin<"", "zzKzKz", "i">; + def sf_vsettk : RVVBuiltin<"", "zzKzKz", "i">; + } + defm sf_vtzero_t : RVVSFVTZeroBuiltinSet; + defm sf_vtdiscard : RVVSFVTDiscardBuiltinSet; +} + +defm sf_vtmv_v_t : RVVSFTileMoveVTBuiltinSet<["xsfmmbase"]>; +defm sf_vtmv_t_v : RVVSFTileMoveTVBuiltinSet<["xsfmmbase"]>; + +defm sf_vlte8 : RVVSFTileLoadStoreBuiltinSet<["c"], ["xsfmmbase"]>; +defm sf_vlte16 : RVVSFTileLoadStoreBuiltinSet<["s", "x", "y"], ["xsfmmbase"]>; +defm sf_vlte32 : RVVSFTileLoadStoreBuiltinSet<["i", "f"], ["xsfmmbase"]>; +defm sf_vlte64 : RVVSFTileLoadStoreBuiltinSet<["l", "d"], ["xsfmmbase"]>; + +defm sf_vste8 : RVVSFTileLoadStoreBuiltinSet<["c"], ["xsfmmbase"]>; +defm sf_vste16 : RVVSFTileLoadStoreBuiltinSet<["s", "x", "y"], ["xsfmmbase"]>; +defm sf_vste32 : RVVSFTileLoadStoreBuiltinSet<["i", "f"], ["xsfmmbase"]>; +defm sf_vste64 : RVVSFTileLoadStoreBuiltinSet<["l", "d"], ["xsfmmbase"]>; + +let RequiredFeatures = ["xsfmm32a8i"] in { + defm sf_mm_u_u : RVVSFMatMulBuiltinSet<"0KzUvUvzzz", "UvUv", "c", [4]>; + defm sf_mm_s_u : RVVSFMatMulBuiltinSet<"0KzvUvzzz", "vUv", "c", [4]>; + defm sf_mm_u_s : RVVSFMatMulBuiltinSet<"0KzUvvzzz", "Uvv", "c", [4]>; + defm sf_mm_s_s : RVVSFMatMulBuiltinSet<"0Kzvvzzz", "vv", "c", [4]>; + +} + +let RequiredFeatures = ["xsfmm32a16f"] in + defm : RVVSFMatMulFloatBuiltinSet<"sf_mm_f_f", "0Kzvvzzz", "v", ["x", "y"], 2>; + +let RequiredFeatures = ["xsfmm32a32f"] in + defm : RVVSFMatMulFloatBuiltinSet<"sf_mm_f_f", "0Kzvvzzz", "v", ["f"], 1>; + +let RequiredFeatures = ["xsfmm32a8f"] in + foreach e1 = [5, 4] in + foreach e2 = [5, 4] in + let OverloadedName = "sf_mm_e" # e1 # "m" # !sub(7, e1) # "_e" # e2 # "m" # !sub(7, e2) in + defm : RVVSFMatMulFloatBuiltinSet< + "sf_mm_e" # e1 # "m" # !sub(7, e1) # "_e" # e2 # "m" # !sub(7, e2), + "0KzUvUvzzz", "UvUv", ["c"], 4>; + +let RequiredFeatures = ["xsfmm64a64f"] in + defm : RVVSFMatMulFloatBuiltinSet<"sf_mm_f_f", "0Kzvvzzz", "v", ["d"], 1>; diff --git a/clang/include/clang/Basic/riscv_vector_common.td b/clang/include/clang/Basic/riscv_vector_common.td index eaa2ba4..7e2d339 100644 --- a/clang/include/clang/Basic/riscv_vector_common.td +++ b/clang/include/clang/Basic/riscv_vector_common.td @@ -247,6 +247,9 @@ class RVVBuiltin<string suffix, string prototype, string type_range, // Set to true if the builtin has a parameter that models floating-point // rounding mode control bit HasFRMRoundModeOp = false; + + // TWiden for XSfmm. + int TWiden = 0; } // This is the code emitted in the header. diff --git a/clang/include/clang/CIR/MissingFeatures.h b/clang/include/clang/CIR/MissingFeatures.h index 369ac3d..48ef8be 100644 --- a/clang/include/clang/CIR/MissingFeatures.h +++ b/clang/include/clang/CIR/MissingFeatures.h @@ -150,11 +150,9 @@ struct MissingFeatures { static bool zeroSizeRecordMembers() { return false; } // Coroutines - static bool coroAllocBuiltinCall() { return false; } - static bool coroBeginBuiltinCall() { return false; } static bool coroEndBuiltinCall() { return false; } - static bool coroSizeBuiltinCall() { return false; } static bool coroutineFrame() { return false; } + static bool emitBodyAndFallthrough() { return false; } // Various handling of deferred processing in CIRGenModule. static bool cgmRelease() { return false; } diff --git a/clang/include/clang/Sema/Initialization.h b/clang/include/clang/Sema/Initialization.h index 5e96317..0e2891f 100644 --- a/clang/include/clang/Sema/Initialization.h +++ b/clang/include/clang/Sema/Initialization.h @@ -91,6 +91,10 @@ public: /// or vector. EK_VectorElement, + /// The entity being initialized is an element of a matrix. + /// or matrix. + EK_MatrixElement, + /// The entity being initialized is a field of block descriptor for /// the copied-in c++ object. EK_BlockElement, @@ -205,8 +209,8 @@ private: /// virtual base. llvm::PointerIntPair<const CXXBaseSpecifier *, 1> Base; - /// When Kind == EK_ArrayElement, EK_VectorElement, or - /// EK_ComplexElement, the index of the array or vector element being + /// When Kind == EK_ArrayElement, EK_VectorElement, EK_MatrixElement, + /// or EK_ComplexElement, the index of the array or vector element being /// initialized. unsigned Index; @@ -536,7 +540,7 @@ public: /// element's index. unsigned getElementIndex() const { assert(getKind() == EK_ArrayElement || getKind() == EK_VectorElement || - getKind() == EK_ComplexElement); + getKind() == EK_MatrixElement || getKind() == EK_ComplexElement); return Index; } @@ -544,7 +548,7 @@ public: /// element, sets the element index. void setElementIndex(unsigned Index) { assert(getKind() == EK_ArrayElement || getKind() == EK_VectorElement || - getKind() == EK_ComplexElement); + getKind() == EK_MatrixElement || getKind() == EK_ComplexElement); this->Index = Index; } diff --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h index 189798f..52904c72 100644 --- a/clang/include/clang/Sema/Sema.h +++ b/clang/include/clang/Sema/Sema.h @@ -2681,11 +2681,6 @@ public: /// function without this attribute. bool DiscardingCFIUncheckedCallee(QualType From, QualType To) const; - /// Returns true if `From` is a function or pointer to a function without the - /// `cfi_unchecked_callee` attribute but `To` is a function or pointer to - /// function with this attribute. - bool AddingCFIUncheckedCallee(QualType From, QualType To) const; - /// This function calls Action when it determines that E designates a /// misaligned member due to the packed attribute. This is used to emit /// local diagnostics like in reference binding. diff --git a/clang/include/clang/Support/RISCVVIntrinsicUtils.h b/clang/include/clang/Support/RISCVVIntrinsicUtils.h index 29a07f1..67149f2 100644 --- a/clang/include/clang/Support/RISCVVIntrinsicUtils.h +++ b/clang/include/clang/Support/RISCVVIntrinsicUtils.h @@ -402,6 +402,7 @@ private: std::vector<int64_t> IntrinsicTypes; unsigned NF = 1; Policy PolicyAttrs; + unsigned TWiden = 0; public: RVVIntrinsic(llvm::StringRef Name, llvm::StringRef Suffix, @@ -410,8 +411,8 @@ public: bool HasVL, PolicyScheme Scheme, bool SupportOverloading, bool HasBuiltinAlias, llvm::StringRef ManualCodegen, const RVVTypes &Types, - const std::vector<int64_t> &IntrinsicTypes, - unsigned NF, Policy PolicyAttrs, bool HasFRMRoundModeOp); + const std::vector<int64_t> &IntrinsicTypes, unsigned NF, + Policy PolicyAttrs, bool HasFRMRoundModeOp, unsigned TWiden); ~RVVIntrinsic() = default; RVVTypePtr getOutputType() const { return OutputType; } @@ -435,6 +436,7 @@ public: llvm::StringRef getManualCodegen() const { return ManualCodegen; } PolicyScheme getPolicyScheme() const { return Scheme; } unsigned getNF() const { return NF; } + unsigned getTWiden() const { return TWiden; } const std::vector<int64_t> &getIntrinsicTypes() const { return IntrinsicTypes; } diff --git a/clang/lib/AST/StmtOpenACC.cpp b/clang/lib/AST/StmtOpenACC.cpp index 462a10d..39dfa19 100644 --- a/clang/lib/AST/StmtOpenACC.cpp +++ b/clang/lib/AST/StmtOpenACC.cpp @@ -326,16 +326,30 @@ OpenACCAtomicConstruct *OpenACCAtomicConstruct::Create( static std::pair<const Expr *, const Expr *> getBinaryOpArgs(const Expr *Op) { if (const auto *BO = dyn_cast<BinaryOperator>(Op)) { - assert(BO->getOpcode() == BO_Assign); + assert(BO->isAssignmentOp()); return {BO->getLHS(), BO->getRHS()}; } const auto *OO = cast<CXXOperatorCallExpr>(Op); - assert(OO->getOperator() == OO_Equal); - + assert(OO->isAssignmentOp()); return {OO->getArg(0), OO->getArg(1)}; } +static std::pair<bool, const Expr *> getUnaryOpArgs(const Expr *Op) { + if (const auto *UO = dyn_cast<UnaryOperator>(Op)) + return {true, UO->getSubExpr()}; + + if (const auto *OpCall = dyn_cast<CXXOperatorCallExpr>(Op)) { + // Post-inc/dec have a second unused argument to differentiate it, so we + // accept -- or ++ as unary, or any operator call with only 1 arg. + if (OpCall->getNumArgs() == 1 || OpCall->getOperator() != OO_PlusPlus || + OpCall->getOperator() != OO_MinusMinus) + return {true, OpCall->getArg(0)}; + } + + return {false, nullptr}; +} + const OpenACCAtomicConstruct::StmtInfo OpenACCAtomicConstruct::getAssociatedStmtInfo() const { // This ends up being a vastly simplified version of SemaOpenACCAtomic, since @@ -343,18 +357,17 @@ OpenACCAtomicConstruct::getAssociatedStmtInfo() const { // asserts to ensure we don't get off into the weeds. assert(getAssociatedStmt() && "invalid associated stmt?"); + const Expr *AssocStmt = cast<const Expr>(getAssociatedStmt()); switch (AtomicKind) { - case OpenACCAtomicKind::None: - case OpenACCAtomicKind::Update: case OpenACCAtomicKind::Capture: - assert(false && "Only 'read'/'write' have been implemented here"); + assert(false && "Only 'read'/'write'/'update' have been implemented here"); return {}; case OpenACCAtomicKind::Read: { // Read only supports the format 'v = x'; where both sides are a scalar // expression. This can come in 2 forms; BinaryOperator or // CXXOperatorCallExpr (rarely). std::pair<const Expr *, const Expr *> BinaryArgs = - getBinaryOpArgs(cast<const Expr>(getAssociatedStmt())); + getBinaryOpArgs(AssocStmt); // We want the L-value for each side, so we ignore implicit casts. return {BinaryArgs.first->IgnoreImpCasts(), BinaryArgs.second->IgnoreImpCasts(), /*expr=*/nullptr}; @@ -364,13 +377,28 @@ OpenACCAtomicConstruct::getAssociatedStmtInfo() const { // type, and 'x' is a scalar l value. As above, this can come in 2 forms; // Binary Operator or CXXOperatorCallExpr. std::pair<const Expr *, const Expr *> BinaryArgs = - getBinaryOpArgs(cast<const Expr>(getAssociatedStmt())); + getBinaryOpArgs(AssocStmt); // We want the L-value for ONLY the X side, so we ignore implicit casts. For // the right side (the expr), we emit it as an r-value so we need to // maintain implicit casts. return {/*v=*/nullptr, BinaryArgs.first->IgnoreImpCasts(), BinaryArgs.second}; } + case OpenACCAtomicKind::None: + case OpenACCAtomicKind::Update: { + std::pair<bool, const Expr *> UnaryArgs = getUnaryOpArgs(AssocStmt); + if (UnaryArgs.first) + return {/*v=*/nullptr, UnaryArgs.second->IgnoreImpCasts(), + /*expr=*/nullptr}; + + std::pair<const Expr *, const Expr *> BinaryArgs = + getBinaryOpArgs(AssocStmt); + // For binary args, we just store the RHS as an expression (in the + // expression slot), since the codegen just wants the whole thing for a + // recipe. + return {/*v=*/nullptr, BinaryArgs.first->IgnoreImpCasts(), + BinaryArgs.second}; + } } llvm_unreachable("unknown OpenACC atomic kind"); diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp index 62fa04e..e35100f 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp @@ -449,10 +449,15 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID, } case Builtin::BI__builtin_coro_free: case Builtin::BI__builtin_coro_size: { - cgm.errorNYI(e->getSourceRange(), - "BI__builtin_coro_free, BI__builtin_coro_size NYI"); - assert(!cir::MissingFeatures::coroSizeBuiltinCall()); - return getUndefRValue(e->getType()); + GlobalDecl gd{fd}; + mlir::Type ty = cgm.getTypes().getFunctionType( + cgm.getTypes().arrangeGlobalDeclaration(gd)); + const auto *nd = cast<NamedDecl>(gd.getDecl()); + cir::FuncOp fnOp = + cgm.getOrCreateCIRFunction(nd->getName(), ty, gd, /*ForVTable=*/false); + fnOp.setBuiltin(true); + return emitCall(e->getCallee()->getType(), CIRGenCallee::forDirect(fnOp), e, + returnValue); } case Builtin::BI__builtin_prefetch: { auto evaluateOperandAsInt = [&](const Expr *arg) { diff --git a/clang/lib/CIR/CodeGen/CIRGenCall.cpp b/clang/lib/CIR/CodeGen/CIRGenCall.cpp index 88aef89..50d4c03 100644 --- a/clang/lib/CIR/CodeGen/CIRGenCall.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenCall.cpp @@ -671,9 +671,12 @@ RValue CIRGenFunction::emitCall(const CIRGenFunctionInfo &funcInfo, return RValue::get(results[0]); } - case cir::TEK_Complex: - cgm.errorNYI(loc, "unsupported evaluation kind of function call result"); - return getUndefRValue(retTy); + case cir::TEK_Complex: { + mlir::ResultRange results = theCall->getOpResults(); + assert(!results.empty() && + "Expected at least one result for complex rvalue"); + return RValue::getComplex(results[0]); + } } llvm_unreachable("Invalid evaluation kind"); } diff --git a/clang/lib/CIR/CodeGen/CIRGenCleanup.h b/clang/lib/CIR/CodeGen/CIRGenCleanup.h index 9acf8b1..61a09a5 100644 --- a/clang/lib/CIR/CodeGen/CIRGenCleanup.h +++ b/clang/lib/CIR/CodeGen/CIRGenCleanup.h @@ -15,6 +15,7 @@ #define CLANG_LIB_CIR_CODEGEN_CIRGENCLEANUP_H #include "Address.h" +#include "CIRGenModule.h" #include "EHScopeStack.h" #include "mlir/IR/Value.h" @@ -257,5 +258,53 @@ inline void EHScopeStack::popCatch() { deallocate(EHCatchScope::getSizeForNumHandlers(scope.getNumHandlers())); } +/// The exceptions personality for a function. +struct EHPersonality { + const char *personalityFn = nullptr; + + // If this is non-null, this personality requires a non-standard + // function for rethrowing an exception after a catchall cleanup. + // This function must have prototype void(void*). + const char *catchallRethrowFn = nullptr; + + static const EHPersonality &get(CIRGenModule &cgm, + const clang::FunctionDecl *fd); + static const EHPersonality &get(CIRGenFunction &cgf); + + static const EHPersonality GNU_C; + static const EHPersonality GNU_C_SJLJ; + static const EHPersonality GNU_C_SEH; + static const EHPersonality GNU_ObjC; + static const EHPersonality GNU_ObjC_SJLJ; + static const EHPersonality GNU_ObjC_SEH; + static const EHPersonality GNUstep_ObjC; + static const EHPersonality GNU_ObjCXX; + static const EHPersonality NeXT_ObjC; + static const EHPersonality GNU_CPlusPlus; + static const EHPersonality GNU_CPlusPlus_SJLJ; + static const EHPersonality GNU_CPlusPlus_SEH; + static const EHPersonality MSVC_except_handler; + static const EHPersonality MSVC_C_specific_handler; + static const EHPersonality MSVC_CxxFrameHandler3; + static const EHPersonality GNU_Wasm_CPlusPlus; + static const EHPersonality XL_CPlusPlus; + static const EHPersonality ZOS_CPlusPlus; + + /// Does this personality use landingpads or the family of pad instructions + /// designed to form funclets? + bool usesFuncletPads() const { + return isMSVCPersonality() || isWasmPersonality(); + } + + bool isMSVCPersonality() const { + return this == &MSVC_except_handler || this == &MSVC_C_specific_handler || + this == &MSVC_CxxFrameHandler3; + } + + bool isWasmPersonality() const { return this == &GNU_Wasm_CPlusPlus; } + + bool isMSVCXXPersonality() const { return this == &MSVC_CxxFrameHandler3; } +}; + } // namespace clang::CIRGen #endif // CLANG_LIB_CIR_CODEGEN_CIRGENCLEANUP_H diff --git a/clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp b/clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp index c25cce4..8723a6e 100644 --- a/clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp @@ -15,6 +15,7 @@ #include "clang/AST/StmtCXX.h" #include "clang/Basic/TargetInfo.h" #include "clang/CIR/Dialect/IR/CIRTypes.h" +#include "clang/CIR/MissingFeatures.h" using namespace clang; using namespace clang::CIRGen; @@ -23,6 +24,9 @@ struct clang::CIRGen::CGCoroData { // Stores the __builtin_coro_id emitted in the function so that we can supply // it as the first argument to other builtins. cir::CallOp coroId = nullptr; + + // Stores the result of __builtin_coro_begin call. + mlir::Value coroBegin = nullptr; }; // Defining these here allows to keep CGCoroData private to this file. @@ -63,6 +67,46 @@ cir::CallOp CIRGenFunction::emitCoroIDBuiltinCall(mlir::Location loc, nullPtr, nullPtr, nullPtr}); } +cir::CallOp CIRGenFunction::emitCoroAllocBuiltinCall(mlir::Location loc) { + cir::BoolType boolTy = builder.getBoolTy(); + + mlir::Operation *builtin = cgm.getGlobalValue(cgm.builtinCoroAlloc); + + cir::FuncOp fnOp; + if (!builtin) { + fnOp = cgm.createCIRBuiltinFunction(loc, cgm.builtinCoroAlloc, + cir::FuncType::get({UInt32Ty}, boolTy), + /*fd=*/nullptr); + assert(fnOp && "should always succeed"); + } else { + fnOp = cast<cir::FuncOp>(builtin); + } + + return builder.createCallOp( + loc, fnOp, mlir::ValueRange{curCoro.data->coroId.getResult()}); +} + +cir::CallOp +CIRGenFunction::emitCoroBeginBuiltinCall(mlir::Location loc, + mlir::Value coroframeAddr) { + mlir::Operation *builtin = cgm.getGlobalValue(cgm.builtinCoroBegin); + + cir::FuncOp fnOp; + if (!builtin) { + fnOp = cgm.createCIRBuiltinFunction( + loc, cgm.builtinCoroBegin, + cir::FuncType::get({UInt32Ty, VoidPtrTy}, VoidPtrTy), + /*fd=*/nullptr); + assert(fnOp && "should always succeed"); + } else { + fnOp = cast<cir::FuncOp>(builtin); + } + + return builder.createCallOp( + loc, fnOp, + mlir::ValueRange{curCoro.data->coroId.getResult(), coroframeAddr}); +} + mlir::LogicalResult CIRGenFunction::emitCoroutineBody(const CoroutineBodyStmt &s) { mlir::Location openCurlyLoc = getLoc(s.getBeginLoc()); @@ -73,10 +117,39 @@ CIRGenFunction::emitCoroutineBody(const CoroutineBodyStmt &s) { cir::CallOp coroId = emitCoroIDBuiltinCall(openCurlyLoc, nullPtrCst); createCoroData(*this, curCoro, coroId); - assert(!cir::MissingFeatures::coroAllocBuiltinCall()); - - assert(!cir::MissingFeatures::coroBeginBuiltinCall()); + // Backend is allowed to elide memory allocations, to help it, emit + // auto mem = coro.alloc() ? 0 : ... allocation code ...; + cir::CallOp coroAlloc = emitCoroAllocBuiltinCall(openCurlyLoc); + + // Initialize address of coroutine frame to null + CanQualType astVoidPtrTy = cgm.getASTContext().VoidPtrTy; + mlir::Type allocaTy = convertTypeForMem(astVoidPtrTy); + Address coroFrame = + createTempAlloca(allocaTy, getContext().getTypeAlignInChars(astVoidPtrTy), + openCurlyLoc, "__coro_frame_addr", + /*ArraySize=*/nullptr); + + mlir::Value storeAddr = coroFrame.getPointer(); + builder.CIRBaseBuilderTy::createStore(openCurlyLoc, nullPtrCst, storeAddr); + cir::IfOp::create( + builder, openCurlyLoc, coroAlloc.getResult(), + /*withElseRegion=*/false, + /*thenBuilder=*/[&](mlir::OpBuilder &b, mlir::Location loc) { + builder.CIRBaseBuilderTy::createStore( + loc, emitScalarExpr(s.getAllocate()), storeAddr); + cir::YieldOp::create(builder, loc); + }); + curCoro.data->coroBegin = + emitCoroBeginBuiltinCall( + openCurlyLoc, + cir::LoadOp::create(builder, openCurlyLoc, allocaTy, storeAddr)) + .getResult(); + + // Handle allocation failure if 'ReturnStmtOnAllocFailure' was provided. + if (s.getReturnStmtOnAllocFailure()) + cgm.errorNYI("handle coroutine return alloc failure"); assert(!cir::MissingFeatures::generateDebugInfo()); + assert(!cir::MissingFeatures::emitBodyAndFallthrough()); return mlir::success(); } diff --git a/clang/lib/CIR/CodeGen/CIRGenException.cpp b/clang/lib/CIR/CodeGen/CIRGenException.cpp index 717a3e0..67f46ff 100644 --- a/clang/lib/CIR/CodeGen/CIRGenException.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenException.cpp @@ -18,6 +18,171 @@ using namespace clang; using namespace clang::CIRGen; +const EHPersonality EHPersonality::GNU_C = {"__gcc_personality_v0", nullptr}; +const EHPersonality EHPersonality::GNU_C_SJLJ = {"__gcc_personality_sj0", + nullptr}; +const EHPersonality EHPersonality::GNU_C_SEH = {"__gcc_personality_seh0", + nullptr}; +const EHPersonality EHPersonality::NeXT_ObjC = {"__objc_personality_v0", + nullptr}; +const EHPersonality EHPersonality::GNU_CPlusPlus = {"__gxx_personality_v0", + nullptr}; +const EHPersonality EHPersonality::GNU_CPlusPlus_SJLJ = { + "__gxx_personality_sj0", nullptr}; +const EHPersonality EHPersonality::GNU_CPlusPlus_SEH = { + "__gxx_personality_seh0", nullptr}; +const EHPersonality EHPersonality::GNU_ObjC = {"__gnu_objc_personality_v0", + "objc_exception_throw"}; +const EHPersonality EHPersonality::GNU_ObjC_SJLJ = { + "__gnu_objc_personality_sj0", "objc_exception_throw"}; +const EHPersonality EHPersonality::GNU_ObjC_SEH = { + "__gnu_objc_personality_seh0", "objc_exception_throw"}; +const EHPersonality EHPersonality::GNU_ObjCXX = { + "__gnustep_objcxx_personality_v0", nullptr}; +const EHPersonality EHPersonality::GNUstep_ObjC = { + "__gnustep_objc_personality_v0", nullptr}; +const EHPersonality EHPersonality::MSVC_except_handler = {"_except_handler3", + nullptr}; +const EHPersonality EHPersonality::MSVC_C_specific_handler = { + "__C_specific_handler", nullptr}; +const EHPersonality EHPersonality::MSVC_CxxFrameHandler3 = { + "__CxxFrameHandler3", nullptr}; +const EHPersonality EHPersonality::GNU_Wasm_CPlusPlus = { + "__gxx_wasm_personality_v0", nullptr}; +const EHPersonality EHPersonality::XL_CPlusPlus = {"__xlcxx_personality_v1", + nullptr}; +const EHPersonality EHPersonality::ZOS_CPlusPlus = {"__zos_cxx_personality_v2", + nullptr}; + +static const EHPersonality &getCPersonality(const TargetInfo &target, + const CodeGenOptions &cgOpts) { + const llvm::Triple &triple = target.getTriple(); + if (triple.isWindowsMSVCEnvironment()) + return EHPersonality::MSVC_CxxFrameHandler3; + if (cgOpts.hasSjLjExceptions()) + return EHPersonality::GNU_C_SJLJ; + if (cgOpts.hasDWARFExceptions()) + return EHPersonality::GNU_C; + if (cgOpts.hasSEHExceptions()) + return EHPersonality::GNU_C_SEH; + return EHPersonality::GNU_C; +} + +static const EHPersonality &getObjCPersonality(const TargetInfo &target, + const LangOptions &langOpts, + const CodeGenOptions &cgOpts) { + const llvm::Triple &triple = target.getTriple(); + if (triple.isWindowsMSVCEnvironment()) + return EHPersonality::MSVC_CxxFrameHandler3; + + switch (langOpts.ObjCRuntime.getKind()) { + case ObjCRuntime::FragileMacOSX: + return getCPersonality(target, cgOpts); + case ObjCRuntime::MacOSX: + case ObjCRuntime::iOS: + case ObjCRuntime::WatchOS: + return EHPersonality::NeXT_ObjC; + case ObjCRuntime::GNUstep: + if (langOpts.ObjCRuntime.getVersion() >= VersionTuple(1, 7)) + return EHPersonality::GNUstep_ObjC; + [[fallthrough]]; + case ObjCRuntime::GCC: + case ObjCRuntime::ObjFW: + if (cgOpts.hasSjLjExceptions()) + return EHPersonality::GNU_ObjC_SJLJ; + if (cgOpts.hasSEHExceptions()) + return EHPersonality::GNU_ObjC_SEH; + return EHPersonality::GNU_ObjC; + } + llvm_unreachable("bad runtime kind"); +} + +static const EHPersonality &getCXXPersonality(const TargetInfo &target, + const CodeGenOptions &cgOpts) { + const llvm::Triple &triple = target.getTriple(); + if (triple.isWindowsMSVCEnvironment()) + return EHPersonality::MSVC_CxxFrameHandler3; + if (triple.isOSAIX()) + return EHPersonality::XL_CPlusPlus; + if (cgOpts.hasSjLjExceptions()) + return EHPersonality::GNU_CPlusPlus_SJLJ; + if (cgOpts.hasDWARFExceptions()) + return EHPersonality::GNU_CPlusPlus; + if (cgOpts.hasSEHExceptions()) + return EHPersonality::GNU_CPlusPlus_SEH; + if (cgOpts.hasWasmExceptions()) + return EHPersonality::GNU_Wasm_CPlusPlus; + return EHPersonality::GNU_CPlusPlus; +} + +/// Determines the personality function to use when both C++ +/// and Objective-C exceptions are being caught. +static const EHPersonality &getObjCXXPersonality(const TargetInfo &target, + const LangOptions &langOpts, + const CodeGenOptions &cgOpts) { + if (target.getTriple().isWindowsMSVCEnvironment()) + return EHPersonality::MSVC_CxxFrameHandler3; + + switch (langOpts.ObjCRuntime.getKind()) { + // In the fragile ABI, just use C++ exception handling and hope + // they're not doing crazy exception mixing. + case ObjCRuntime::FragileMacOSX: + return getCXXPersonality(target, cgOpts); + + // The ObjC personality defers to the C++ personality for non-ObjC + // handlers. Unlike the C++ case, we use the same personality + // function on targets using (backend-driven) SJLJ EH. + case ObjCRuntime::MacOSX: + case ObjCRuntime::iOS: + case ObjCRuntime::WatchOS: + return getObjCPersonality(target, langOpts, cgOpts); + + case ObjCRuntime::GNUstep: + return EHPersonality::GNU_ObjCXX; + + // The GCC runtime's personality function inherently doesn't support + // mixed EH. Use the ObjC personality just to avoid returning null. + case ObjCRuntime::GCC: + case ObjCRuntime::ObjFW: + return getObjCPersonality(target, langOpts, cgOpts); + } + llvm_unreachable("bad runtime kind"); +} + +static const EHPersonality &getSEHPersonalityMSVC(const llvm::Triple &triple) { + return triple.getArch() == llvm::Triple::x86 + ? EHPersonality::MSVC_except_handler + : EHPersonality::MSVC_C_specific_handler; +} + +const EHPersonality &EHPersonality::get(CIRGenModule &cgm, + const FunctionDecl *fd) { + const llvm::Triple &triple = cgm.getTarget().getTriple(); + const LangOptions &langOpts = cgm.getLangOpts(); + const CodeGenOptions &cgOpts = cgm.getCodeGenOpts(); + const TargetInfo &target = cgm.getTarget(); + + // Functions using SEH get an SEH personality. + if (fd && fd->usesSEHTry()) + return getSEHPersonalityMSVC(triple); + + if (langOpts.ObjC) { + return langOpts.CPlusPlus ? getObjCXXPersonality(target, langOpts, cgOpts) + : getObjCPersonality(target, langOpts, cgOpts); + } + return langOpts.CPlusPlus ? getCXXPersonality(target, cgOpts) + : getCPersonality(target, cgOpts); +} + +const EHPersonality &EHPersonality::get(CIRGenFunction &cgf) { + const auto *fg = cgf.curCodeDecl; + // For outlined finallys and filters, use the SEH personality in case they + // contain more SEH. This mostly only affects finallys. Filters could + // hypothetically use gnu statement expressions to sneak in nested SEH. + fg = fg ? fg : cgf.curSEHParent.getDecl(); + return get(cgf.cgm, dyn_cast_or_null<FunctionDecl>(fg)); +} + void CIRGenFunction::emitCXXThrowExpr(const CXXThrowExpr *e) { const llvm::Triple &triple = getTarget().getTriple(); if (cgm.getLangOpts().OpenMPIsTargetDevice && diff --git a/clang/lib/CIR/CodeGen/CIRGenFunction.h b/clang/lib/CIR/CodeGen/CIRGenFunction.h index 5f9dbdc..c3fcd1a6 100644 --- a/clang/lib/CIR/CodeGen/CIRGenFunction.h +++ b/clang/lib/CIR/CodeGen/CIRGenFunction.h @@ -120,6 +120,8 @@ public: /// Tracks function scope overall cleanup handling. EHScopeStack ehStack; + GlobalDecl curSEHParent; + llvm::DenseMap<const clang::ValueDecl *, clang::FieldDecl *> lambdaCaptureFields; clang::FieldDecl *lambdaThisCaptureField = nullptr; @@ -665,6 +667,12 @@ public: symbolTable.insert(vd, addr.getPointer()); } + // Replaces the address of the local variable, if it exists. Else does the + // same thing as setAddrOfLocalVar. + void replaceAddrOfLocalVar(const clang::VarDecl *vd, Address addr) { + localDeclMap.insert_or_assign(vd, addr); + } + // A class to allow reverting changes to a var-decl's registration to the // localDeclMap. This is used in cases where things are being inserted into // the variable list but don't follow normal lookup/search rules, like in @@ -1326,6 +1334,9 @@ public: mlir::LogicalResult emitCoroutineBody(const CoroutineBodyStmt &s); cir::CallOp emitCoroEndBuiltinCall(mlir::Location loc, mlir::Value nullPtr); cir::CallOp emitCoroIDBuiltinCall(mlir::Location loc, mlir::Value nullPtr); + cir::CallOp emitCoroAllocBuiltinCall(mlir::Location loc); + cir::CallOp emitCoroBeginBuiltinCall(mlir::Location loc, + mlir::Value coroframeAddr); void emitDestroy(Address addr, QualType type, Destroyer *destroyer); diff --git a/clang/lib/CIR/CodeGen/CIRGenModule.h b/clang/lib/CIR/CodeGen/CIRGenModule.h index 1fc116d..186913d 100644 --- a/clang/lib/CIR/CodeGen/CIRGenModule.h +++ b/clang/lib/CIR/CodeGen/CIRGenModule.h @@ -496,6 +496,8 @@ public: bool assumeConvergent = false); static constexpr const char *builtinCoroId = "__builtin_coro_id"; + static constexpr const char *builtinCoroAlloc = "__builtin_coro_alloc"; + static constexpr const char *builtinCoroBegin = "__builtin_coro_begin"; /// Given a builtin id for a function like "__builtin_fabsf", return a /// Function* for "fabsf". diff --git a/clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp b/clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp index 349b111..9e55bd5 100644 --- a/clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp @@ -304,12 +304,21 @@ CIRGenFunction::emitOpenACCCacheConstruct(const OpenACCCacheConstruct &s) { return mlir::success(); } +const VarDecl *getLValueDecl(const Expr *e) { + // We are going to assume that after stripping implicit casts, that the LValue + // is just a DRE around the var-decl. + + e = e->IgnoreImpCasts(); + + const auto *dre = cast<DeclRefExpr>(e); + return cast<VarDecl>(dre->getDecl()); +} + mlir::LogicalResult CIRGenFunction::emitOpenACCAtomicConstruct(const OpenACCAtomicConstruct &s) { - // For now, we are only support 'read'/'write', so diagnose. We can switch on - // the kind later once we start implementing the other 2 forms. While we - if (s.getAtomicKind() != OpenACCAtomicKind::Read && - s.getAtomicKind() != OpenACCAtomicKind::Write) { + // For now, we are only support 'read'/'write'/'update', so diagnose. We can + // switch on the kind later once we implement the 'capture' form. + if (s.getAtomicKind() == OpenACCAtomicKind::Capture) { cgm.errorNYI(s.getSourceRange(), "OpenACC Atomic Construct"); return mlir::failure(); } @@ -318,11 +327,10 @@ CIRGenFunction::emitOpenACCAtomicConstruct(const OpenACCAtomicConstruct &s) { // expression it is associated with rather than emitting it inside of it. So // it has custom emit logic. mlir::Location start = getLoc(s.getSourceRange().getBegin()); + mlir::Location end = getLoc(s.getSourceRange().getEnd()); OpenACCAtomicConstruct::StmtInfo inf = s.getAssociatedStmtInfo(); switch (s.getAtomicKind()) { - case OpenACCAtomicKind::None: - case OpenACCAtomicKind::Update: case OpenACCAtomicKind::Capture: llvm_unreachable("Unimplemented atomic construct type, should have " "diagnosed/returned above"); @@ -353,6 +361,50 @@ CIRGenFunction::emitOpenACCAtomicConstruct(const OpenACCAtomicConstruct &s) { s.clauses()); return mlir::success(); } + case OpenACCAtomicKind::None: + case OpenACCAtomicKind::Update: { + mlir::Value x = emitLValue(inf.X).getPointer(); + auto op = + mlir::acc::AtomicUpdateOp::create(builder, start, x, /*ifCond=*/{}); + emitOpenACCClauses(op, s.getDirectiveKind(), s.getDirectiveLoc(), + s.clauses()); + mlir::LogicalResult res = mlir::success(); + { + mlir::OpBuilder::InsertionGuard guardCase(builder); + mlir::Type argTy = cast<cir::PointerType>(x.getType()).getPointee(); + std::array<mlir::Type, 1> recipeType{argTy}; + std::array<mlir::Location, 1> recipeLoc{start}; + mlir::Block *recipeBlock = builder.createBlock( + &op.getRegion(), op.getRegion().end(), recipeType, recipeLoc); + builder.setInsertionPointToEnd(recipeBlock); + + // Since we have an initial value that we know is a scalar type, we can + // just emit the entire statement here after sneaking-in our 'alloca' in + // the right place, then loading out of it. Flang does a lot less work + // (probably does its own emitting!), but we have more complicated AST + // nodes to worry about, so we can just count on opt to remove the extra + // alloca/load/store set. + auto alloca = cir::AllocaOp::create( + builder, start, x.getType(), argTy, "x_var", + cgm.getSize(getContext().getTypeAlignInChars(inf.X->getType()))); + + alloca.setInitAttr(mlir::UnitAttr::get(&getMLIRContext())); + builder.CIRBaseBuilderTy::createStore(start, recipeBlock->getArgument(0), + alloca); + + const VarDecl *xval = getLValueDecl(inf.X); + CIRGenFunction::DeclMapRevertingRAII declMapRAII{*this, xval}; + replaceAddrOfLocalVar( + xval, Address{alloca, argTy, getContext().getDeclAlign(xval)}); + + res = emitStmt(s.getAssociatedStmt(), /*useCurrentScope=*/true); + + auto load = cir::LoadOp::create(builder, start, {alloca}); + mlir::acc::YieldOp::create(builder, end, {load}); + } + + return res; + } } llvm_unreachable("unknown OpenACC atomic kind"); diff --git a/clang/lib/CodeGen/TargetBuiltins/RISCV.cpp b/clang/lib/CodeGen/TargetBuiltins/RISCV.cpp index 920d285..1300722 100644 --- a/clang/lib/CodeGen/TargetBuiltins/RISCV.cpp +++ b/clang/lib/CodeGen/TargetBuiltins/RISCV.cpp @@ -1121,6 +1121,8 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned BuiltinID, bool IsMasked = false; // This is used by segment load/store to determine it's llvm type. unsigned SegInstSEW = 8; + // This is used by XSfmm. + unsigned TWiden = 0; // Required for overloaded intrinsics. llvm::SmallVector<llvm::Type *, 2> IntrinsicTypes; diff --git a/clang/lib/Headers/sifive_vector.h b/clang/lib/Headers/sifive_vector.h index 4e67ad6..ae01627 100644 --- a/clang/lib/Headers/sifive_vector.h +++ b/clang/lib/Headers/sifive_vector.h @@ -115,4 +115,60 @@ #endif #endif +#define __riscv_sf_vsettnt_e8w1(atn) __riscv_sf_vsettnt(atn, 0, 1); +#define __riscv_sf_vsettnt_e8w2(atn) __riscv_sf_vsettnt(atn, 0, 2); +#define __riscv_sf_vsettnt_e8w4(atn) __riscv_sf_vsettnt(atn, 0, 3); +#define __riscv_sf_vsettnt_e16w1(atn) __riscv_sf_vsettnt(atn, 1, 1); +#define __riscv_sf_vsettnt_e16w2(atn) __riscv_sf_vsettnt(atn, 1, 2); +#define __riscv_sf_vsettnt_e16w4(atn) __riscv_sf_vsettnt(atn, 1, 3); +#define __riscv_sf_vsettnt_e32w1(atn) __riscv_sf_vsettnt(atn, 2, 1); +#define __riscv_sf_vsettnt_e32w2(atn) __riscv_sf_vsettnt(atn, 2, 2); +#define __riscv_sf_vsettm_e8w1(atm) __riscv_sf_vsettm(atm, 0, 1); +#define __riscv_sf_vsettm_e8w2(atm) __riscv_sf_vsettm(atm, 0, 2); +#define __riscv_sf_vsettm_e8w4(atm) __riscv_sf_vsettm(atm, 0, 3); +#define __riscv_sf_vsettm_e16w1(atm) __riscv_sf_vsettm(atm, 1, 1); +#define __riscv_sf_vsettm_e16w2(atm) __riscv_sf_vsettm(atm, 1, 2); +#define __riscv_sf_vsettm_e16w4(atm) __riscv_sf_vsettm(atm, 1, 3); +#define __riscv_sf_vsettm_e32w1(atm) __riscv_sf_vsettm(atm, 2, 1); +#define __riscv_sf_vsettm_e32w2(atm) __riscv_sf_vsettm(atm, 2, 2); +#define __riscv_sf_vsettn_e8w1(atn) __riscv_sf_vsettn(atn, 0, 1); +#define __riscv_sf_vsettn_e8w2(atn) __riscv_sf_vsettn(atn, 0, 2); +#define __riscv_sf_vsettn_e8w4(atn) __riscv_sf_vsettn(atn, 0, 3); +#define __riscv_sf_vsettn_e16w1(atn) __riscv_sf_vsettn(atn, 1, 1); +#define __riscv_sf_vsettn_e16w2(atn) __riscv_sf_vsettn(atn, 1, 2); +#define __riscv_sf_vsettn_e16w4(atn) __riscv_sf_vsettn(atn, 1, 3); +#define __riscv_sf_vsettn_e32w1(atn) __riscv_sf_vsettn(atn, 2, 1); +#define __riscv_sf_vsettn_e32w2(atn) __riscv_sf_vsettn(atn, 2, 2); +#define __riscv_sf_vsettk_e8w1(atk) __riscv_sf_vsettk(atk, 0, 1); +#define __riscv_sf_vsettk_e8w2(atk) __riscv_sf_vsettk(atk, 0, 2); +#define __riscv_sf_vsettk_e8w4(atk) __riscv_sf_vsettk(atk, 0, 3); +#define __riscv_sf_vsettk_e16w1(atk) __riscv_sf_vsettk(atk, 1, 1); +#define __riscv_sf_vsettk_e16w2(atk) __riscv_sf_vsettk(atk, 1, 2); +#define __riscv_sf_vsettk_e16w4(atk) __riscv_sf_vsettk(atk, 1, 3); +#define __riscv_sf_vsettk_e32w1(atk) __riscv_sf_vsettk(atk, 2, 1); +#define __riscv_sf_vsettk_e32w2(atk) __riscv_sf_vsettk(atk, 2, 2); +#define __riscv_sf_vtzero_t_e8w1(tile, atm, atn) \ + __riscv_sf_vtzero_t(tile, atm, atn, 3, 1); +#define __riscv_sf_vtzero_t_e8w2(tile, atm, atn) \ + __riscv_sf_vtzero_t(tile, atm, atn, 3, 2); +#define __riscv_sf_vtzero_t_e8w4(tile, atm, atn) \ + __riscv_sf_vtzero_t(tile, atm, atn, 3, 4); +#define __riscv_sf_vtzero_t_e16w1(tile, atm, atn) \ + __riscv_sf_vtzero_t(tile, atm, atn, 4, 1); +#define __riscv_sf_vtzero_t_e16w2(tile, atm, atn) \ + __riscv_sf_vtzero_t(tile, atm, atn, 4, 2); +#define __riscv_sf_vtzero_t_e16w4(tile, atm, atn) \ + __riscv_sf_vtzero_t(tile, atm, atn, 4, 4); +#define __riscv_sf_vtzero_t_e32w1(tile, atm, atn) \ + __riscv_sf_vtzero_t(tile, atm, atn, 5, 1); +#define __riscv_sf_vtzero_t_e32w2(tile, atm, atn) \ + __riscv_sf_vtzero_t(tile, atm, atn, 5, 2); +#if __riscv_v_elen >= 64 +#define __riscv_sf_vsettnt_e64w1(atn) __riscv_sf_vsettnt(atn, 3, 1); +#define __riscv_sf_vsettm_e64w1(atm) __riscv_sf_vsettm(atm, 3, 1); +#define __riscv_sf_vsettn_e64w1(atn) __riscv_sf_vsettn(atn, 3, 1); +#define __riscv_sf_vsettk_e64w1(atk) __riscv_sf_vsettk(atk, 3, 1); +#define __riscv_sf_vtzero_t_e64w1(tile, atm, atn) \ + __riscv_sf_vtzero_t(tile, atm, atn, 6, 1); +#endif #endif //_SIFIVE_VECTOR_H_ diff --git a/clang/lib/Sema/CheckExprLifetime.cpp b/clang/lib/Sema/CheckExprLifetime.cpp index e797400..f9665b5 100644 --- a/clang/lib/Sema/CheckExprLifetime.cpp +++ b/clang/lib/Sema/CheckExprLifetime.cpp @@ -155,6 +155,7 @@ getEntityLifetime(const InitializedEntity *Entity, case InitializedEntity::EK_LambdaToBlockConversionBlockElement: case InitializedEntity::EK_LambdaCapture: case InitializedEntity::EK_VectorElement: + case InitializedEntity::EK_MatrixElement: case InitializedEntity::EK_ComplexElement: return {nullptr, LK_FullExpression}; diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp index f99c01e..f451787 100644 --- a/clang/lib/Sema/SemaChecking.cpp +++ b/clang/lib/Sema/SemaChecking.cpp @@ -12373,14 +12373,9 @@ static void DiagnoseMixedUnicodeImplicitConversion(Sema &S, const Type *Source, } } -enum CFIUncheckedCalleeChange { - None, - Adding, - Discarding, -}; - -static CFIUncheckedCalleeChange AdjustingCFIUncheckedCallee(QualType From, - QualType To) { +bool Sema::DiscardingCFIUncheckedCallee(QualType From, QualType To) const { + From = Context.getCanonicalType(From); + To = Context.getCanonicalType(To); QualType MaybePointee = From->getPointeeType(); if (!MaybePointee.isNull() && MaybePointee->getAs<FunctionType>()) From = MaybePointee; @@ -12392,25 +12387,10 @@ static CFIUncheckedCalleeChange AdjustingCFIUncheckedCallee(QualType From, if (const auto *ToFn = To->getAs<FunctionType>()) { if (FromFn->getCFIUncheckedCalleeAttr() && !ToFn->getCFIUncheckedCalleeAttr()) - return Discarding; - if (!FromFn->getCFIUncheckedCalleeAttr() && - ToFn->getCFIUncheckedCalleeAttr()) - return Adding; + return true; } } - return None; -} - -bool Sema::DiscardingCFIUncheckedCallee(QualType From, QualType To) const { - From = Context.getCanonicalType(From); - To = Context.getCanonicalType(To); - return ::AdjustingCFIUncheckedCallee(From, To) == Discarding; -} - -bool Sema::AddingCFIUncheckedCallee(QualType From, QualType To) const { - From = Context.getCanonicalType(From); - To = Context.getCanonicalType(To); - return ::AdjustingCFIUncheckedCallee(From, To) == Adding; + return false; } void Sema::CheckImplicitConversion(Expr *E, QualType T, SourceLocation CC, diff --git a/clang/lib/Sema/SemaHLSL.cpp b/clang/lib/Sema/SemaHLSL.cpp index 2a485da..96d5142 100644 --- a/clang/lib/Sema/SemaHLSL.cpp +++ b/clang/lib/Sema/SemaHLSL.cpp @@ -21,6 +21,7 @@ #include "clang/AST/Expr.h" #include "clang/AST/HLSLResource.h" #include "clang/AST/Type.h" +#include "clang/AST/TypeBase.h" #include "clang/AST/TypeLoc.h" #include "clang/Basic/Builtins.h" #include "clang/Basic/DiagnosticSema.h" @@ -3432,6 +3433,11 @@ static void BuildFlattenedTypeList(QualType BaseTy, List.insert(List.end(), VT->getNumElements(), VT->getElementType()); continue; } + if (const auto *MT = dyn_cast<ConstantMatrixType>(T)) { + List.insert(List.end(), MT->getNumElementsFlattened(), + MT->getElementType()); + continue; + } if (const auto *RD = T->getAsCXXRecordDecl()) { if (RD->isStandardLayout()) RD = RD->getStandardLayoutBaseWithFields(); @@ -4230,6 +4236,32 @@ class InitListTransformer { } return true; } + if (auto *MTy = Ty->getAs<ConstantMatrixType>()) { + unsigned Rows = MTy->getNumRows(); + unsigned Cols = MTy->getNumColumns(); + QualType ElemTy = MTy->getElementType(); + + for (unsigned C = 0; C < Cols; ++C) { + for (unsigned R = 0; R < Rows; ++R) { + // row index literal + Expr *RowIdx = IntegerLiteral::Create( + Ctx, llvm::APInt(Ctx.getIntWidth(Ctx.IntTy), R), Ctx.IntTy, + E->getBeginLoc()); + // column index literal + Expr *ColIdx = IntegerLiteral::Create( + Ctx, llvm::APInt(Ctx.getIntWidth(Ctx.IntTy), C), Ctx.IntTy, + E->getBeginLoc()); + ExprResult ElExpr = S.CreateBuiltinMatrixSubscriptExpr( + E, RowIdx, ColIdx, E->getEndLoc()); + if (ElExpr.isInvalid()) + return false; + if (!castInitializer(ElExpr.get())) + return false; + ElExpr.get()->setType(ElemTy); + } + } + return true; + } if (auto *ArrTy = dyn_cast<ConstantArrayType>(Ty.getTypePtr())) { uint64_t Size = ArrTy->getZExtSize(); @@ -4283,14 +4315,17 @@ class InitListTransformer { return *(ArgIt++); llvm::SmallVector<Expr *> Inits; - assert(!isa<MatrixType>(Ty) && "Matrix types not yet supported in HLSL"); Ty = Ty.getDesugaredType(Ctx); - if (Ty->isVectorType() || Ty->isConstantArrayType()) { + if (Ty->isVectorType() || Ty->isConstantArrayType() || + Ty->isConstantMatrixType()) { QualType ElTy; uint64_t Size = 0; if (auto *ATy = Ty->getAs<VectorType>()) { ElTy = ATy->getElementType(); Size = ATy->getNumElements(); + } else if (auto *CMTy = Ty->getAs<ConstantMatrixType>()) { + ElTy = CMTy->getElementType(); + Size = CMTy->getNumElementsFlattened(); } else { auto *VTy = cast<ConstantArrayType>(Ty.getTypePtr()); ElTy = VTy->getElementType(); diff --git a/clang/lib/Sema/SemaInit.cpp b/clang/lib/Sema/SemaInit.cpp index 7debe33..073010d 100644 --- a/clang/lib/Sema/SemaInit.cpp +++ b/clang/lib/Sema/SemaInit.cpp @@ -17,6 +17,7 @@ #include "clang/AST/ExprCXX.h" #include "clang/AST/ExprObjC.h" #include "clang/AST/IgnoreExpr.h" +#include "clang/AST/TypeBase.h" #include "clang/AST/TypeLoc.h" #include "clang/Basic/SourceManager.h" #include "clang/Basic/Specifiers.h" @@ -403,6 +404,9 @@ class InitListChecker { unsigned &Index, InitListExpr *StructuredList, unsigned &StructuredIndex); + void CheckMatrixType(const InitializedEntity &Entity, InitListExpr *IList, + QualType DeclType, unsigned &Index, + InitListExpr *StructuredList, unsigned &StructuredIndex); void CheckVectorType(const InitializedEntity &Entity, InitListExpr *IList, QualType DeclType, unsigned &Index, InitListExpr *StructuredList, @@ -1004,7 +1008,8 @@ InitListChecker::FillInEmptyInitializations(const InitializedEntity &Entity, return; if (ElementEntity.getKind() == InitializedEntity::EK_ArrayElement || - ElementEntity.getKind() == InitializedEntity::EK_VectorElement) + ElementEntity.getKind() == InitializedEntity::EK_VectorElement || + ElementEntity.getKind() == InitializedEntity::EK_MatrixElement) ElementEntity.setElementIndex(Init); if (Init >= NumInits && (ILE->hasArrayFiller() || SkipEmptyInitChecks)) @@ -1274,6 +1279,7 @@ static void warnBracedScalarInit(Sema &S, const InitializedEntity &Entity, switch (Entity.getKind()) { case InitializedEntity::EK_VectorElement: + case InitializedEntity::EK_MatrixElement: case InitializedEntity::EK_ComplexElement: case InitializedEntity::EK_ArrayElement: case InitializedEntity::EK_Parameter: @@ -1373,11 +1379,12 @@ void InitListChecker::CheckExplicitInitList(const InitializedEntity &Entity, SemaRef.Diag(IList->getInit(Index)->getBeginLoc(), DK) << T << IList->getInit(Index)->getSourceRange(); } else { - int initKind = T->isArrayType() ? 0 : - T->isVectorType() ? 1 : - T->isScalarType() ? 2 : - T->isUnionType() ? 3 : - 4; + int initKind = T->isArrayType() ? 0 + : T->isVectorType() ? 1 + : T->isMatrixType() ? 2 + : T->isScalarType() ? 3 + : T->isUnionType() ? 4 + : 5; unsigned DK = ExtraInitsIsError ? diag::err_excess_initializers : diag::ext_excess_initializers; @@ -1431,6 +1438,9 @@ void InitListChecker::CheckListElementTypes(const InitializedEntity &Entity, } else if (DeclType->isVectorType()) { CheckVectorType(Entity, IList, DeclType, Index, StructuredList, StructuredIndex); + } else if (DeclType->isMatrixType()) { + CheckMatrixType(Entity, IList, DeclType, Index, StructuredList, + StructuredIndex); } else if (const RecordDecl *RD = DeclType->getAsRecordDecl()) { auto Bases = CXXRecordDecl::base_class_const_range(CXXRecordDecl::base_class_const_iterator(), @@ -1878,6 +1888,37 @@ void InitListChecker::CheckReferenceType(const InitializedEntity &Entity, AggrDeductionCandidateParamTypes->push_back(DeclType); } +void InitListChecker::CheckMatrixType(const InitializedEntity &Entity, + InitListExpr *IList, QualType DeclType, + unsigned &Index, + InitListExpr *StructuredList, + unsigned &StructuredIndex) { + if (!SemaRef.getLangOpts().HLSL) + return; + + const ConstantMatrixType *MT = DeclType->castAs<ConstantMatrixType>(); + QualType ElemTy = MT->getElementType(); + const unsigned MaxElts = MT->getNumElementsFlattened(); + + unsigned NumEltsInit = 0; + InitializedEntity ElemEnt = + InitializedEntity::InitializeElement(SemaRef.Context, 0, Entity); + + while (NumEltsInit < MaxElts && Index < IList->getNumInits()) { + // Not a sublist: just consume directly. + ElemEnt.setElementIndex(Index); + CheckSubElementType(ElemEnt, IList, ElemTy, Index, StructuredList, + StructuredIndex); + ++NumEltsInit; + } + + // For HLSL The error for this case is handled in SemaHLSL's initializer + // list diagnostics, That means the execution should require NumEltsInit + // to equal Max initializers. In other words execution should never + // reach this point if this condition is not true". + assert(NumEltsInit == MaxElts && "NumEltsInit must equal MaxElts"); +} + void InitListChecker::CheckVectorType(const InitializedEntity &Entity, InitListExpr *IList, QualType DeclType, unsigned &Index, @@ -3640,6 +3681,9 @@ InitializedEntity::InitializedEntity(ASTContext &Context, unsigned Index, } else if (const VectorType *VT = Parent.getType()->getAs<VectorType>()) { Kind = EK_VectorElement; Type = VT->getElementType(); + } else if (const MatrixType *MT = Parent.getType()->getAs<MatrixType>()) { + Kind = EK_MatrixElement; + Type = MT->getElementType(); } else { const ComplexType *CT = Parent.getType()->getAs<ComplexType>(); assert(CT && "Unexpected type"); @@ -3688,6 +3732,7 @@ DeclarationName InitializedEntity::getName() const { case EK_Delegating: case EK_ArrayElement: case EK_VectorElement: + case EK_MatrixElement: case EK_ComplexElement: case EK_BlockElement: case EK_LambdaToBlockConversionBlockElement: @@ -3721,6 +3766,7 @@ ValueDecl *InitializedEntity::getDecl() const { case EK_Delegating: case EK_ArrayElement: case EK_VectorElement: + case EK_MatrixElement: case EK_ComplexElement: case EK_BlockElement: case EK_LambdaToBlockConversionBlockElement: @@ -3754,6 +3800,7 @@ bool InitializedEntity::allowsNRVO() const { case EK_Delegating: case EK_ArrayElement: case EK_VectorElement: + case EK_MatrixElement: case EK_ComplexElement: case EK_BlockElement: case EK_LambdaToBlockConversionBlockElement: @@ -3793,6 +3840,9 @@ unsigned InitializedEntity::dumpImpl(raw_ostream &OS) const { case EK_Delegating: OS << "Delegating"; break; case EK_ArrayElement: OS << "ArrayElement " << Index; break; case EK_VectorElement: OS << "VectorElement " << Index; break; + case EK_MatrixElement: + OS << "MatrixElement " << Index; + break; case EK_ComplexElement: OS << "ComplexElement " << Index; break; case EK_BlockElement: OS << "Block"; break; case EK_LambdaToBlockConversionBlockElement: @@ -6030,7 +6080,7 @@ static void TryOrBuildParenListInitialization( Sequence.SetFailed(InitializationSequence::FK_ParenthesizedListInitFailed); if (!VerifyOnly) { QualType T = Entity.getType(); - int InitKind = T->isArrayType() ? 0 : T->isUnionType() ? 3 : 4; + int InitKind = T->isArrayType() ? 0 : T->isUnionType() ? 4 : 5; SourceRange ExcessInitSR(Args[EntityIndexToProcess]->getBeginLoc(), Args.back()->getEndLoc()); S.Diag(Kind.getLocation(), diag::err_excess_initializers) @@ -6823,7 +6873,8 @@ void InitializationSequence::InitializeFrom(Sema &S, // For HLSL ext vector types we allow list initialization behavior for C++ // functional cast expressions which look like constructor syntax. This is // accomplished by converting initialization arguments to InitListExpr. - if (S.getLangOpts().HLSL && Args.size() > 1 && DestType->isExtVectorType() && + if (S.getLangOpts().HLSL && Args.size() > 1 && + (DestType->isExtVectorType() || DestType->isConstantMatrixType()) && (SourceType.isNull() || !Context.hasSameUnqualifiedType(SourceType, DestType))) { InitListExpr *ILE = new (Context) @@ -6988,6 +7039,7 @@ static AssignmentAction getAssignmentAction(const InitializedEntity &Entity, case InitializedEntity::EK_Binding: case InitializedEntity::EK_ArrayElement: case InitializedEntity::EK_VectorElement: + case InitializedEntity::EK_MatrixElement: case InitializedEntity::EK_ComplexElement: case InitializedEntity::EK_BlockElement: case InitializedEntity::EK_LambdaToBlockConversionBlockElement: @@ -7013,6 +7065,7 @@ static bool shouldBindAsTemporary(const InitializedEntity &Entity) { case InitializedEntity::EK_Base: case InitializedEntity::EK_Delegating: case InitializedEntity::EK_VectorElement: + case InitializedEntity::EK_MatrixElement: case InitializedEntity::EK_ComplexElement: case InitializedEntity::EK_Exception: case InitializedEntity::EK_BlockElement: @@ -7043,6 +7096,7 @@ static bool shouldDestroyEntity(const InitializedEntity &Entity) { case InitializedEntity::EK_Base: case InitializedEntity::EK_Delegating: case InitializedEntity::EK_VectorElement: + case InitializedEntity::EK_MatrixElement: case InitializedEntity::EK_ComplexElement: case InitializedEntity::EK_BlockElement: case InitializedEntity::EK_LambdaToBlockConversionBlockElement: @@ -7096,6 +7150,7 @@ static SourceLocation getInitializationLoc(const InitializedEntity &Entity, case InitializedEntity::EK_Base: case InitializedEntity::EK_Delegating: case InitializedEntity::EK_VectorElement: + case InitializedEntity::EK_MatrixElement: case InitializedEntity::EK_ComplexElement: case InitializedEntity::EK_BlockElement: case InitializedEntity::EK_LambdaToBlockConversionBlockElement: @@ -7845,11 +7900,13 @@ ExprResult InitializationSequence::Perform(Sema &S, ExprResult CurInit((Expr *)nullptr); SmallVector<Expr*, 4> ArrayLoopCommonExprs; - // HLSL allows vector initialization to function like list initialization, but - // use the syntax of a C++-like constructor. - bool IsHLSLVectorInit = S.getLangOpts().HLSL && DestType->isExtVectorType() && - isa<InitListExpr>(Args[0]); - (void)IsHLSLVectorInit; + // HLSL allows vector/matrix initialization to function like list + // initialization, but use the syntax of a C++-like constructor. + bool IsHLSLVectorOrMatrixInit = + S.getLangOpts().HLSL && + (DestType->isExtVectorType() || DestType->isConstantMatrixType()) && + isa<InitListExpr>(Args[0]); + (void)IsHLSLVectorOrMatrixInit; // For initialization steps that start with a single initializer, // grab the only argument out the Args and place it into the "current" @@ -7888,7 +7945,7 @@ ExprResult InitializationSequence::Perform(Sema &S, case SK_StdInitializerList: case SK_OCLSamplerInit: case SK_OCLZeroOpaqueType: { - assert(Args.size() == 1 || IsHLSLVectorInit); + assert(Args.size() == 1 || IsHLSLVectorOrMatrixInit); CurInit = Args[0]; if (!CurInit.get()) return ExprError(); break; @@ -9105,7 +9162,7 @@ bool InitializationSequence::Diagnose(Sema &S, << R; else S.Diag(Kind.getLocation(), diag::err_excess_initializers) - << /*scalar=*/2 << R; + << /*scalar=*/3 << R; break; } diff --git a/clang/lib/Sema/SemaOverload.cpp b/clang/lib/Sema/SemaOverload.cpp index 1f25111..37f3511 100644 --- a/clang/lib/Sema/SemaOverload.cpp +++ b/clang/lib/Sema/SemaOverload.cpp @@ -2532,15 +2532,12 @@ static bool IsStandardConversion(Sema &S, Expr* From, QualType ToType, SCS.setToType(2, FromType); - // If we have not converted the argument type to the parameter type, - // this is a bad conversion sequence, unless we're resolving an overload in C. - // - // Permit conversions from a function without `cfi_unchecked_callee` to a - // function with `cfi_unchecked_callee`. - if (CanonFrom == CanonTo || S.AddingCFIUncheckedCallee(CanonFrom, CanonTo)) + if (CanonFrom == CanonTo) return true; - if ((S.getLangOpts().CPlusPlus || !InOverloadResolution)) + // If we have not converted the argument type to the parameter type, + // this is a bad conversion sequence, unless we're resolving an overload in C. + if (S.getLangOpts().CPlusPlus || !InOverloadResolution) return false; ExprResult ER = ExprResult{From}; diff --git a/clang/lib/Sema/SemaRISCV.cpp b/clang/lib/Sema/SemaRISCV.cpp index b5f91a3..75dba80 100644 --- a/clang/lib/Sema/SemaRISCV.cpp +++ b/clang/lib/Sema/SemaRISCV.cpp @@ -664,6 +664,80 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI, return CheckVSetVL(1, 2); case RISCVVector::BI__builtin_rvv_vsetvlimax: return CheckVSetVL(0, 1); + case RISCVVector::BI__builtin_rvv_sf_vsettnt: + case RISCVVector::BI__builtin_rvv_sf_vsettm: + case RISCVVector::BI__builtin_rvv_sf_vsettn: + case RISCVVector::BI__builtin_rvv_sf_vsettk: + return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 3) || + SemaRef.BuiltinConstantArgRange(TheCall, 2, 1, 3); + case RISCVVector::BI__builtin_rvv_sf_mm_f_f_w1: + case RISCVVector::BI__builtin_rvv_sf_mm_f_f_w2: + case RISCVVector::BI__builtin_rvv_sf_mm_e5m2_e4m3_w4: + case RISCVVector::BI__builtin_rvv_sf_mm_e5m2_e5m2_w4: + case RISCVVector::BI__builtin_rvv_sf_mm_e4m3_e4m3_w4: + case RISCVVector::BI__builtin_rvv_sf_mm_e4m3_e5m2_w4: + case RISCVVector::BI__builtin_rvv_sf_mm_u_u_w4: + case RISCVVector::BI__builtin_rvv_sf_mm_u_s_w4: + case RISCVVector::BI__builtin_rvv_sf_mm_s_u_w4: + case RISCVVector::BI__builtin_rvv_sf_mm_s_s_w4: { + QualType Arg1Type = TheCall->getArg(1)->getType(); + ASTContext::BuiltinVectorTypeInfo Info = + SemaRef.Context.getBuiltinVectorTypeInfo( + Arg1Type->castAs<BuiltinType>()); + unsigned EltSize = SemaRef.Context.getTypeSize(Info.ElementType); + llvm::APSInt Result; + + // We can't check the value of a dependent argument. + Expr *Arg = TheCall->getArg(0); + if (Arg->isTypeDependent() || Arg->isValueDependent()) + return false; + + // Check constant-ness first. + if (SemaRef.BuiltinConstantArg(TheCall, 0, Result)) + return true; + + // For TEW = 32, mtd can only be 0, 4, 8, 12. + // For TEW = 64, mtd can only be 0, 2, 4, 6, 8, 10, 12, 14. + // Only `sf_mm_f_f_w1` and `sf_mm_f_f_w2` might have TEW = 64. + if ((BuiltinID == RISCVVector::BI__builtin_rvv_sf_mm_f_f_w1 && + EltSize == 64) || + (BuiltinID == RISCVVector::BI__builtin_rvv_sf_mm_f_f_w2 && + EltSize == 32)) + return SemaRef.BuiltinConstantArgRange(TheCall, 0, 0, 15) || + SemaRef.BuiltinConstantArgMultiple(TheCall, 0, 2); + return SemaRef.BuiltinConstantArgRange(TheCall, 0, 0, 15) || + SemaRef.BuiltinConstantArgMultiple(TheCall, 0, 4); + } + case RISCVVector::BI__builtin_rvv_sf_vtzero_t: { + llvm::APSInt Log2SEWResult; + llvm::APSInt TWidenResult; + if (SemaRef.BuiltinConstantArg(TheCall, 3, Log2SEWResult) || + SemaRef.BuiltinConstantArg(TheCall, 4, TWidenResult)) + return true; + + int Log2SEW = Log2SEWResult.getSExtValue(); + int TWiden = TWidenResult.getSExtValue(); + + // 3 <= LogSEW <= 6 + if (SemaRef.BuiltinConstantArgRange(TheCall, 3, 3, 6)) + return true; + + // TWiden + if (TWiden != 1 && TWiden != 2 && TWiden != 4) + return Diag(TheCall->getBeginLoc(), + diag::err_riscv_builtin_invalid_twiden); + + int TEW = (1 << Log2SEW) * TWiden; + + // For TEW = 8, mtd can be 0~15. + // For TEW = 16 or 64, mtd can only be 0, 2, 4, 6, 8, 10, 12, 14. + // For TEW = 32, mtd can only be 0, 4, 8, 12. + if (SemaRef.BuiltinConstantArgRange(TheCall, 0, 0, 15)) + return true; + if (TEW == 16 || TEW == 64) + return SemaRef.BuiltinConstantArgMultiple(TheCall, 0, 2); + return SemaRef.BuiltinConstantArgMultiple(TheCall, 0, 4); + } case RISCVVector::BI__builtin_rvv_vget_v: { ASTContext::BuiltinVectorTypeInfo ResVecInfo = Context.getBuiltinVectorTypeInfo(cast<BuiltinType>( diff --git a/clang/lib/Support/RISCVVIntrinsicUtils.cpp b/clang/lib/Support/RISCVVIntrinsicUtils.cpp index dad3d0da..12e209a 100644 --- a/clang/lib/Support/RISCVVIntrinsicUtils.cpp +++ b/clang/lib/Support/RISCVVIntrinsicUtils.cpp @@ -980,11 +980,12 @@ RVVIntrinsic::RVVIntrinsic( bool HasMaskedOffOperand, bool HasVL, PolicyScheme Scheme, bool SupportOverloading, bool HasBuiltinAlias, StringRef ManualCodegen, const RVVTypes &OutInTypes, const std::vector<int64_t> &NewIntrinsicTypes, - unsigned NF, Policy NewPolicyAttrs, bool HasFRMRoundModeOp) + unsigned NF, Policy NewPolicyAttrs, bool HasFRMRoundModeOp, unsigned TWiden) : IRName(IRName), IsMasked(IsMasked), HasMaskedOffOperand(HasMaskedOffOperand), HasVL(HasVL), Scheme(Scheme), SupportOverloading(SupportOverloading), HasBuiltinAlias(HasBuiltinAlias), - ManualCodegen(ManualCodegen.str()), NF(NF), PolicyAttrs(NewPolicyAttrs) { + ManualCodegen(ManualCodegen.str()), NF(NF), PolicyAttrs(NewPolicyAttrs), + TWiden(TWiden) { // Init BuiltinName, Name and OverloadedName BuiltinName = NewName.str(); diff --git a/clang/test/AST/HLSL/matrix-constructors.hlsl b/clang/test/AST/HLSL/matrix-constructors.hlsl new file mode 100644 index 0000000..0a2f03c --- /dev/null +++ b/clang/test/AST/HLSL/matrix-constructors.hlsl @@ -0,0 +1,393 @@ +// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -x hlsl -ast-dump -o - %s | FileCheck %s + +typedef float float2x1 __attribute__((matrix_type(2,1))); +typedef float float2x3 __attribute__((matrix_type(2,3))); +typedef float float2x2 __attribute__((matrix_type(2,2))); +typedef float float4x4 __attribute__((matrix_type(4,4))); +typedef float float2 __attribute__((ext_vector_type(2))); +typedef float float4 __attribute__((ext_vector_type(4))); + +[numthreads(1,1,1)] +void ok() { + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} A 'float2x3':'matrix<float, 2, 3>' cinit +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x3':'matrix<float, 2, 3>' functional cast to float2x3 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x3':'matrix<float, 2, 3>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 4 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 5 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 6 + float2x3 A = float2x3(1,2,3,4,5,6); + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} B 'float2x1':'matrix<float, 2, 1>' cinit +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x1':'matrix<float, 2, 1>' functional cast to float2x1 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x1':'matrix<float, 2, 1>' +// CHECK-NEXT: FloatingLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' 1.000000e+00 +// CHECK-NEXT: FloatingLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' 2.000000e+00 + float2x1 B = float2x1(1.0,2.0); + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} C 'float2x1':'matrix<float, 2, 1>' cinit +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x1':'matrix<float, 2, 1>' functional cast to float2x1 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x1':'matrix<float, 2, 1>' +// CHECK-NEXT: UnaryOperator 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' prefix '-' +// CHECK-NEXT: FloatingLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' 1.000000e+00 +// CHECK-NEXT: UnaryOperator 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' prefix '-' +// CHECK-NEXT: FloatingLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' 2.000000e+00 + float2x1 C = float2x1(-1.0f,-2.0f); + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} D 'float2x3':'matrix<float, 2, 3>' cinit +// CHECK-NEXT: ExprWithCleanups 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x3':'matrix<float, 2, 3>' +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x3':'matrix<float, 2, 3>' functional cast to float2x3 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x3':'matrix<float, 2, 3>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' xvalue +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' functional cast to float2 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' xvalue +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' functional cast to float2 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 4 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 5 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 6 + float2x3 D = float2x3(float2(1,2), 3, 4, 5, 6); + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} E 'float2x3':'matrix<float, 2, 3>' cinit +// CHECK-NEXT: ExprWithCleanups 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x3':'matrix<float, 2, 3>' +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x3':'matrix<float, 2, 3>' functional cast to float2x3 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x3':'matrix<float, 2, 3>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' xvalue +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' functional cast to float2 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' xvalue +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' functional cast to float2 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' xvalue +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' functional cast to float2 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 4 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' xvalue +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' functional cast to float2 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 4 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 5 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 6 + float2x3 E = float2x3(float2(1,2), float2(3,4), 5, 6); + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} F 'float2x3':'matrix<float, 2, 3>' cinit +// CHECK-NEXT: ExprWithCleanups 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x3':'matrix<float, 2, 3>' +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x3':'matrix<float, 2, 3>' functional cast to float2x3 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x3':'matrix<float, 2, 3>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float4':'vector<float, 4>' xvalue +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float4':'vector<float, 4>' functional cast to float4 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float4':'vector<float, 4>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 4 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float4':'vector<float, 4>' xvalue +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float4':'vector<float, 4>' functional cast to float4 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float4':'vector<float, 4>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 4 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float4':'vector<float, 4>' xvalue +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float4':'vector<float, 4>' functional cast to float4 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float4':'vector<float, 4>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 4 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 2 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float4':'vector<float, 4>' xvalue +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float4':'vector<float, 4>' functional cast to float4 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float4':'vector<float, 4>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 4 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 3 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 5 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 6 + float2x3 F = float2x3(float4(1,2,3,4), 5, 6); + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} G 'float2x3':'matrix<float, 2, 3>' cinit +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x3':'matrix<float, 2, 3>' functional cast to float2x3 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x3':'matrix<float, 2, 3>' +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' matrixcomponent +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' functional cast to float2x2 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 4 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' matrixcomponent +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' functional cast to float2x2 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 4 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' matrixcomponent +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' functional cast to float2x2 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 4 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' matrixcomponent +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' functional cast to float2x2 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 4 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 5 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 6 +float2x3 G = float2x3(float2x2(1,2,3,4), 5, 6); + + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} H 'float2x2':'matrix<float, 2, 2>' cinit +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' functional cast to float2x2 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue vectorcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2':'vector<float, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'Vec2' 'float2':'vector<float, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue vectorcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2':'vector<float, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'Vec2' 'float2':'vector<float, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 4 + float2 Vec2 = float2(1.0, 2.0); + float2x2 H = float2x2(Vec2,3,4); + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} I 'float2x2':'matrix<float, 2, 2>' cinit +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' functional cast to float2x2 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <LValueToRValue> +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' lvalue Var 0x{{[0-9a-fA-F]+}} 'i' 'int' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <LValueToRValue> +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' lvalue Var 0x{{[0-9a-fA-F]+}} 'j' 'int' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <LValueToRValue> +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' lvalue Var 0x{{[0-9a-fA-F]+}} 'k' 'int' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <LValueToRValue> +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' lvalue Var 0x{{[0-9a-fA-F]+}} 'l' 'int' + int i = 1, j = 2, k = 3, l = 4; + float2x2 I = float2x2(i,j,k,l); + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} J 'float2x2':'matrix<float, 2, 2>' cinit +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' functional cast to float2x2 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' lvalue vectorcomponent +// CHECK-NEXT: MemberExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' lvalue .f 0x{{[0-9a-fA-F]+}} +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'struct S' lvalue Var 0x{{[0-9a-fA-F]+}} 's' 'struct S' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' lvalue vectorcomponent +// CHECK-NEXT: MemberExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2':'vector<float, 2>' lvalue .f 0x{{[0-9a-fA-F]+}} +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'struct S' lvalue Var 0x{{[0-9a-fA-F]+}} 's' 'struct S' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MemberExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' lvalue .a 0x{{[0-9a-fA-F]+}} +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'struct S' lvalue Var 0x{{[0-9a-fA-F]+}} 's' 'struct S' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MemberExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' lvalue .a 0x{{[0-9a-fA-F]+}} +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'struct S' lvalue Var 0x{{[0-9a-fA-F]+}} 's' 'struct S' + struct S { float2 f; float a;} s; + float2x2 J = float2x2(s.f, s.a, s.a); + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} L 'second_level_of_typedefs':'matrix<float, 2, 2>' cinit +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' functional cast to float2x2 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: FloatingLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' 1.000000e+00 +// CHECK-NEXT: FloatingLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' 2.000000e+00 +// CHECK-NEXT: FloatingLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' 3.000000e+00 +// CHECK-NEXT: FloatingLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' 4.000000e+00 + typedef float2x2 second_level_of_typedefs; + second_level_of_typedefs L = float2x2(1.0f, 2.0f, 3.0f, 4.0f); + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} M 'float2x2':'matrix<float, 2, 2>' cinit +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'second_level_of_typedefs':'matrix<float, 2, 2>' functional cast to second_level_of_typedefs <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'second_level_of_typedefs':'matrix<float, 2, 2>' +// CHECK-NEXT: FloatingLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' 1.000000e+00 +// CHECK-NEXT: FloatingLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' 2.000000e+00 +// CHECK-NEXT: FloatingLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' 3.000000e+00 +// CHECK-NEXT: FloatingLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' 4.000000e+00 + float2x2 M = second_level_of_typedefs(1.0f, 2.0f, 3.0f, 4.0f); + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} N 'float4x4':'matrix<float, 4, 4>' cinit +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float4x4':'matrix<float, 4, 4>' functional cast to float4x4 <HLSLElementwiseCast> +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'sF' lvalue Var 0x{{[0-9a-fA-F]+}} 'f' 'sF' +struct sF { + float f[16]; +}; + +sF f; +float4x4 N = float4x4(f); + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} GettingStrange 'float2x1':'matrix<float, 2, 1>' cinit +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x1':'matrix<float, 2, 1>' functional cast to float2x1 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x1':'matrix<float, 2, 1>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MemberExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue .f 0x{{[0-9a-fA-F]+}} +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'S2' lvalue Var 0x{{[0-9a-fA-F]+}} 's2' 'S2' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MemberExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue .f 0x{{[0-9a-fA-F]+}} +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'S2' lvalue Var 0x{{[0-9a-fA-F]+}} 's2' 'S2' +struct S2 { float f; }; +S2 s2; +float2x1 GettingStrange = float2x1(s2, s2); + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} GettingStrange2 'float2x2':'matrix<float, 2, 2>' cinit +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' functional cast to float2x2 <NoOp> +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue vectorcomponent +// CHECK-NEXT: MemberExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2':'vector<float, 2>' lvalue .f 0x{{[0-9a-fA-F]+}} +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'S3' lvalue Var 0x{{[0-9a-fA-F]+}} 's3' 'S3' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue vectorcomponent +// CHECK-NEXT: MemberExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2':'vector<float, 2>' lvalue .f 0x{{[0-9a-fA-F]+}} +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'S3' lvalue Var 0x{{[0-9a-fA-F]+}} 's3' 'S3' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue vectorcomponent +// CHECK-NEXT: MemberExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2':'vector<float, 2>' lvalue .f 0x{{[0-9a-fA-F]+}} +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'S3' lvalue Var 0x{{[0-9a-fA-F]+}} 's3' 'S3' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue vectorcomponent +// CHECK-NEXT: MemberExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2':'vector<float, 2>' lvalue .f 0x{{[0-9a-fA-F]+}} +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'S3' lvalue Var 0x{{[0-9a-fA-F]+}} 's3' 'S3' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 1 +struct S3 { float2 f;}; +S3 s3; +float2x2 GettingStrange2 = float2x2(s3, s3); + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} GettingStrange3 'float2x2':'matrix<float, 2, 2>' cinit +// CHECK-NEXT: CXXFunctionalCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' functional cast to float2x2 <HLSLElementwiseCast> +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'S4' lvalue Var 0x{{[0-9a-fA-F]+}} 's4' 'S4' +struct S4 { float4 f;}; +S4 s4; +float2x2 GettingStrange3 = float2x2(s4); + +} + diff --git a/clang/test/AST/HLSL/matrix-general-initializer.hlsl b/clang/test/AST/HLSL/matrix-general-initializer.hlsl new file mode 100644 index 0000000..14c950a --- /dev/null +++ b/clang/test/AST/HLSL/matrix-general-initializer.hlsl @@ -0,0 +1,260 @@ +// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -x hlsl -ast-dump -o - %s | FileCheck %s + +typedef float float4x2 __attribute__((matrix_type(4,2))); +typedef float float2x2 __attribute__((matrix_type(2,2))); +typedef int int4x4 __attribute__((matrix_type(4,4))); + + +[numthreads(1,1,1)] +void ok() { + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} used m 'float4x2':'matrix<float, 4, 2>' cinit +// CHECK-NEXT: ExprWithCleanups 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float4x2':'matrix<float, 4, 2>' +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float4x2':'matrix<float, 4, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 3>' xvalue +// CHECK-NEXT: ExtVectorElementExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 3>' xxx +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'vector<int, 1>' <VectorSplat> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 3>' xvalue +// CHECK-NEXT: ExtVectorElementExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 3>' xxx +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'vector<int, 1>' <VectorSplat> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 3>' xvalue +// CHECK-NEXT: ExtVectorElementExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 3>' xxx +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'vector<int, 1>' <VectorSplat> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 2 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 2>' xvalue +// CHECK-NEXT: ExtVectorElementExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 2>' xx +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'vector<int, 1>' <VectorSplat> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 2>' xvalue +// CHECK-NEXT: ExtVectorElementExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 2>' xx +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'vector<int, 1>' <VectorSplat> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ExtVectorElementExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' x +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'vector<int, 1>' <VectorSplat> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 2>' xvalue +// CHECK-NEXT: ExtVectorElementExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 2>' xx +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'vector<int, 1>' <VectorSplat> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 4 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 2>' xvalue +// CHECK-NEXT: ExtVectorElementExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 2>' xx +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'vector<int, 1>' <VectorSplat> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 4 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 1 +float4x2 m = {1.xxx, 2.xx, 3.x, 4.xx}; + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} s 'S' cinit +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'S' +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float4x2':'matrix<float, 4, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm' 'float4x2':'matrix<float, 4, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float4x2':'matrix<float, 4, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm' 'float4x2':'matrix<float, 4, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float4x2':'matrix<float, 4, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm' 'float4x2':'matrix<float, 4, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float4x2':'matrix<float, 4, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm' 'float4x2':'matrix<float, 4, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float4x2':'matrix<float, 4, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm' 'float4x2':'matrix<float, 4, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float4x2':'matrix<float, 4, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm' 'float4x2':'matrix<float, 4, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float4x2':'matrix<float, 4, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm' 'float4x2':'matrix<float, 4, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 2 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float4x2':'matrix<float, 4, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm' 'float4x2':'matrix<float, 4, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 3 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +struct S { float2x2 x; float2x2 y;}; +S s = {m}; + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} used m2 'float2x2':'matrix<float, 2, 2>' cinit +// CHECK-NEXT: ExprWithCleanups 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 4>' xvalue +// CHECK-NEXT: ExtVectorElementExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 4>' xxxx +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'vector<int, 1>' <VectorSplat> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 4>' xvalue +// CHECK-NEXT: ExtVectorElementExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 4>' xxxx +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'vector<int, 1>' <VectorSplat> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 4>' xvalue +// CHECK-NEXT: ExtVectorElementExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 4>' xxxx +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'vector<int, 1>' <VectorSplat> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 2 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'float' <IntegralToFloating> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' <LValueToRValue> +// CHECK-NEXT: ArraySubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int' xvalue vectorcomponent +// CHECK-NEXT: MaterializeTemporaryExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 4>' xvalue +// CHECK-NEXT: ExtVectorElementExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'vector<int, 4>' xxxx +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'vector<int, 1>' <VectorSplat> +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <<invalid sloc>> '__size_t':'unsigned long' 3 +float2x2 m2 = {0.xxxx}; + +// CHECK: VarDecl 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> col:{{[0-9]+}} m3 'int4x4':'matrix<int, 4, 4>' cinit +// CHECK-NEXT: InitListExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}, col:{{[0-9]+}}> 'int4x4':'matrix<int, 4, 4>' +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 0 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' <FloatingToIntegral> +// CHECK-NEXT: ImplicitCastExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' <LValueToRValue> +// CHECK-NEXT: MatrixSubscriptExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float' lvalue matrixcomponent +// CHECK-NEXT: DeclRefExpr 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'float2x2':'matrix<float, 2, 2>' lvalue Var 0x{{[0-9a-fA-F]+}} 'm2' 'float2x2':'matrix<float, 2, 2>' +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +// CHECK-NEXT: IntegerLiteral 0x{{[0-9a-fA-F]+}} <col:{{[0-9]+}}> 'int' 1 +int4x4 m3 = {m2, m2, m2, m2}; + +}
\ No newline at end of file diff --git a/clang/test/CIR/CodeGen/complex.cpp b/clang/test/CIR/CodeGen/complex.cpp index 4e89af4..3fb78dc 100644 --- a/clang/test/CIR/CodeGen/complex.cpp +++ b/clang/test/CIR/CodeGen/complex.cpp @@ -1468,3 +1468,30 @@ void calling_function_with_default_arg() { // OGCG: store float 0x40019999A0000000, ptr %[[DEFAULT_ARG_IMAG_PTR]], align 4 // OGCG: %[[TMP_DEFAULT_ARG:.*]] = load <2 x float>, ptr %[[DEFAULT_ARG_ADDR]], align 4 // OGCG: call void @_Z33function_with_complex_default_argCf(<2 x float> {{.*}} %[[TMP_DEFAULT_ARG]]) + +void calling_function_that_return_complex() { + float _Complex a = complex_type_return_type(); +} + +// CIR: %[[A_ADDR:.*]] = cir.alloca !cir.complex<!cir.float>, !cir.ptr<!cir.complex<!cir.float>>, ["a", init] +// CIR: %[[RESULT:.*]] = cir.call @_Z24complex_type_return_typev() : () -> !cir.complex<!cir.float> +// CIR: cir.store{{.*}} %[[RESULT]], %[[A_ADDR]] : !cir.complex<!cir.float>, !cir.ptr<!cir.complex<!cir.float>> + +// TODO(CIR): the difference between the CIR LLVM and OGCG is because the lack of calling convention lowering, + +// LLVM: %[[A_ADDR:.*]] = alloca { float, float }, i64 1, align 4 +// LLVM: %[[RESULT:.*]] = call { float, float } @_Z24complex_type_return_typev() +// LLVM: store { float, float } %[[RESULT]], ptr %[[A_ADDR]], align 4 + +// OGCG: %[[A_ADDR:.*]] = alloca { float, float }, align 4 +// OGCG: %[[RESULT_ADDR:.*]] = alloca { float, float }, align 4 +// OGCG: %[[RESULT:.*]] = call noundef <2 x float> @_Z24complex_type_return_typev() +// OGCG: store <2 x float> %[[RESULT]], ptr %[[RESULT_ADDR]], align 4 +// OGCG: %[[RESULT_REAL_PTR:.*]] = getelementptr inbounds nuw { float, float }, ptr %[[RESULT_ADDR]], i32 0, i32 0 +// OGCG: %[[RESULT_REAL:.*]] = load float, ptr %[[RESULT_REAL_PTR]], align 4 +// OGCG: %[[RESULT_IMAG_PTR:.*]] = getelementptr inbounds nuw { float, float }, ptr %[[RESULT_ADDR]], i32 0, i32 1 +// OGCG: %[[RESULT_IMAG:.*]] = load float, ptr %[[RESULT_IMAG_PTR]], align 4 +// OGCG: %[[A_REAL_PTR:.*]] = getelementptr inbounds nuw { float, float }, ptr %[[A_ADDR]], i32 0, i32 0 +// OGCG: %[[A_IMAG_PTR:.*]] = getelementptr inbounds nuw { float, float }, ptr %[[A_ADDR]], i32 0, i32 1 +// OGCG: store float %[[RESULT_REAL]], ptr %[[A_REAL_PTR]], align 4 +// OGCG: store float %[[RESULT_IMAG]], ptr %[[A_IMAG_PTR]], align 4 diff --git a/clang/test/CIR/CodeGen/coro-task.cpp b/clang/test/CIR/CodeGen/coro-task.cpp index 1fc7d77..265325f 100644 --- a/clang/test/CIR/CodeGen/coro-task.cpp +++ b/clang/test/CIR/CodeGen/coro-task.cpp @@ -106,6 +106,9 @@ co_invoke_fn co_invoke; // CIR-NEXT: cir.global external @_ZN5folly4coro9co_invokeE = #cir.zero : !rec_folly3A3Acoro3A3Aco_invoke_fn // CIR: cir.func builtin private @__builtin_coro_id(!u32i, !cir.ptr<!void>, !cir.ptr<!void>, !cir.ptr<!void>) -> !u32i +// CIR: cir.func builtin private @__builtin_coro_alloc(!u32i) -> !cir.bool +// CIR: cir.func builtin private @__builtin_coro_size() -> !u64i +// CIR: cir.func builtin private @__builtin_coro_begin(!u32i, !cir.ptr<!void>) -> !cir.ptr<!void> using VoidTask = folly::coro::Task<void>; @@ -114,10 +117,24 @@ VoidTask silly_task() { } // CIR: cir.func coroutine dso_local @_Z10silly_taskv() -> ![[VoidTask]] -// CHECK: %[[#VoidTaskAddr:]] = cir.alloca ![[VoidTask]], {{.*}}, ["__retval"] +// CIR: %[[VoidTaskAddr:.*]] = cir.alloca ![[VoidTask]], {{.*}}, ["__retval"] +// CIR: %[[SavedFrameAddr:.*]] = cir.alloca !cir.ptr<!void>, !cir.ptr<!cir.ptr<!void>>, ["__coro_frame_addr"] // Get coroutine id with __builtin_coro_id. // CIR: %[[NullPtr:.*]] = cir.const #cir.ptr<null> : !cir.ptr<!void> // CIR: %[[Align:.*]] = cir.const #cir.int<16> : !u32i // CIR: %[[CoroId:.*]] = cir.call @__builtin_coro_id(%[[Align]], %[[NullPtr]], %[[NullPtr]], %[[NullPtr]]) + +// Perform allocation calling operator 'new' depending on __builtin_coro_alloc and +// call __builtin_coro_begin for the final coroutine frame address. + +// CIR: %[[ShouldAlloc:.*]] = cir.call @__builtin_coro_alloc(%[[CoroId]]) : (!u32i) -> !cir.bool +// CIR: cir.store{{.*}} %[[NullPtr]], %[[SavedFrameAddr]] : !cir.ptr<!void>, !cir.ptr<!cir.ptr<!void>> +// CIR: cir.if %[[ShouldAlloc]] { +// CIR: %[[CoroSize:.*]] = cir.call @__builtin_coro_size() : () -> !u64i +// CIR: %[[AllocAddr:.*]] = cir.call @_Znwm(%[[CoroSize]]) : (!u64i) -> !cir.ptr<!void> +// CIR: cir.store{{.*}} %[[AllocAddr]], %[[SavedFrameAddr]] : !cir.ptr<!void>, !cir.ptr<!cir.ptr<!void>> +// CIR: } +// CIR: %[[Load0:.*]] = cir.load{{.*}} %[[SavedFrameAddr]] : !cir.ptr<!cir.ptr<!void>>, !cir.ptr<!void> +// CIR: %[[CoroFrameAddr:.*]] = cir.call @__builtin_coro_begin(%[[CoroId]], %[[Load0]]) diff --git a/clang/test/CIR/CodeGenOpenACC/atomic-update.cpp b/clang/test/CIR/CodeGenOpenACC/atomic-update.cpp new file mode 100644 index 0000000..7ab6b62 --- /dev/null +++ b/clang/test/CIR/CodeGenOpenACC/atomic-update.cpp @@ -0,0 +1,151 @@ +// RUN: %clang_cc1 -fopenacc -triple x86_64-linux-gnu -Wno-openacc-self-if-potential-conflict -emit-cir -fclangir -triple x86_64-linux-pc %s -o - | FileCheck %s + +struct HasOps { + operator float(); + int thing(); +}; + +void use(int x, unsigned int y, float f, HasOps ops) { + // CHECK: cir.func{{.*}}(%[[X_ARG:.*]]: !s32i{{.*}}, %[[Y_ARG:.*]]: !u32i{{.*}}, %[[F_ARG:.*]]: !cir.float{{.*}}){{.*}}, %[[OPS_ARG:.*]]: !rec_HasOps{{.*}}) { + // CHECK-NEXT: %[[X_ALLOCA:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["x", init] + // CHECK-NEXT: %[[Y_ALLOCA:.*]] = cir.alloca !u32i, !cir.ptr<!u32i>, ["y", init] + // CHECK-NEXT: %[[F_ALLOCA:.*]] = cir.alloca !cir.float, !cir.ptr<!cir.float>, ["f", init] + // CHECK-NEXT: %[[OPS_ALLOCA:.*]] = cir.alloca !rec_HasOps, !cir.ptr<!rec_HasOps>, ["ops", init] + // CHECK-NEXT: cir.store %[[X_ARG]], %[[X_ALLOCA]] : !s32i, !cir.ptr<!s32i> + // CHECK-NEXT: cir.store %[[Y_ARG]], %[[Y_ALLOCA]] : !u32i, !cir.ptr<!u32i> + // CHECK-NEXT: cir.store %[[F_ARG]], %[[F_ALLOCA]] : !cir.float, !cir.ptr<!cir.float> + // CHECK-NEXT: cir.store %[[OPS_ARG]], %[[OPS_ALLOCA]] : !rec_HasOps, !cir.ptr<!rec_HasOps> + + // CHECK-NEXT: acc.atomic.update %[[X_ALLOCA]] : !cir.ptr<!s32i> { + // CHECK-NEXT: ^bb0(%[[RECIPE_ARG:.*]]: !s32i{{.*}}): + // CHECK-NEXT: %[[TEMP_ALLOCA:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["x_var", init] + // CHECK-NEXT: cir.store %[[RECIPE_ARG]], %[[TEMP_ALLOCA]] : !s32i, !cir.ptr<!s32i> + // + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!s32i>, !s32i + // CHECK-NEXT: %[[INC:.*]] = cir.unary(inc, %[[TEMP_LOAD]]) nsw : !s32i, !s32i + // CHECK-NEXT: cir.store {{.*}}%[[INC]], %[[TEMP_ALLOCA]] : !s32i, !cir.ptr<!s32i> + // + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!s32i>, !s32i + // CHECK-NEXT: acc.yield %[[TEMP_LOAD]] : !s32i + // CHECK-NEXT: } +#pragma acc atomic update + ++x; + + // CHECK-NEXT: acc.atomic.update %[[Y_ALLOCA]] : !cir.ptr<!u32i> { + // CHECK-NEXT: ^bb0(%[[RECIPE_ARG:.*]]: !u32i{{.*}}): + // CHECK-NEXT: %[[TEMP_ALLOCA:.*]] = cir.alloca !u32i, !cir.ptr<!u32i>, ["x_var", init] + // CHECK-NEXT: cir.store %[[RECIPE_ARG]], %[[TEMP_ALLOCA]] : !u32i, !cir.ptr<!u32i> + // + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!u32i>, !u32i + // CHECK-NEXT: %[[INC:.*]] = cir.unary(inc, %[[TEMP_LOAD]]) : !u32i, !u32i + // CHECK-NEXT: cir.store {{.*}}%[[INC]], %[[TEMP_ALLOCA]] : !u32i, !cir.ptr<!u32i> + // + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!u32i>, !u32i + // CHECK-NEXT: acc.yield %[[TEMP_LOAD]] : !u32i + // CHECK-NEXT: } +#pragma acc atomic update + y++; + + // CHECK-NEXT: acc.atomic.update %[[F_ALLOCA]] : !cir.ptr<!cir.float> { + // CHECK-NEXT: ^bb0(%[[RECIPE_ARG:.*]]: !cir.float{{.*}}): + // CHECK-NEXT: %[[TEMP_ALLOCA:.*]] = cir.alloca !cir.float, !cir.ptr<!cir.float>, ["x_var", init] + // CHECK-NEXT: cir.store %[[RECIPE_ARG]], %[[TEMP_ALLOCA]] : !cir.float, !cir.ptr<!cir.float> + // + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!cir.float>, !cir.float + // CHECK-NEXT: %[[INC:.*]] = cir.unary(dec, %[[TEMP_LOAD]]) : !cir.float, !cir.float + // CHECK-NEXT: cir.store {{.*}}%[[INC]], %[[TEMP_ALLOCA]] : !cir.float, !cir.ptr<!cir.float> + // + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!cir.float>, !cir.float + // CHECK-NEXT: acc.yield %[[TEMP_LOAD]] : !cir.float + // CHECK-NEXT: } +#pragma acc atomic update + f--; + + // CHECK-NEXT: acc.atomic.update %[[X_ALLOCA]] : !cir.ptr<!s32i> { + // CHECK-NEXT: ^bb0(%[[RECIPE_ARG:.*]]: !s32i{{.*}}): + // CHECK-NEXT: %[[TEMP_ALLOCA:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["x_var", init] + // CHECK-NEXT: cir.store %[[RECIPE_ARG]], %[[TEMP_ALLOCA]] : !s32i, !cir.ptr<!s32i> + // + // CHECK-NEXT: %[[F_LOAD:.*]] = cir.load{{.*}} %[[F_ALLOCA]] : !cir.ptr<!cir.float>, !cir.float + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!s32i>, !s32i + // CHECK-NEXT: %[[INT_TO_F:.*]] = cir.cast int_to_float %[[TEMP_LOAD]] : !s32i -> !cir.float + // CHECK-NEXT: %[[ADD:.*]] = cir.binop(add, %[[INT_TO_F]], %[[F_LOAD]]) : !cir.float + // CHECK-NEXT: %[[F_TO_INT:.*]] = cir.cast float_to_int %[[ADD]] : !cir.float -> !s32i + // CHECK-NEXT: cir.store{{.*}} %[[F_TO_INT]], %[[TEMP_ALLOCA]] : !s32i, !cir.ptr<!s32i> + // + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!s32i>, !s32i + // CHECK-NEXT: acc.yield %[[TEMP_LOAD]] : !s32i + // CHECK-NEXT: } +#pragma acc atomic update + x += f; + + // CHECK-NEXT: acc.atomic.update %[[F_ALLOCA]] : !cir.ptr<!cir.float> { + // CHECK-NEXT: ^bb0(%[[RECIPE_ARG:.*]]: !cir.float{{.*}}): + // CHECK-NEXT: %[[TEMP_ALLOCA:.*]] = cir.alloca !cir.float, !cir.ptr<!cir.float>, ["x_var", init] + // CHECK-NEXT: cir.store %[[RECIPE_ARG]], %[[TEMP_ALLOCA]] : !cir.float, !cir.ptr<!cir.float> + // + // CHECK-NEXT: %[[Y_LOAD:.*]] = cir.load{{.*}} %[[Y_ALLOCA]] : !cir.ptr<!u32i>, !u32i + // CHECK-NEXT: %[[INT_TO_F:.*]] = cir.cast int_to_float %[[Y_LOAD]] : !u32i -> !cir.float + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!cir.float>, !cir.float + // CHECK-NEXT: %[[DIV:.*]] = cir.binop(div, %[[TEMP_LOAD]], %[[INT_TO_F]]) : !cir.float + // CHECK-NEXT: cir.store{{.*}} %[[DIV]], %[[TEMP_ALLOCA]] : !cir.float, !cir.ptr<!cir.float> + // + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!cir.float>, !cir.float + // CHECK-NEXT: acc.yield %[[TEMP_LOAD]] : !cir.float + // CHECK-NEXT: } +#pragma acc atomic update + f /= y; + + // CHECK-NEXT: acc.atomic.update %[[Y_ALLOCA]] : !cir.ptr<!u32i> { + // CHECK-NEXT: ^bb0(%[[RECIPE_ARG:.*]]: !u32i{{.*}}): + // CHECK-NEXT: %[[TEMP_ALLOCA:.*]] = cir.alloca !u32i, !cir.ptr<!u32i>, ["x_var", init] + // CHECK-NEXT: cir.store %[[RECIPE_ARG]], %[[TEMP_ALLOCA]] : !u32i, !cir.ptr<!u32i> + // + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!u32i>, !u32i + // CHECK-NEXT: %[[CALL:.*]] = cir.call {{.*}}(%[[OPS_ALLOCA]]) : (!cir.ptr<!rec_HasOps>) -> !s32i + // CHECK-NEXT: %[[CALL_CAST:.*]] = cir.cast integral %[[CALL]] : !s32i -> !u32i + // CHECK-NEXT: %[[MUL:.*]] = cir.binop(mul, %[[TEMP_LOAD]], %[[CALL_CAST]]) : !u32i + // CHECK-NEXT: cir.store{{.*}} %[[MUL]], %[[TEMP_ALLOCA]] : !u32i, !cir.ptr<!u32i> + // + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!u32i>, !u32i + // CHECK-NEXT: acc.yield %[[TEMP_LOAD]] : !u32i + // CHECK-NEXT: } + +#pragma acc atomic update + y = y * ops.thing(); + + // CHECK-NEXT: acc.atomic.update %[[X_ALLOCA]] : !cir.ptr<!s32i> { + // CHECK-NEXT: ^bb0(%[[RECIPE_ARG:.*]]: !s32i{{.*}}): + // CHECK-NEXT: %[[TEMP_ALLOCA:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["x_var", init] + // CHECK-NEXT: cir.store %[[RECIPE_ARG]], %[[TEMP_ALLOCA]] : !s32i, !cir.ptr<!s32i> + // + // CHECK-NEXT: %[[CALL:.*]] = cir.call {{.*}}(%[[OPS_ALLOCA]]) : (!cir.ptr<!rec_HasOps>) -> !s32i + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!s32i>, !s32i + // CHECK-NEXT: %[[OR:.*]] = cir.binop(or, %[[CALL]], %[[INT_TO_F]]) : !s32i + // CHECK-NEXT: cir.store{{.*}} %[[OR]], %[[TEMP_ALLOCA]] : !s32i, !cir.ptr<!s32i> + // + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!s32i>, !s32i + // CHECK-NEXT: acc.yield %[[TEMP_LOAD]] : !s32i + // CHECK-NEXT: } +#pragma acc atomic update + x = ops.thing() | x; + + // CHECK-NEXT: %[[X_LOAD:.*]] = cir.load{{.*}} %[[X_ALLOCA]] : !cir.ptr<!s32i>, !s32i + // CHECK-NEXT: %[[BOOL_CAST:.*]] = cir.cast int_to_bool %[[X_LOAD]] : !s32i -> !cir.bool + // CHECK-NEXT: %[[X_CAST:.*]] = builtin.unrealized_conversion_cast %[[BOOL_CAST]] : !cir.bool to i1 + // CHECK-NEXT: acc.atomic.update if(%[[X_CAST]]) %[[F_ALLOCA]] : !cir.ptr<!cir.float> { + // CHECK-NEXT: ^bb0(%[[RECIPE_ARG:.*]]: !cir.float{{.*}}): + // CHECK-NEXT: %[[TEMP_ALLOCA:.*]] = cir.alloca !cir.float, !cir.ptr<!cir.float>, ["x_var", init] + // CHECK-NEXT: cir.store %[[RECIPE_ARG]], %[[TEMP_ALLOCA]] : !cir.float, !cir.ptr<!cir.float> + // + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!cir.float>, !cir.float + // CHECK-NEXT: %[[CALL:.*]] = cir.call {{.*}}(%[[OPS_ALLOCA]]) : (!cir.ptr<!rec_HasOps>) -> !cir.float + // CHECK-NEXT: %[[SUB:.*]] = cir.binop(sub, %[[TEMP_LOAD]], %[[CALL]]) : !cir.float + // CHECK-NEXT: cir.store{{.*}} %[[SUB]], %[[TEMP_ALLOCA]] : !cir.float, !cir.ptr<!cir.float> + // + // CHECK-NEXT: %[[TEMP_LOAD:.*]] = cir.load{{.*}} %[[TEMP_ALLOCA]] : !cir.ptr<!cir.float>, !cir.float + // CHECK-NEXT: acc.yield %[[TEMP_LOAD]] : !cir.float + // CHECK-NEXT: } +#pragma acc atomic update if (x) + f = f - ops; +} diff --git a/clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp b/clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp index 33e12fe..b4d76e1 100644 --- a/clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp +++ b/clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp @@ -3,8 +3,8 @@ void HelloWorld(int *A, int *B, int *C, int N) { // expected-error@+1{{ClangIR code gen Not Yet Implemented: OpenACC Atomic Construct}} -#pragma acc atomic - N = N + 1; +#pragma acc atomic capture + B = A += ++N; // expected-error@+1{{ClangIR code gen Not Yet Implemented: OpenACC Declare Construct}} #pragma acc declare create(A) diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e4m3.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e4m3.c new file mode 100644 index 0000000..d162f44 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e4m3.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8f \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_e4m3_e4m3_w4_u8m8_u8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.e4m3.e4m3.i64.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_e4m3_e4m3_w4_u8m8_u8m8(vuint8m8_t vs2, vuint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_e4m3_e4m3_w4_u8m8_u8m8(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e5m2.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e5m2.c new file mode 100644 index 0000000..342af1e --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e5m2.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8f \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_e4m3_e5m2_w4_u8m8_u8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.e4m3.e5m2.i64.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_e4m3_e5m2_w4_u8m8_u8m8(vuint8m8_t vs2, vuint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_e4m3_e5m2_w4_u8m8_u8m8(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e4m3.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e4m3.c new file mode 100644 index 0000000..b8f58fe --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e4m3.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8f \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_e5m2_e4m3_w4_u8m8_u8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.e5m2.e4m3.i64.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_e5m2_e4m3_w4_u8m8_u8m8(vuint8m8_t vs2, vuint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_e5m2_e4m3_w4_u8m8_u8m8(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e5m2.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e5m2.c new file mode 100644 index 0000000..7c2eb32 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e5m2.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8f \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_e5m2_e5m2_w4_u8m8_u8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.e5m2.e5m2.i64.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_e5m2_e5m2_w4_u8m8_u8m8(vuint8m8_t vs2, vuint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_e5m2_e5m2_w4_u8m8_u8m8(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_f_f.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_f_f.c new file mode 100644 index 0000000..262bc0a --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_f_f.c @@ -0,0 +1,40 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a16f \ +// RUN: -target-feature +xsfmm32a32f -target-feature +xsfmm64a64f \ +// RUN: -target-feature +zvfhmin -target-feature +zve64d -disable-O0-optnone \ +// RUN: -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_f_f_w2_f16m8( +// CHECK-RV64-SAME: <vscale x 32 x half> [[VS2:%.*]], <vscale x 32 x half> [[VS1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.f.f.i64.nxv32f16(i64 0, <vscale x 32 x half> [[VS2]], <vscale x 32 x half> [[VS1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 2) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_f_f_w2_f16m8(vfloat16m8_t vs2, vfloat16m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_f_f_w2_f16m8(0, vs2, vs1, tm, tn, tk); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_f_f_w1_f32m8( +// CHECK-RV64-SAME: <vscale x 16 x float> [[VS2:%.*]], <vscale x 16 x float> [[VS1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.f.f.i64.nxv16f32(i64 0, <vscale x 16 x float> [[VS2]], <vscale x 16 x float> [[VS1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 1) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_f_f_w1_f32m8(vfloat32m8_t vs2, vfloat32m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_f_f_w1_f32m8(0, vs2, vs1, tm, tn, tk); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_f_f_w1_f64m8( +// CHECK-RV64-SAME: <vscale x 8 x double> [[VS2:%.*]], <vscale x 8 x double> [[VS1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.f.f.i64.nxv8f64(i64 0, <vscale x 8 x double> [[VS2]], <vscale x 8 x double> [[VS1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 1) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_f_f_w1_f64m8(vfloat64m8_t vs2, vfloat64m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_f_f_w1_f64m8(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_s_s.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_s_s.c new file mode 100644 index 0000000..35c6756 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_s_s.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8i \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_s_s_w4_i8m8_i8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.s.s.i64.nxv64i8.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_s_s_w4_i8m8_i8m8(vint8m8_t vs2, vint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_s_s_w4_i8m8_i8m8(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_s_u.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_s_u.c new file mode 100644 index 0000000..c142fcc --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_s_u.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8i \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_s_u_w4_i8m8_u8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.s.u.i64.nxv64i8.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_s_u_w4_i8m8_u8m8(vint8m8_t vs2, vuint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_s_u_w4_i8m8_u8m8(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_u_s.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_u_s.c new file mode 100644 index 0000000..46350e5 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_u_s.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8i \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_u_s_w4_u8m8_i8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.u.s.i64.nxv64i8.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_u_s_w4_u8m8_i8m8(vuint8m8_t vs2, vint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_u_s_w4_u8m8_i8m8(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_u_u.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_u_u.c new file mode 100644 index 0000000..de84db5 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_u_u.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8i \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_u_u_w4_u8m8_u8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.u.u.i64.nxv64i8.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_u_u_w4_u8m8_u8m8(vuint8m8_t vs2, vuint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_u_u_w4_u8m8_u8m8(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte16.c new file mode 100644 index 0000000..2c23176 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte16.c @@ -0,0 +1,49 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -target-feature +zvfhmin -target-feature +zvfbfmin \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte16_bf16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte16_bf16(size_t tss, __bf16 *base, size_t vl) { + return __riscv_sf_vlte16_bf16(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte16_f16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte16_f16(size_t tss, _Float16 *base, size_t vl) { + return __riscv_sf_vlte16_f16(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte16_i16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte16_i16(size_t tss, int16_t *base, size_t vl) { + return __riscv_sf_vlte16_i16(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte16_u16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte16_u16(size_t tss, uint16_t *base, size_t vl) { + return __riscv_sf_vlte16_u16(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte32.c new file mode 100644 index 0000000..a0422cf --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte32.c @@ -0,0 +1,38 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte32_f32( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte32.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte32_f32(size_t tss, float *base, size_t vl) { + return __riscv_sf_vlte32_f32(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte32_i32( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte32.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte32_i32(size_t tss, int32_t *base, size_t vl) { + return __riscv_sf_vlte32_i32(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte32_u32( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte32.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte32_u32(size_t tss, uint32_t *base, size_t vl) { + return __riscv_sf_vlte32_u32(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte64.c new file mode 100644 index 0000000..e8b9552 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte64.c @@ -0,0 +1,38 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte64_f64( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte64.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte64_f64(size_t tss, double *base, size_t vl) { + return __riscv_sf_vlte64_f64(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte64_i64( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte64.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte64_i64(size_t tss, int64_t *base, size_t vl) { + return __riscv_sf_vlte64_i64(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte64_u64( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte64.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte64_u64(size_t tss, uint64_t *base, size_t vl) { + return __riscv_sf_vlte64_u64(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte8.c new file mode 100644 index 0000000..a86ccec --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte8.c @@ -0,0 +1,28 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte8_i8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte8.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte8_i8(size_t tss, int8_t *base, size_t vl) { + return __riscv_sf_vlte8_i8(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte8_u8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte8.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte8_u8(size_t tss, uint8_t *base, size_t vl) { + return __riscv_sf_vlte8_u8(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettk.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettk.c new file mode 100644 index 0000000..32b7bce8 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettk.c @@ -0,0 +1,99 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -target-feature +zve64x \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettk_e8w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettk.i64(i64 [[TN]], i64 0, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettk_e8w1(size_t tn) { + return __riscv_sf_vsettk_e8w1(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettk_e8w2( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettk.i64(i64 [[TN]], i64 0, i64 2) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettk_e8w2(size_t tn) { + return __riscv_sf_vsettk_e8w2(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettk_e8w4( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettk.i64(i64 [[TN]], i64 0, i64 3) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettk_e8w4(size_t tn) { + return __riscv_sf_vsettk_e8w4(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettk_e16w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettk.i64(i64 [[TN]], i64 1, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettk_e16w1(size_t tn) { + return __riscv_sf_vsettk_e16w1(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettk_e16w2( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettk.i64(i64 [[TN]], i64 1, i64 2) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettk_e16w2(size_t tn) { + return __riscv_sf_vsettk_e16w2(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettk_e16w4( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettk.i64(i64 [[TN]], i64 1, i64 3) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettk_e16w4(size_t tn) { + return __riscv_sf_vsettk_e16w4(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettk_e32w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettk.i64(i64 [[TN]], i64 2, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettk_e32w1(size_t tn) { + return __riscv_sf_vsettk_e32w1(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettk_e32w2( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettk.i64(i64 [[TN]], i64 2, i64 2) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettk_e32w2(size_t tn) { + return __riscv_sf_vsettk_e32w2(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettk_e64w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettk.i64(i64 [[TN]], i64 3, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettk_e64w1(size_t tn) { + return __riscv_sf_vsettk_e64w1(tn); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettm.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettm.c new file mode 100644 index 0000000..0ce7c578 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettm.c @@ -0,0 +1,99 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -target-feature +zve64x \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e8w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 0, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettm_e8w1(size_t tn) { + return __riscv_sf_vsettm_e8w1(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e8w2( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 0, i64 2) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettm_e8w2(size_t tn) { + return __riscv_sf_vsettm_e8w2(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e8w4( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 0, i64 3) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettm_e8w4(size_t tn) { + return __riscv_sf_vsettm_e8w4(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e16w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 1, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettm_e16w1(size_t tn) { + return __riscv_sf_vsettm_e16w1(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e16w2( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 1, i64 2) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettm_e16w2(size_t tn) { + return __riscv_sf_vsettm_e16w2(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e16w4( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 1, i64 3) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettm_e16w4(size_t tn) { + return __riscv_sf_vsettm_e16w4(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e32w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 2, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettm_e32w1(size_t tn) { + return __riscv_sf_vsettm_e32w1(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e32w2( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 2, i64 2) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettm_e32w2(size_t tn) { + return __riscv_sf_vsettm_e32w2(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettm_e64w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettm.i64(i64 [[TN]], i64 3, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettm_e64w1(size_t tn) { + return __riscv_sf_vsettm_e64w1(tn); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettn.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettn.c new file mode 100644 index 0000000..7b058f4 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettn.c @@ -0,0 +1,99 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -target-feature +zve64x \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettn_e8w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 0, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettn_e8w1(size_t tn) { + return __riscv_sf_vsettn_e8w1(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettn_e8w2( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 0, i64 2) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettn_e8w2(size_t tn) { + return __riscv_sf_vsettn_e8w2(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettn_e8w4( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 0, i64 3) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettn_e8w4(size_t tn) { + return __riscv_sf_vsettn_e8w4(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettn_e16w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 1, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettn_e16w1(size_t tn) { + return __riscv_sf_vsettn_e16w1(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettn_e16w2( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 1, i64 2) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettn_e16w2(size_t tn) { + return __riscv_sf_vsettn_e16w2(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettn_e16w4( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 1, i64 3) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettn_e16w4(size_t tn) { + return __riscv_sf_vsettn_e16w4(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettn_e32w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 2, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettn_e32w1(size_t tn) { + return __riscv_sf_vsettn_e32w1(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettn_e32w2( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 2, i64 2) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettn_e32w2(size_t tn) { + return __riscv_sf_vsettn_e32w2(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettn_e64w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 3, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettn_e64w1(size_t tn) { + return __riscv_sf_vsettn_e64w1(tn); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettnt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettnt.c new file mode 100644 index 0000000..29eaec3 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettnt.c @@ -0,0 +1,99 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -target-feature +zve64x \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettnt_e8w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 0, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettnt_e8w1(size_t tn) { + return __riscv_sf_vsettnt_e8w1(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettnt_e8w2( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 0, i64 2) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettnt_e8w2(size_t tn) { + return __riscv_sf_vsettnt_e8w2(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettnt_e8w4( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 0, i64 3) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettnt_e8w4(size_t tn) { + return __riscv_sf_vsettnt_e8w4(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettnt_e16w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 1, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettnt_e16w1(size_t tn) { + return __riscv_sf_vsettnt_e16w1(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettnt_e16w2( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 1, i64 2) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettnt_e16w2(size_t tn) { + return __riscv_sf_vsettnt_e16w2(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettnt_e16w4( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 1, i64 3) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettnt_e16w4(size_t tn) { + return __riscv_sf_vsettnt_e16w4(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettnt_e32w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 2, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettnt_e32w1(size_t tn) { + return __riscv_sf_vsettnt_e32w1(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettnt_e32w2( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 2, i64 2) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettnt_e32w2(size_t tn) { + return __riscv_sf_vsettnt_e32w2(tn); +} + +// CHECK-RV64-LABEL: define dso_local i64 @test_sf_vsettnt_e64w1( +// CHECK-RV64-SAME: i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.sf.vsettnt.i64(i64 [[TN]], i64 3, i64 1) +// CHECK-RV64-NEXT: ret i64 [[TMP0]] +// +size_t test_sf_vsettnt_e64w1(size_t tn) { + return __riscv_sf_vsettnt_e64w1(tn); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste16.c new file mode 100644 index 0000000..bf50e7f --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste16.c @@ -0,0 +1,49 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -target-feature +zvfhmin -target-feature +zvfbfmin \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste16_bf16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste16_bf16(size_t tss, __bf16 *base, size_t vl) { + return __riscv_sf_vste16_bf16(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste16_f16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste16_f16(size_t tss, _Float16 *base, size_t vl) { + return __riscv_sf_vste16_f16(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste16_i16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste16_i16(size_t tss, int16_t *base, size_t vl) { + return __riscv_sf_vste16_i16(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste16_u16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste16_u16(size_t tss, uint16_t *base, size_t vl) { + return __riscv_sf_vste16_u16(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste32.c new file mode 100644 index 0000000..d1d7191 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste32.c @@ -0,0 +1,38 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste32_f32( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste32.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste32_f32(size_t tss, float *base, size_t vl) { + return __riscv_sf_vste32_f32(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste32_i32( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste32.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste32_i32(size_t tss, int32_t *base, size_t vl) { + return __riscv_sf_vste32_i32(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste32_u32( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste32.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste32_u32(size_t tss, uint32_t *base, size_t vl) { + return __riscv_sf_vste32_u32(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste64.c new file mode 100644 index 0000000..4c7d4b1 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste64.c @@ -0,0 +1,38 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste64_f64( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste64.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste64_f64(size_t tss, double *base, size_t vl) { + return __riscv_sf_vste64_f64(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste64_i64( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste64.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste64_i64(size_t tss, int64_t *base, size_t vl) { + return __riscv_sf_vste64_i64(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste64_u64( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste64.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste64_u64(size_t tss, uint64_t *base, size_t vl) { + return __riscv_sf_vste64_u64(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste8.c new file mode 100644 index 0000000..d03bc61 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste8.c @@ -0,0 +1,28 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste8_i8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste8.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste8_i8(size_t tss, int8_t *base, size_t vl) { + return __riscv_sf_vste8_i8(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste8_u8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste8.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste8_u8(size_t tss, uint8_t *base, size_t vl) { + return __riscv_sf_vste8_u8(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtdiscard.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtdiscard.c new file mode 100644 index 0000000..7eef2c9 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtdiscard.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtdiscard( +// CHECK-RV64-SAME: ) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtdiscard() +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtdiscard() { + return __riscv_sf_vtdiscard(); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtmv_t_v.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtmv_t_v.c new file mode 100644 index 0000000..37ee503 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtmv_t_v.c @@ -0,0 +1,130 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -target-feature +zvfhmin -target-feature +zvfbfmin \ +// RUN: -target-feature +zve64d \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_bf16m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 32 x bfloat> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv32bf16.i64(i64 [[TSS]], <vscale x 32 x bfloat> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_bf16m8(size_t tss, vbfloat16m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v_bf16m8(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_f16m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 32 x half> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv32f16.i64(i64 [[TSS]], <vscale x 32 x half> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_f16m8(size_t tss, vfloat16m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v_f16m8(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_f32m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 16 x float> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv16f32.i64(i64 [[TSS]], <vscale x 16 x float> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_f32m8(size_t tss, vfloat32m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v_f32m8(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_f64m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 8 x double> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv8f64.i64(i64 [[TSS]], <vscale x 8 x double> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_f64m8(size_t tss, vfloat64m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v_f64m8(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_i8m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 64 x i8> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv64i8.i64(i64 [[TSS]], <vscale x 64 x i8> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_i8m8(size_t tss, vint8m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v_i8m8(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_i16m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 32 x i16> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv32i16.i64(i64 [[TSS]], <vscale x 32 x i16> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_i16m8(size_t tss, vint16m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v_i16m8(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_i32m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 16 x i32> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv16i32.i64(i64 [[TSS]], <vscale x 16 x i32> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_i32m8(size_t tss, vint32m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v_i32m8(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_i64m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 8 x i64> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv8i64.i64(i64 [[TSS]], <vscale x 8 x i64> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_i64m8(size_t tss, vint64m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v_i64m8(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_u8m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 64 x i8> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv64i8.i64(i64 [[TSS]], <vscale x 64 x i8> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_u8m8(size_t tss, vuint8m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v_u8m8(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_u16m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 32 x i16> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv32i16.i64(i64 [[TSS]], <vscale x 32 x i16> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_u16m8(size_t tss, vuint16m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v_u16m8(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_u32m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 16 x i32> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv16i32.i64(i64 [[TSS]], <vscale x 16 x i32> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_u32m8(size_t tss, vuint32m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v_u32m8(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_u64m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 8 x i64> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv8i64.i64(i64 [[TSS]], <vscale x 8 x i64> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_u64m8(size_t tss, vuint64m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v_u64m8(tss, src, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtmv_v_t.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtmv_v_t.c new file mode 100644 index 0000000..d127cf4 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtmv_v_t.c @@ -0,0 +1,130 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -target-feature +zvfhmin -target-feature +zvfbfmin \ +// RUN: -target-feature +zve64d \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_sf_vtmv_v_t_bf16m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.sf.vtmv.v.t.nxv32bf16.i64(i64 [[TSS]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret <vscale x 32 x bfloat> [[TMP0]] +// +vbfloat16m8_t test_sf_vtmv_v_t_bf16m8(size_t tss, size_t vl) { + return __riscv_sf_vtmv_v_t_bf16m8(tss, vl); +} + +// CHECK-RV64-LABEL: define dso_local <vscale x 32 x half> @test_sf_vtmv_v_t_f16m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x half> @llvm.riscv.sf.vtmv.v.t.nxv32f16.i64(i64 [[TSS]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret <vscale x 32 x half> [[TMP0]] +// +vfloat16m8_t test_sf_vtmv_v_t_f16m8(size_t tss, size_t vl) { + return __riscv_sf_vtmv_v_t_f16m8(tss, vl); +} + +// CHECK-RV64-LABEL: define dso_local <vscale x 16 x float> @test_sf_vtmv_v_t_f32m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x float> @llvm.riscv.sf.vtmv.v.t.nxv16f32.i64(i64 [[TSS]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret <vscale x 16 x float> [[TMP0]] +// +vfloat32m8_t test_sf_vtmv_v_t_f32m8(size_t tss, size_t vl) { + return __riscv_sf_vtmv_v_t_f32m8(tss, vl); +} + +// CHECK-RV64-LABEL: define dso_local <vscale x 8 x double> @test_sf_vtmv_v_t_f64m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x double> @llvm.riscv.sf.vtmv.v.t.nxv8f64.i64(i64 [[TSS]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret <vscale x 8 x double> [[TMP0]] +// +vfloat64m8_t test_sf_vtmv_v_t_f64m8(size_t tss, size_t vl) { + return __riscv_sf_vtmv_v_t_f64m8(tss, vl); +} + +// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_sf_vtmv_v_t_i8m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.sf.vtmv.v.t.nxv64i8.i64(i64 [[TSS]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]] +// +vint8m8_t test_sf_vtmv_v_t_i8m8(size_t tss, size_t vl) { + return __riscv_sf_vtmv_v_t_i8m8(tss, vl); +} + +// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_sf_vtmv_v_t_i16m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.sf.vtmv.v.t.nxv32i16.i64(i64 [[TSS]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]] +// +vint16m8_t test_sf_vtmv_v_t_i16m8(size_t tss, size_t vl) { + return __riscv_sf_vtmv_v_t_i16m8(tss, vl); +} + +// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_sf_vtmv_v_t_i32m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.sf.vtmv.v.t.nxv16i32.i64(i64 [[TSS]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]] +// +vint32m8_t test_sf_vtmv_v_t_i32m8(size_t tss, size_t vl) { + return __riscv_sf_vtmv_v_t_i32m8(tss, vl); +} + +// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_sf_vtmv_v_t_i64m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.sf.vtmv.v.t.nxv8i64.i64(i64 [[TSS]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]] +// +vint64m8_t test_sf_vtmv_v_t_i64m8(size_t tss, size_t vl) { + return __riscv_sf_vtmv_v_t_i64m8(tss, vl); +} + +// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_sf_vtmv_v_t_u8m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.sf.vtmv.v.t.nxv64i8.i64(i64 [[TSS]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]] +// +vuint8m8_t test_sf_vtmv_v_t_u8m8(size_t tss, size_t vl) { + return __riscv_sf_vtmv_v_t_u8m8(tss, vl); +} + +// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_sf_vtmv_v_t_u16m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.sf.vtmv.v.t.nxv32i16.i64(i64 [[TSS]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]] +// +vuint16m8_t test_sf_vtmv_v_t_u16m8(size_t tss, size_t vl) { + return __riscv_sf_vtmv_v_t_u16m8(tss, vl); +} + +// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_sf_vtmv_v_t_u32m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.sf.vtmv.v.t.nxv16i32.i64(i64 [[TSS]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]] +// +vuint32m8_t test_sf_vtmv_v_t_u32m8(size_t tss, size_t vl) { + return __riscv_sf_vtmv_v_t_u32m8(tss, vl); +} + +// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_sf_vtmv_v_t_u64m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.sf.vtmv.v.t.nxv8i64.i64(i64 [[TSS]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]] +// +vuint64m8_t test_sf_vtmv_v_t_u64m8(size_t tss, size_t vl) { + return __riscv_sf_vtmv_v_t_u64m8(tss, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtzero_t.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtzero_t.c new file mode 100644 index 0000000..1e4de48 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtzero_t.c @@ -0,0 +1,99 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -target-feature +zve64x \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtzero_t_e8w1( +// CHECK-RV64-SAME: i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtzero.t.i64(i64 0, i64 [[TM]], i64 [[TN]], i64 3, i64 1) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtzero_t_e8w1(size_t tm, size_t tn) { + return __riscv_sf_vtzero_t_e8w1(0, tm, tn); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtzero_t_e8w2( +// CHECK-RV64-SAME: i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtzero.t.i64(i64 0, i64 [[TM]], i64 [[TN]], i64 3, i64 2) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtzero_t_e8w2(size_t tm, size_t tn) { + return __riscv_sf_vtzero_t_e8w2(0, tm, tn); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtzero_t_e8w4( +// CHECK-RV64-SAME: i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtzero.t.i64(i64 0, i64 [[TM]], i64 [[TN]], i64 3, i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtzero_t_e8w4(size_t tm, size_t tn) { + return __riscv_sf_vtzero_t_e8w4(0, tm, tn); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtzero_t_e16w1( +// CHECK-RV64-SAME: i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtzero.t.i64(i64 0, i64 [[TM]], i64 [[TN]], i64 4, i64 1) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtzero_t_e16w1(size_t tm, size_t tn) { + return __riscv_sf_vtzero_t_e16w1(0, tm, tn); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtzero_t_e16w2( +// CHECK-RV64-SAME: i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtzero.t.i64(i64 0, i64 [[TM]], i64 [[TN]], i64 4, i64 2) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtzero_t_e16w2(size_t tm, size_t tn) { + return __riscv_sf_vtzero_t_e16w2(0, tm, tn); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtzero_t_e16w4( +// CHECK-RV64-SAME: i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtzero.t.i64(i64 0, i64 [[TM]], i64 [[TN]], i64 4, i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtzero_t_e16w4(size_t tm, size_t tn) { + return __riscv_sf_vtzero_t_e16w4(0, tm, tn); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtzero_t_e32w1( +// CHECK-RV64-SAME: i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtzero.t.i64(i64 0, i64 [[TM]], i64 [[TN]], i64 5, i64 1) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtzero_t_e32w1(size_t tm, size_t tn) { + return __riscv_sf_vtzero_t_e32w1(0, tm, tn); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtzero_t_e32w2( +// CHECK-RV64-SAME: i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtzero.t.i64(i64 0, i64 [[TM]], i64 [[TN]], i64 5, i64 2) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtzero_t_e32w2(size_t tm, size_t tn) { + return __riscv_sf_vtzero_t_e32w2(0, tm, tn); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtzero_t_e64w1( +// CHECK-RV64-SAME: i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtzero.t.i64(i64 0, i64 [[TM]], i64 [[TN]], i64 6, i64 1) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtzero_t_e64w1(size_t tm, size_t tn) { + return __riscv_sf_vtzero_t_e64w1(0, tm, tn); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e4m3.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e4m3.c new file mode 100644 index 0000000..2f6c4dc --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e4m3.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8f \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_e4m3_e4m3_w4_u8m8_u8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.e4m3.e4m3.i64.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_e4m3_e4m3_w4_u8m8_u8m8(vuint8m8_t vs2, vuint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_e4m3_e4m3(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e5m2.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e5m2.c new file mode 100644 index 0000000..40ae780 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e5m2.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8f \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_e4m3_e5m2_w4_u8m8_u8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.e4m3.e5m2.i64.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_e4m3_e5m2_w4_u8m8_u8m8(vuint8m8_t vs2, vuint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_e4m3_e5m2(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e4m3.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e4m3.c new file mode 100644 index 0000000..f4f024c --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e4m3.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8f \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_e5m2_e4m3_w4_u8m8_u8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.e5m2.e4m3.i64.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_e5m2_e4m3_w4_u8m8_u8m8(vuint8m8_t vs2, vuint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_e5m2_e4m3(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e5m2.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e5m2.c new file mode 100644 index 0000000..01399d5 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e5m2.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8f \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_e5m2_e5m2_w4_u8m8_u8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.e5m2.e5m2.i64.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_e5m2_e5m2_w4_u8m8_u8m8(vuint8m8_t vs2, vuint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_e5m2_e5m2(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_f_f.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_f_f.c new file mode 100644 index 0000000..2371e4e --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_f_f.c @@ -0,0 +1,40 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a16f \ +// RUN: -target-feature +xsfmm32a32f -target-feature +xsfmm64a64f \ +// RUN: -target-feature +zvfhmin -target-feature +zve64d -disable-O0-optnone \ +// RUN: -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_f_f_w2_f16m8( +// CHECK-RV64-SAME: <vscale x 32 x half> [[VS2:%.*]], <vscale x 32 x half> [[VS1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.f.f.i64.nxv32f16(i64 0, <vscale x 32 x half> [[VS2]], <vscale x 32 x half> [[VS1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 2) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_f_f_w2_f16m8(vfloat16m8_t vs2, vfloat16m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_f_f_w2(0, vs2, vs1, tm, tn, tk); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_f_f_w1_f32m8( +// CHECK-RV64-SAME: <vscale x 16 x float> [[VS2:%.*]], <vscale x 16 x float> [[VS1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.f.f.i64.nxv16f32(i64 0, <vscale x 16 x float> [[VS2]], <vscale x 16 x float> [[VS1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 1) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_f_f_w1_f32m8(vfloat32m8_t vs2, vfloat32m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_f_f_w1(0, vs2, vs1, tm, tn, tk); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_f_f_w1_f64m8( +// CHECK-RV64-SAME: <vscale x 8 x double> [[VS2:%.*]], <vscale x 8 x double> [[VS1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.f.f.i64.nxv8f64(i64 0, <vscale x 8 x double> [[VS2]], <vscale x 8 x double> [[VS1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 1) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_f_f_w1_f64m8(vfloat64m8_t vs2, vfloat64m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_f_f_w1(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_s.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_s.c new file mode 100644 index 0000000..2d34f7d --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_s.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8i \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_s_s_w4_i8m8_i8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.s.s.i64.nxv64i8.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_s_s_w4_i8m8_i8m8(vint8m8_t vs2, vint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_s_s(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_u.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_u.c new file mode 100644 index 0000000..1f9bc33 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_u.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8i \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_s_u_w4_i8m8_u8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.s.u.i64.nxv64i8.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_s_u_w4_i8m8_u8m8(vint8m8_t vs2, vuint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_s_u(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_s.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_s.c new file mode 100644 index 0000000..2c6d538 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_s.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8i \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_u_s_w4_u8m8_i8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.u.s.i64.nxv64i8.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_u_s_w4_u8m8_i8m8(vuint8m8_t vs2, vint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_u_s(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_u.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_u.c new file mode 100644 index 0000000..bb1eaf1 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_u.c @@ -0,0 +1,18 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmm32a8i \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_mm_u_u_w4_u8m8_u8m8( +// CHECK-RV64-SAME: <vscale x 64 x i8> [[vs2:%.*]], <vscale x 64 x i8> [[vs1:%.*]], i64 noundef [[TM:%.*]], i64 noundef [[TN:%.*]], i64 noundef [[TK:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.mm.u.u.i64.nxv64i8.nxv64i8(i64 0, <vscale x 64 x i8> [[vs2]], <vscale x 64 x i8> [[vs1]], i64 [[TM]], i64 [[TN]], i64 [[TK]], i64 4) +// CHECK-RV64-NEXT: ret void +// +void test_sf_mm_u_u_w4_u8m8_u8m8(vuint8m8_t vs2, vuint8m8_t vs1, size_t tm, size_t tn, size_t tk) { + return __riscv_sf_mm_u_u(0, vs2, vs1, tm, tn, tk); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte16.c new file mode 100644 index 0000000..e199c1f --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte16.c @@ -0,0 +1,49 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -target-feature +zvfhmin -target-feature +zvfbfmin \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte16_bf16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte16_bf16(size_t tss, __bf16 *base, size_t vl) { + return __riscv_sf_vlte16(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte16_f16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte16_f16(size_t tss, _Float16 *base, size_t vl) { + return __riscv_sf_vlte16(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte16_i16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte16_i16(size_t tss, int16_t *base, size_t vl) { + return __riscv_sf_vlte16(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte16_u16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte16_u16(size_t tss, uint16_t *base, size_t vl) { + return __riscv_sf_vlte16(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte32.c new file mode 100644 index 0000000..388884d --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte32.c @@ -0,0 +1,38 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte32_f32( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte32.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte32_f32(size_t tss, float *base, size_t vl) { + return __riscv_sf_vlte32(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte32_i32( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte32.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte32_i32(size_t tss, int32_t *base, size_t vl) { + return __riscv_sf_vlte32(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte32_u32( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte32.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte32_u32(size_t tss, uint32_t *base, size_t vl) { + return __riscv_sf_vlte32(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte64.c new file mode 100644 index 0000000..80d7542 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte64.c @@ -0,0 +1,38 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte64_f64( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte64.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte64_f64(size_t tss, double *base, size_t vl) { + return __riscv_sf_vlte64(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte64_i64( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte64.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte64_i64(size_t tss, int64_t *base, size_t vl) { + return __riscv_sf_vlte64(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte64_u64( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte64.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte64_u64(size_t tss, uint64_t *base, size_t vl) { + return __riscv_sf_vlte64(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte8.c new file mode 100644 index 0000000..c29bf933 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte8.c @@ -0,0 +1,28 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte8_i8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte8.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte8_i8(size_t tss, int8_t *base, size_t vl) { + return __riscv_sf_vlte8(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vlte8_u8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vlte8.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vlte8_u8(size_t tss, uint8_t *base, size_t vl) { + return __riscv_sf_vlte8(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste16.c new file mode 100644 index 0000000..e1fff6c --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste16.c @@ -0,0 +1,49 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -target-feature +zvfhmin -target-feature +zvfbfmin \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste16_bf16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste16_bf16(size_t tss, __bf16 *base, size_t vl) { + return __riscv_sf_vste16(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste16_f16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste16_f16(size_t tss, _Float16 *base, size_t vl) { + return __riscv_sf_vste16(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste16_i16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste16_i16(size_t tss, int16_t *base, size_t vl) { + return __riscv_sf_vste16(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste16_u16( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste16.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste16_u16(size_t tss, uint16_t *base, size_t vl) { + return __riscv_sf_vste16(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste32.c new file mode 100644 index 0000000..0c3bc4c --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste32.c @@ -0,0 +1,38 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste32_f32( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste32.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste32_f32(size_t tss, float *base, size_t vl) { + return __riscv_sf_vste32(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste32_i32( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste32.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste32_i32(size_t tss, int32_t *base, size_t vl) { + return __riscv_sf_vste32(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste32_u32( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste32.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste32_u32(size_t tss, uint32_t *base, size_t vl) { + return __riscv_sf_vste32(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste64.c new file mode 100644 index 0000000..0a56807 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste64.c @@ -0,0 +1,38 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste64_f64( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste64.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste64_f64(size_t tss, double *base, size_t vl) { + return __riscv_sf_vste64(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste64_i64( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste64.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste64_i64(size_t tss, int64_t *base, size_t vl) { + return __riscv_sf_vste64(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste64_u64( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste64.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste64_u64(size_t tss, uint64_t *base, size_t vl) { + return __riscv_sf_vste64(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste8.c new file mode 100644 index 0000000..3115945 --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste8.c @@ -0,0 +1,28 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste8_i8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste8.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste8_i8(size_t tss, int8_t *base, size_t vl) { + return __riscv_sf_vste8(tss, base, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vste8_u8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vste8.i64(i64 [[TSS]], ptr [[BASE]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vste8_u8(size_t tss, uint8_t *base, size_t vl) { + return __riscv_sf_vste8(tss, base, vl); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vtmv_t_v.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vtmv_t_v.c new file mode 100644 index 0000000..2461c39c --- /dev/null +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vtmv_t_v.c @@ -0,0 +1,130 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +xsfmmbase \ +// RUN: -target-feature +zvfhmin -target-feature +zvfbfmin \ +// RUN: -target-feature +zve64d \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | \ +// RUN: opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s + +#include <sifive_vector.h> + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_bf16m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 32 x bfloat> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv32bf16.i64(i64 [[TSS]], <vscale x 32 x bfloat> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_bf16m8(size_t tss, vbfloat16m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_f16m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 32 x half> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv32f16.i64(i64 [[TSS]], <vscale x 32 x half> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_f16m8(size_t tss, vfloat16m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_f32m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 16 x float> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv16f32.i64(i64 [[TSS]], <vscale x 16 x float> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_f32m8(size_t tss, vfloat32m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_f64m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 8 x double> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv8f64.i64(i64 [[TSS]], <vscale x 8 x double> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_f64m8(size_t tss, vfloat64m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_i8m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 64 x i8> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv64i8.i64(i64 [[TSS]], <vscale x 64 x i8> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_i8m8(size_t tss, vint8m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_i16m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 32 x i16> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv32i16.i64(i64 [[TSS]], <vscale x 32 x i16> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_i16m8(size_t tss, vint16m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_i32m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 16 x i32> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv16i32.i64(i64 [[TSS]], <vscale x 16 x i32> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_i32m8(size_t tss, vint32m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_i64m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 8 x i64> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv8i64.i64(i64 [[TSS]], <vscale x 8 x i64> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_i64m8(size_t tss, vint64m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_u8m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 64 x i8> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv64i8.i64(i64 [[TSS]], <vscale x 64 x i8> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_u8m8(size_t tss, vuint8m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_u16m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 32 x i16> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv32i16.i64(i64 [[TSS]], <vscale x 32 x i16> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_u16m8(size_t tss, vuint16m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_u32m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 16 x i32> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv16i32.i64(i64 [[TSS]], <vscale x 16 x i32> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_u32m8(size_t tss, vuint32m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v(tss, src, vl); +} + +// CHECK-RV64-LABEL: define dso_local void @test_sf_vtmv_t_v_u64m8( +// CHECK-RV64-SAME: i64 noundef [[TSS:%.*]], <vscale x 8 x i64> [[SRC:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: call void @llvm.riscv.sf.vtmv.t.v.nxv8i64.i64(i64 [[TSS]], <vscale x 8 x i64> [[SRC]], i64 [[VL]]) +// CHECK-RV64-NEXT: ret void +// +void test_sf_vtmv_t_v_u64m8(size_t tss, vuint64m8_t src, size_t vl) { + return __riscv_sf_vtmv_t_v(tss, src, vl); +} + diff --git a/clang/test/Frontend/cfi-unchecked-callee-attribute.cpp b/clang/test/Frontend/cfi-unchecked-callee-attribute.cpp index 072f217..a5a17dd 100644 --- a/clang/test/Frontend/cfi-unchecked-callee-attribute.cpp +++ b/clang/test/Frontend/cfi-unchecked-callee-attribute.cpp @@ -9,6 +9,7 @@ void (*checked_ptr)(void) = unchecked; // expected-warning{{implicit conversion void (CFI_UNCHECKED_CALLEE *unchecked_ptr)(void) = unchecked; void (CFI_UNCHECKED_CALLEE *from_normal)(void) = checked; void (CFI_UNCHECKED_CALLEE *c_no_function_decay)(void) = &unchecked; +void (CFI_UNCHECKED_CALLEE __attribute__((noreturn)) *other_conflict)(void) = &checked; // expected-error{{cannot initialize a variable of type 'void (*)() __attribute__((noreturn)) __attribute__((cfi_unchecked_callee))' with an rvalue of type 'void (*)()'}} void (CFI_UNCHECKED_CALLEE *arr[10])(void); void (*cfi_elem)(void) = arr[1]; // expected-warning{{implicit conversion from 'void (*)() __attribute__((cfi_unchecked_callee))' to 'void (*)()' discards 'cfi_unchecked_callee' attribute}} void (CFI_UNCHECKED_CALLEE *cfi_unchecked_elem)(void) = arr[1]; diff --git a/clang/test/Sema/sifive-xsfmm.c b/clang/test/Sema/sifive-xsfmm.c new file mode 100644 index 0000000..7e055dd --- /dev/null +++ b/clang/test/Sema/sifive-xsfmm.c @@ -0,0 +1,30 @@ +// RUN: %clang_cc1 -triple riscv64 -target-feature +v \ +// RUN: -target-feature +xsfmmbase -target-feature +xsfmm32a -target-feature +xsfmm32a8f \ +// RUN: -target-feature +xsfmm32a16f -target-feature +xsfmm32a32f -target-feature +xsfmm64a64f \ +// RUN: -target-feature +xsfmm32a4f -target-feature +xsfmm32a8i -disable-O0-optnone \ +// RUN: -fsyntax-only %s -verify +// REQUIRES: riscv-registered-target +#include <sifive_vector.h> + +void test(vfloat32m8_t arg0, vuint8m8_t arg1) { + __riscv_sf_mm_f_f_w1(4, arg0, arg0, 1, 2, 3); + __riscv_sf_mm_e5m2_e4m3(8, arg1, arg1, 1, 2, 3); + __riscv_sf_mm_u_u(12, arg1, arg1, 1, 2, 3); + __riscv_sf_vtzero_t_e8w1(0, 0, 0); + + __riscv_sf_mm_f_f_w1(5, arg0, arg0, 1, 2, 3); /* expected-error {{argument should be a multiple of 4}} */ + __riscv_sf_mm_e5m2_e4m3(7, arg1, arg1, 1, 2, 3); /* expected-error {{argument should be a multiple of 4}} */ + __riscv_sf_mm_u_u(15, arg1, arg1, 1, 2, 3); /* expected-error {{argument should be a multiple of 4}} */ + __riscv_sf_mm_f_f_w1(16, arg0, arg0, 1, 2, 3); /* expected-error {{argument value 16 is outside the valid range [0, 15]}} */ + __riscv_sf_mm_e5m2_e4m3(20, arg1, arg1, 1, 2, 3); /* expected-error {{argument value 20 is outside the valid range [0, 15]}} */ + __riscv_sf_mm_u_u(24, arg1, arg1, 1, 2, 3); /* expected-error {{argument value 24 is outside the valid range [0, 15]}} */ + __riscv_sf_vtzero_t_e8w1(18, 0, 0); /* expected-error {{argument value 18 is outside the valid range [0, 15]}} */ + __riscv_sf_vtzero_t_e16w1(3, 0, 0); /* expected-error {{argument should be a multiple of 2}} */ + __riscv_sf_vtzero_t_e16w2(3, 0, 0); /* expected-error {{argument should be a multiple of 4}} */ + __riscv_sf_vtzero_t_e32w1(5, 0, 0); /* expected-error {{argument should be a multiple of 4}} */ + __riscv_sf_vtzero_t_e32w2(5, 0, 0); /* expected-error {{argument should be a multiple of 2}} */ + __riscv_sf_vtzero_t(5, 0, 0, 7, 1); /* expected-error {{argument value 7 is outside the valid range [3, 6]}} */ + __riscv_sf_vtzero_t(5, 0, 0, 2, 1); /* expected-error {{argument value 2 is outside the valid range [3, 6]}} */ + __riscv_sf_vtzero_t(5, 0, 0, 6, 3); /* expected-error {{RISC-V XSfmm twiden must be 1, 2 or 4}} */ + __riscv_sf_vtzero_t(5, 0, 0, 6, 5); /* expected-error {{RISC-V XSfmm twiden must be 1, 2 or 4}} */ +} diff --git a/clang/test/Sema/sifive_sf_vset_invalid.c b/clang/test/Sema/sifive_sf_vset_invalid.c new file mode 100644 index 0000000..96d8e0d --- /dev/null +++ b/clang/test/Sema/sifive_sf_vset_invalid.c @@ -0,0 +1,17 @@ +// REQUIRES: riscv-registered-target +// RUN: %clang_cc1 -triple riscv64 -target-feature +v \ +// RUN: -target-feature +xsfmmbase -disable-O0-optnone \ +// RUN: -o - -fsyntax-only %s -verify + +#include <sifive_vector.h> + +void test(size_t vl) { + __riscv_sf_vsettnt(vl, 1, 8); + // expected-error@-1 {{argument value 8 is outside the valid range [1, 3]}} + __riscv_sf_vsettm(vl, 8, 9); + // expected-error@-1 {{argument value 8 is outside the valid range [0, 3]}} + __riscv_sf_vsettn(vl, 8, 2); + // expected-error@-1 {{argument value 8 is outside the valid range [0, 3]}} + __riscv_sf_vsettk(vl, 0, 0); + // expected-error@-1 {{argument value 0 is outside the valid range [1, 3]}} +} diff --git a/clang/test/SemaHLSL/BuiltIns/matrix-constructors-errors.hlsl b/clang/test/SemaHLSL/BuiltIns/matrix-constructors-errors.hlsl new file mode 100644 index 0000000..e60a865 --- /dev/null +++ b/clang/test/SemaHLSL/BuiltIns/matrix-constructors-errors.hlsl @@ -0,0 +1,31 @@ +// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -x hlsl -fsyntax-only -verify %s + +typedef float float2x1 __attribute__((matrix_type(2,1))); +typedef float float2x2 __attribute__((matrix_type(2,2))); +typedef float float2 __attribute__((ext_vector_type(2))); + +struct S { float f; }; +struct S2 { float2 f;}; + +[numthreads(1,1,1)] +void entry() { + float2x1 LilMat = float2x1(1.0, 2.0); + float2x1 BrokenMat = float2x1(1.0, 2.0, 3.0); // expected-error{{too many initializers in list for type 'float2x1' (aka 'matrix<float, 2, 1>') (expected 2 but found 3)}} + float2x2 NormieMat = float2x2(LilMat, 3.0, 4.0, 5.0); // expected-error{{too many initializers in list for type 'float2x2' (aka 'matrix<float, 2, 2>') (expected 4 but found 5)}} + float2x2 BrokenNormie = float2x2(3.0, 4.0); // expected-error{{too few initializers in list for type 'float2x2' (aka 'matrix<float, 2, 2>') (expected 4 but found 2)}} + float2x1 OverwhemledNormie = float2x1(3.0, 4.0, 5.0, 6.0); // expected-error{{too many initializers in list for type 'float2x1' (aka 'matrix<float, 2, 1>') (expected 2 but found 4)}} + + // These should work in HLSL and not error + S s; + float2x1 GettingStrange = float2x1(s, s); + + S2 s2; + float2x2 GettingStrange2 = float2x2(s2, s2); + + // HLSL does not yet allow user-defined conversions. + struct T { + operator float() const { return 1.0f; } + } t; + // TODO: Should this work? Today HLSL doesn't resolve user-defined conversions here, but we maybe should... + float2x1 foo5 = float2x1(t, t); // expected-error{{too few initializers in list for type 'float2x1' (aka 'matrix<float, 2, 1>') (expected 2 but found 0)}} +} diff --git a/clang/utils/TableGen/RISCVVEmitter.cpp b/clang/utils/TableGen/RISCVVEmitter.cpp index 74f29ac..c316dfd3 100644 --- a/clang/utils/TableGen/RISCVVEmitter.cpp +++ b/clang/utils/TableGen/RISCVVEmitter.cpp @@ -241,6 +241,8 @@ static unsigned getSegInstLog2SEW(StringRef InstName) { void emitCodeGenSwitchBody(const RVVIntrinsic *RVVI, raw_ostream &OS) { if (!RVVI->getIRName().empty()) OS << " ID = Intrinsic::riscv_" + RVVI->getIRName() + ";\n"; + if (RVVI->getTWiden() > 0) + OS << " TWiden = " << RVVI->getTWiden() << ";\n"; OS << " PolicyAttrs = " << RVVI->getPolicyAttrsBits() << ";\n"; unsigned IndexedLoadStorePtrIdx = getIndexedLoadStorePtrIdx(RVVI); @@ -295,6 +297,9 @@ void emitCodeGenSwitchBody(const RVVIntrinsic *RVVI, raw_ostream &OS) { OS << " Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));\n"; } + if (RVVI->getTWiden() > 0) + OS << " Ops.push_back(ConstantInt::get(Ops.back()->getType(), TWiden));\n"; + OS << " IntrinsicTypes = {"; ListSeparator LS; for (const auto &Idx : RVVI->getIntrinsicTypes()) { @@ -583,7 +588,8 @@ void RVVEmitter::createCodeGen(raw_ostream &OS) { (Def->getManualCodegen() != PrevDef->getManualCodegen()) || (Def->getPolicyAttrs() != PrevDef->getPolicyAttrs()) || (getSegInstLog2SEW(Def->getOverloadedName()) != - getSegInstLog2SEW(PrevDef->getOverloadedName()))) { + getSegInstLog2SEW(PrevDef->getOverloadedName())) || + (Def->getTWiden() != PrevDef->getTWiden())) { emitCodeGenSwitchBody(PrevDef, OS); } PrevDef = Def.get(); @@ -645,6 +651,7 @@ void RVVEmitter::createRVVIntrinsics( StringRef IRName = R->getValueAsString("IRName"); StringRef MaskedIRName = R->getValueAsString("MaskedIRName"); unsigned NF = R->getValueAsInt("NF"); + unsigned TWiden = R->getValueAsInt("TWiden"); bool IsTuple = R->getValueAsBit("IsTuple"); bool HasFRMRoundModeOp = R->getValueAsBit("HasFRMRoundModeOp"); @@ -694,7 +701,7 @@ void RVVEmitter::createRVVIntrinsics( /*IsMasked=*/false, /*HasMaskedOffOperand=*/false, HasVL, UnMaskedPolicyScheme, SupportOverloading, HasBuiltinAlias, ManualCodegen, *Types, IntrinsicTypes, NF, DefaultPolicy, - HasFRMRoundModeOp)); + HasFRMRoundModeOp, TWiden)); if (UnMaskedPolicyScheme != PolicyScheme::SchemeNone) for (auto P : SupportedUnMaskedPolicies) { SmallVector<PrototypeDescriptor> PolicyPrototype = @@ -709,7 +716,7 @@ void RVVEmitter::createRVVIntrinsics( /*IsMask=*/false, /*HasMaskedOffOperand=*/false, HasVL, UnMaskedPolicyScheme, SupportOverloading, HasBuiltinAlias, ManualCodegen, *PolicyTypes, IntrinsicTypes, NF, P, - HasFRMRoundModeOp)); + HasFRMRoundModeOp, TWiden)); } if (!HasMasked) continue; @@ -720,7 +727,7 @@ void RVVEmitter::createRVVIntrinsics( Name, SuffixStr, OverloadedName, OverloadedSuffixStr, MaskedIRName, /*IsMasked=*/true, HasMaskedOffOperand, HasVL, MaskedPolicyScheme, SupportOverloading, HasBuiltinAlias, ManualCodegen, *MaskTypes, - IntrinsicTypes, NF, DefaultPolicy, HasFRMRoundModeOp)); + IntrinsicTypes, NF, DefaultPolicy, HasFRMRoundModeOp, TWiden)); if (MaskedPolicyScheme == PolicyScheme::SchemeNone) continue; for (auto P : SupportedMaskedPolicies) { @@ -735,7 +742,7 @@ void RVVEmitter::createRVVIntrinsics( MaskedIRName, /*IsMasked=*/true, HasMaskedOffOperand, HasVL, MaskedPolicyScheme, SupportOverloading, HasBuiltinAlias, ManualCodegen, *PolicyTypes, IntrinsicTypes, NF, P, - HasFRMRoundModeOp)); + HasFRMRoundModeOp, TWiden)); } } // End for Log2LMULList } // End for TypeRange diff --git a/compiler-rt/lib/scudo/standalone/secondary.h b/compiler-rt/lib/scudo/standalone/secondary.h index f0b7bce..2509db2 100644 --- a/compiler-rt/lib/scudo/standalone/secondary.h +++ b/compiler-rt/lib/scudo/standalone/secondary.h @@ -249,6 +249,7 @@ public: LRUEntries.clear(); LRUEntries.init(Entries, sizeof(Entries)); + OldestPresentEntry = nullptr; AvailEntries.clear(); AvailEntries.init(Entries, sizeof(Entries)); @@ -322,8 +323,6 @@ public: } CachedBlock PrevEntry = Quarantine[QuarantinePos]; Quarantine[QuarantinePos] = Entry; - if (OldestTime == 0) - OldestTime = Entry.Time; Entry = PrevEntry; } @@ -339,9 +338,6 @@ public: } insert(Entry); - - if (OldestTime == 0) - OldestTime = Entry.Time; } while (0); for (MemMapT &EvictMemMap : EvictionMemMaps) @@ -355,7 +351,6 @@ public: SCUDO_SCOPED_TRACE( GetSecondaryReleaseToOSTraceName(ReleaseToOS::Normal)); - // TODO: Add ReleaseToOS logic to LRU algorithm releaseOlderThan(Time - static_cast<u64>(Interval) * 1000000); Mutex.unlock(); } else @@ -535,6 +530,11 @@ public: void unmapTestOnly() { empty(); } + void releaseOlderThanTestOnly(u64 ReleaseTime) { + ScopedLock L(Mutex); + releaseOlderThan(ReleaseTime); + } + private: void insert(const CachedBlock &Entry) REQUIRES(Mutex) { CachedBlock *AvailEntry = AvailEntries.front(); @@ -542,10 +542,16 @@ private: *AvailEntry = Entry; LRUEntries.push_front(AvailEntry); + if (OldestPresentEntry == nullptr && AvailEntry->Time != 0) + OldestPresentEntry = AvailEntry; } void remove(CachedBlock *Entry) REQUIRES(Mutex) { DCHECK(Entry->isValid()); + if (OldestPresentEntry == Entry) { + OldestPresentEntry = LRUEntries.getPrev(Entry); + DCHECK(OldestPresentEntry == nullptr || OldestPresentEntry->Time != 0); + } LRUEntries.remove(Entry); Entry->invalidate(); AvailEntries.push_front(Entry); @@ -560,6 +566,7 @@ private: for (CachedBlock &Entry : LRUEntries) MapInfo[N++] = Entry.MemMap; LRUEntries.clear(); + OldestPresentEntry = nullptr; } for (uptr I = 0; I < N; I++) { MemMapT &MemMap = MapInfo[I]; @@ -567,36 +574,42 @@ private: } } - void releaseIfOlderThan(CachedBlock &Entry, u64 Time) REQUIRES(Mutex) { - if (!Entry.isValid() || !Entry.Time) - return; - if (Entry.Time > Time) { - if (OldestTime == 0 || Entry.Time < OldestTime) - OldestTime = Entry.Time; - return; + void releaseOlderThan(u64 ReleaseTime) REQUIRES(Mutex) { + SCUDO_SCOPED_TRACE(GetSecondaryReleaseOlderThanTraceName()); + + if (!Config::getQuarantineDisabled()) { + for (uptr I = 0; I < Config::getQuarantineSize(); I++) { + auto &Entry = Quarantine[I]; + if (!Entry.isValid() || Entry.Time == 0 || Entry.Time > ReleaseTime) + continue; + Entry.MemMap.releaseAndZeroPagesToOS(Entry.CommitBase, + Entry.CommitSize); + Entry.Time = 0; + } } - Entry.MemMap.releaseAndZeroPagesToOS(Entry.CommitBase, Entry.CommitSize); - Entry.Time = 0; - } - void releaseOlderThan(u64 Time) REQUIRES(Mutex) { - SCUDO_SCOPED_TRACE(GetSecondaryReleaseOlderThanTraceName()); + for (CachedBlock *Entry = OldestPresentEntry; Entry != nullptr; + Entry = LRUEntries.getPrev(Entry)) { + DCHECK(Entry->isValid()); + DCHECK(Entry->Time != 0); + + if (Entry->Time > ReleaseTime) { + // All entries are newer than this, so no need to keep scanning. + OldestPresentEntry = Entry; + return; + } - if (!LRUEntries.size() || OldestTime == 0 || OldestTime > Time) - return; - OldestTime = 0; - if (!Config::getQuarantineDisabled()) - for (uptr I = 0; I < Config::getQuarantineSize(); I++) - releaseIfOlderThan(Quarantine[I], Time); - for (uptr I = 0; I < Config::getEntriesArraySize(); I++) - releaseIfOlderThan(Entries[I], Time); + Entry->MemMap.releaseAndZeroPagesToOS(Entry->CommitBase, + Entry->CommitSize); + Entry->Time = 0; + } + OldestPresentEntry = nullptr; } HybridMutex Mutex; u32 QuarantinePos GUARDED_BY(Mutex) = 0; atomic_u32 MaxEntriesCount = {}; atomic_uptr MaxEntrySize = {}; - u64 OldestTime GUARDED_BY(Mutex) = 0; atomic_s32 ReleaseToOsIntervalMs = {}; u32 CallsToRetrieve GUARDED_BY(Mutex) = 0; u32 SuccessfulRetrieves GUARDED_BY(Mutex) = 0; @@ -606,6 +619,8 @@ private: NonZeroLengthArray<CachedBlock, Config::getQuarantineSize()> Quarantine GUARDED_BY(Mutex) = {}; + // The oldest entry in the LRUEntries that has Time non-zero. + CachedBlock *OldestPresentEntry GUARDED_BY(Mutex) = nullptr; // Cached blocks stored in LRU order DoublyLinkedList<CachedBlock> LRUEntries GUARDED_BY(Mutex); // The unused Entries diff --git a/compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp b/compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp index d8a7f6b..855a3e6 100644 --- a/compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp +++ b/compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp @@ -403,6 +403,11 @@ template <class Config> struct CacheInfoType { MemMap.getBase(), MemMap); } } + + void storeMemMap(scudo::MemMapT &MemMap) { + Cache->store(Options, MemMap.getBase(), MemMap.getCapacity(), + MemMap.getBase(), MemMap); + } }; TEST(ScudoSecondaryTest, AllocatorCacheEntryOrder) { @@ -503,3 +508,83 @@ TEST(ScudoSecondaryTest, AllocatorCacheOptions) { Info.Cache->setOption(scudo::Option::MaxCacheEntrySize, 1UL << 20)); EXPECT_TRUE(Info.Cache->canCache(1UL << 16)); } + +TEST(ScudoSecondaryTest, ReleaseOlderThanAllEntries) { + CacheInfoType<TestCacheConfig> Info; + using CacheConfig = CacheInfoType<TestCacheConfig>::CacheConfig; + + Info.Cache->releaseOlderThanTestOnly(UINT64_MAX); + + Info.fillCacheWithSameSizeBlocks(CacheConfig::getDefaultMaxEntriesCount(), + 1024); + for (size_t I = 0; I < Info.MemMaps.size(); I++) { + // Set the first u32 value to a non-zero value. + *reinterpret_cast<scudo::u32 *>(Info.MemMaps[I].getBase()) = 10; + } + + Info.Cache->releaseOlderThanTestOnly(UINT64_MAX); + + EXPECT_EQ(Info.MemMaps.size(), CacheConfig::getDefaultMaxEntriesCount()); + for (size_t I = 0; I < Info.MemMaps.size(); I++) { + // All released maps will now be zero. + EXPECT_EQ(*reinterpret_cast<scudo::u32 *>(Info.MemMaps[I].getBase()), 0U); + } +} + +// This test assumes that the timestamp comes from getMonotonicFast. +TEST(ScudoSecondaryTest, ReleaseOlderThanGroups) { + CacheInfoType<TestCacheConfig> Info; + + // Disable the release interval so we can do tests the releaseOlderThan + // function. + Info.Cache->setOption(scudo::Option::ReleaseInterval, -1); + + // Create all of the maps we are going to use. + for (size_t I = 0; I < 6; I++) { + Info.MemMaps.emplace_back(Info.allocate(1024)); + // Set the first u32 value to a non-zero value. + *reinterpret_cast<scudo::u32 *>(Info.MemMaps[I].getBase()) = 10; + } + + // Create three groups of entries at three different intervals. + Info.storeMemMap(Info.MemMaps[0]); + Info.storeMemMap(Info.MemMaps[1]); + scudo::u64 FirstTime = scudo::getMonotonicTimeFast(); + + // Need to make sure the next set of entries are stamped with a newer time. + while (scudo::getMonotonicTimeFast() <= FirstTime) + ; + + Info.storeMemMap(Info.MemMaps[2]); + Info.storeMemMap(Info.MemMaps[3]); + scudo::u64 SecondTime = scudo::getMonotonicTimeFast(); + + // Need to make sure the next set of entries are stamped with a newer time. + while (scudo::getMonotonicTimeFast() <= SecondTime) + ; + + Info.storeMemMap(Info.MemMaps[4]); + Info.storeMemMap(Info.MemMaps[5]); + scudo::u64 ThirdTime = scudo::getMonotonicTimeFast(); + + Info.Cache->releaseOlderThanTestOnly(FirstTime); + for (size_t I = 0; I < 2; I++) { + EXPECT_EQ(*reinterpret_cast<scudo::u32 *>(Info.MemMaps[I].getBase()), 0U); + } + for (size_t I = 2; I < 6; I++) { + EXPECT_EQ(*reinterpret_cast<scudo::u32 *>(Info.MemMaps[I].getBase()), 10U); + } + + Info.Cache->releaseOlderThanTestOnly(SecondTime); + for (size_t I = 0; I < 4; I++) { + EXPECT_EQ(*reinterpret_cast<scudo::u32 *>(Info.MemMaps[I].getBase()), 0U); + } + for (size_t I = 4; I < 6; I++) { + EXPECT_EQ(*reinterpret_cast<scudo::u32 *>(Info.MemMaps[I].getBase()), 10U); + } + + Info.Cache->releaseOlderThanTestOnly(ThirdTime); + for (size_t I = 0; I < 6; I++) { + EXPECT_EQ(*reinterpret_cast<scudo::u32 *>(Info.MemMaps[I].getBase()), 0U); + } +} diff --git a/flang-rt/include/flang-rt/runtime/connection.h b/flang-rt/include/flang-rt/runtime/connection.h index 4c1d6a4..158e156 100644 --- a/flang-rt/include/flang-rt/runtime/connection.h +++ b/flang-rt/include/flang-rt/runtime/connection.h @@ -73,7 +73,6 @@ struct ConnectionState : public ConnectionAttributes { auto least{leftTabLimit.value_or(0)}; auto newPos{positionInRecord + n}; positionInRecord = newPos < least ? least : newPos; - ; } RT_API_ATTRS void BeginRecord() { diff --git a/flang-rt/include/flang-rt/runtime/io-stmt.h b/flang-rt/include/flang-rt/runtime/io-stmt.h index 3de2309..f6a81f7 100644 --- a/flang-rt/include/flang-rt/runtime/io-stmt.h +++ b/flang-rt/include/flang-rt/runtime/io-stmt.h @@ -184,6 +184,18 @@ public: } connection_.HandleRelativePosition(bytes); } + RT_API_ATTRS bool SkipBlanks() { + if (at_) { + const char *start{at_}; + while (at_ < limit_ && (*at_ == ' ' || *at_ == '\t' || *at_ == '\n')) { + ++at_; + } + connection_.HandleRelativePosition(at_ - start); + return true; + } else { + return false; + } + } // Could there be a list-directed repetition count here? RT_API_ATTRS bool MightBeRepetitionCount() const { @@ -289,24 +301,32 @@ public: // Skips spaces, advances records, and ignores NAMELIST comments RT_API_ATTRS common::optional<char32_t> GetNextNonBlank( std::size_t &byteCount, FastAsciiField *fastField = nullptr) { - auto ch{GetCurrentChar(byteCount, fastField)}; bool inNamelist{mutableModes().inNamelist}; + if (fastField) { + while (fastField->SkipBlanks()) { + if (auto ch{fastField->Next()}) { + if (inNamelist && *ch == '!') { + // skip namelist comment + } else { + byteCount = 1; + return ch; + } + } + if (!AdvanceRecord()) { + break; + } + fastField->NextRecord(*this); + } + } + auto ch{GetCurrentCharSlow(byteCount)}; while (!ch || *ch == ' ' || *ch == '\t' || *ch == '\n' || (inNamelist && *ch == '!')) { if (ch && (*ch == ' ' || *ch == '\t' || *ch == '\n')) { - if (fastField) { - fastField->Advance(0, byteCount); - } else { - HandleRelativePosition(byteCount); - } - } else if (AdvanceRecord()) { - if (fastField) { - fastField->NextRecord(*this); - } - } else { + HandleRelativePosition(byteCount); + } else if (!AdvanceRecord()) { return common::nullopt; } - ch = GetCurrentChar(byteCount, fastField); + ch = GetCurrentCharSlow(byteCount); } return ch; } diff --git a/flang/include/flang/Evaluate/call.h b/flang/include/flang/Evaluate/call.h index 2a5929b..fea09d6 100644 --- a/flang/include/flang/Evaluate/call.h +++ b/flang/include/flang/Evaluate/call.h @@ -112,6 +112,7 @@ public: int Rank() const; bool operator==(const ActualArgument &) const; llvm::raw_ostream &AsFortran(llvm::raw_ostream &) const; + std::string AsFortran() const; std::optional<parser::CharBlock> keyword() const { return keyword_; } ActualArgument &set_keyword(parser::CharBlock x) { diff --git a/flang/include/flang/Parser/parse-tree.h b/flang/include/flang/Parser/parse-tree.h index be64ef3..bb47f31 100644 --- a/flang/include/flang/Parser/parse-tree.h +++ b/flang/include/flang/Parser/parse-tree.h @@ -3274,13 +3274,13 @@ struct FunctionReference { // R1521 call-stmt -> CALL procedure-designator [ chevrons ] // [( [actual-arg-spec-list] )] // (CUDA) chevrons -> <<< * | scalar-expr, scalar-expr [, -// scalar-int-expr [, scalar-int-expr ] ] >>> +// scalar-expr [, scalar-int-expr ] ] >>> struct CallStmt { BOILERPLATE(CallStmt); WRAPPER_CLASS(StarOrExpr, std::optional<ScalarExpr>); struct Chevrons { TUPLE_CLASS_BOILERPLATE(Chevrons); - std::tuple<StarOrExpr, ScalarExpr, std::optional<ScalarIntExpr>, + std::tuple<StarOrExpr, ScalarExpr, std::optional<ScalarExpr>, std::optional<ScalarIntExpr>> t; }; diff --git a/flang/include/flang/Semantics/expression.h b/flang/include/flang/Semantics/expression.h index 95c97f2..639ef99 100644 --- a/flang/include/flang/Semantics/expression.h +++ b/flang/include/flang/Semantics/expression.h @@ -367,11 +367,16 @@ private: using AdjustActuals = std::optional<std::function<bool(const Symbol &, ActualArguments &)>>; const Symbol *ResolveForward(const Symbol &); - std::pair<const Symbol *, bool /* failure due ambiguity */> ResolveGeneric( - const Symbol &, const ActualArguments &, const AdjustActuals &, - bool isSubroutine, bool mightBeStructureConstructor = false); - void EmitGenericResolutionError( - const Symbol &, bool dueToNullActuals, bool isSubroutine); + struct GenericResolution { + const Symbol *specific{nullptr}; + bool failedDueToAmbiguity{false}; + SymbolVector tried{}; + }; + GenericResolution ResolveGeneric(const Symbol &, const ActualArguments &, + const AdjustActuals &, bool isSubroutine, SymbolVector &&tried, + bool mightBeStructureConstructor = false); + void EmitGenericResolutionError(const Symbol &, bool dueToNullActuals, + bool isSubroutine, ActualArguments &, const SymbolVector &); const Symbol &AccessSpecific( const Symbol &originalGeneric, const Symbol &specific); std::optional<CalleeAndArguments> GetCalleeAndArguments(const parser::Name &, diff --git a/flang/lib/Evaluate/formatting.cpp b/flang/lib/Evaluate/formatting.cpp index ec5dc0b..5632015 100644 --- a/flang/lib/Evaluate/formatting.cpp +++ b/flang/lib/Evaluate/formatting.cpp @@ -252,6 +252,13 @@ llvm::raw_ostream &ActualArgument::AsFortran(llvm::raw_ostream &o) const { return o; } +std::string ActualArgument::AsFortran() const { + std::string result; + llvm::raw_string_ostream sstream(result); + AsFortran(sstream); + return result; +} + llvm::raw_ostream &SpecificIntrinsic::AsFortran(llvm::raw_ostream &o) const { return o << name; } diff --git a/flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp b/flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp index 00fdb5a..e1e6125 100644 --- a/flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp +++ b/flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp @@ -528,13 +528,10 @@ mlir::LLVM::DITypeAttr DebugTypeGenerator::convertSequenceType( if (dim == seqTy.getUnknownExtent()) { // This path is taken for both assumed size array or when the size of the // array is variable. In the case of variable size, we create a variable - // to use as countAttr. Note that fir has a constant size of -1 for - // assumed size array. So !optint check makes sure we don't generate - // variable in that case. + // to use as countAttr. if (declOp && declOp.getShape().size() > index) { - std::optional<std::int64_t> optint = - getIntIfConstant(declOp.getShape()[index]); - if (!optint) + if (!llvm::isa_and_nonnull<fir::AssumedSizeExtentOp>( + declOp.getShape()[index].getDefiningOp())) countAttr = generateArtificialVariable( context, declOp.getShape()[index], fileAttr, scope, declOp); } diff --git a/flang/lib/Parser/prescan.cpp b/flang/lib/Parser/prescan.cpp index df0372b..4739da0 100644 --- a/flang/lib/Parser/prescan.cpp +++ b/flang/lib/Parser/prescan.cpp @@ -1380,19 +1380,23 @@ const char *Prescanner::FixedFormContinuationLine(bool atNewline) { } } } else { // Normal case: not in a compiler directive. - // !$ conditional compilation lines may be continuations when not + // Conditional compilation lines may be continuations when not // just preprocessing. - if (!preprocessingOnly_ && IsFixedFormCommentChar(col1) && - nextLine_[1] == '$' && nextLine_[2] == ' ' && nextLine_[3] == ' ' && - nextLine_[4] == ' ' && IsCompilerDirectiveSentinel(&nextLine_[1], 1)) { - if (const char *col6{nextLine_ + 5}; - *col6 != '\n' && *col6 != '0' && !IsSpaceOrTab(col6)) { - if (atNewline && !IsSpace(nextLine_ + 6)) { - brokenToken_ = true; + if (!preprocessingOnly_ && IsFixedFormCommentChar(col1)) { + if ((nextLine_[1] == '$' && nextLine_[2] == ' ' && nextLine_[3] == ' ' && + nextLine_[4] == ' ' && + IsCompilerDirectiveSentinel(&nextLine_[1], 1)) || + (nextLine_[1] == '@' && + IsCompilerDirectiveSentinel(&nextLine_[1], 4))) { + if (const char *col6{nextLine_ + 5}; + *col6 != '\n' && *col6 != '0' && !IsSpaceOrTab(col6)) { + if (atNewline && !IsSpace(nextLine_ + 6)) { + brokenToken_ = true; + } + return nextLine_ + 6; + } else { + return nullptr; } - return nextLine_ + 6; - } else { - return nullptr; } } if (col1 == '&' && @@ -1427,6 +1431,15 @@ const char *Prescanner::FixedFormContinuationLine(bool atNewline) { return nullptr; // not a continuation line } +constexpr bool IsDirective(const char *match, const char *dir) { + for (; *match; ++match) { + if (*match != ToLowerCaseLetter(*dir++)) { + return false; + } + } + return true; +} + const char *Prescanner::FreeFormContinuationLine(bool ampersand) { const char *lineStart{nextLine_}; const char *p{lineStart}; @@ -1439,12 +1452,18 @@ const char *Prescanner::FreeFormContinuationLine(bool ampersand) { if (preprocessingOnly_) { // in -E mode, don't treat !$ as a continuation return nullptr; - } else if (p[0] == '!' && p[1] == '$') { - // accept but do not require a matching sentinel - if (p[2] != '&' && !IsSpaceOrTab(&p[2])) { - return nullptr; // not !$ - } + } else if (p[0] == '!' && (p[1] == '$' || p[1] == '@')) { p += 2; + if (InOpenACCOrCUDAConditionalLine()) { + if (IsDirective("acc", p) || IsDirective("cuf", p)) { + p += 3; + } else { + return nullptr; + } + } + if (*p != '&' && !IsSpaceOrTab(p)) { + return nullptr; + } } } else if (*p++ == '!') { for (const char *s{directiveSentinel_}; *s != '\0'; ++p, ++s) { @@ -1467,10 +1486,17 @@ const char *Prescanner::FreeFormContinuationLine(bool ampersand) { return nullptr; } } - if (p[0] == '!' && p[1] == '$' && !preprocessingOnly_ && - features_.IsEnabled(LanguageFeature::OpenMP)) { - // !$ conditional line can be a continuation - p = lineStart = SkipWhiteSpace(p + 2); + if (p[0] == '!' && !preprocessingOnly_) { + // Conditional lines can be continuations + if (p[1] == '$' && features_.IsEnabled(LanguageFeature::OpenMP)) { + p = lineStart = SkipWhiteSpace(p + 2); + } else if (IsDirective("@acc", p + 1) && + features_.IsEnabled(LanguageFeature::OpenACC)) { + p = lineStart = SkipWhiteSpace(p + 5); + } else if (IsDirective("@cuf", p + 1) && + features_.IsEnabled(LanguageFeature::CUDA)) { + p = lineStart = SkipWhiteSpace(p + 5); + } } if (*p == '&') { return p + 1; @@ -1706,15 +1732,6 @@ Prescanner::IsCompilerDirectiveSentinel(const char *p) const { return std::nullopt; } -constexpr bool IsDirective(const char *match, const char *dir) { - for (; *match; ++match) { - if (*match != ToLowerCaseLetter(*dir++)) { - return false; - } - } - return true; -} - Prescanner::LineClassification Prescanner::ClassifyLine( const char *start) const { if (inFixedForm_) { diff --git a/flang/lib/Parser/program-parsers.cpp b/flang/lib/Parser/program-parsers.cpp index 92c0a64..740dbbf 100644 --- a/flang/lib/Parser/program-parsers.cpp +++ b/flang/lib/Parser/program-parsers.cpp @@ -484,7 +484,7 @@ constexpr auto starOrExpr{ applyFunction(presentOptional<ScalarExpr>, scalarExpr))}; TYPE_PARSER(extension<LanguageFeature::CUDA>( "<<<" >> construct<CallStmt::Chevrons>(starOrExpr, ", " >> scalarExpr, - maybe("," >> scalarIntExpr), maybe("," >> scalarIntExpr)) / + maybe("," >> scalarExpr), maybe("," >> scalarIntExpr)) / ">>>")) constexpr auto actualArgSpecList{optionalList(actualArgSpec)}; TYPE_CONTEXT_PARSER("CALL statement"_en_US, diff --git a/flang/lib/Semantics/check-call.cpp b/flang/lib/Semantics/check-call.cpp index e4d2a0d..c51d40b 100644 --- a/flang/lib/Semantics/check-call.cpp +++ b/flang/lib/Semantics/check-call.cpp @@ -2241,10 +2241,9 @@ static void CheckSpecificIntrinsic(const characteristics::Procedure &proc, } } -static parser::Messages CheckExplicitInterface( - const characteristics::Procedure &proc, evaluate::ActualArguments &actuals, - SemanticsContext &context, const Scope *scope, - const evaluate::SpecificIntrinsic *intrinsic, +parser::Messages CheckExplicitInterface(const characteristics::Procedure &proc, + evaluate::ActualArguments &actuals, SemanticsContext &context, + const Scope *scope, const evaluate::SpecificIntrinsic *intrinsic, bool allowActualArgumentConversions, bool extentErrors, bool ignoreImplicitVsExplicit) { evaluate::FoldingContext &foldingContext{context.foldingContext()}; diff --git a/flang/lib/Semantics/check-call.h b/flang/lib/Semantics/check-call.h index 46bc61a..a69b792 100644 --- a/flang/lib/Semantics/check-call.h +++ b/flang/lib/Semantics/check-call.h @@ -12,11 +12,8 @@ #define FORTRAN_SEMANTICS_CHECK_CALL_H_ #include "flang/Evaluate/call.h" +#include "flang/Parser/message.h" -namespace Fortran::parser { -class Messages; -class ContextualMessages; -} // namespace Fortran::parser namespace Fortran::evaluate::characteristics { struct Procedure; } @@ -47,6 +44,12 @@ bool CheckArgumentIsConstantExprInRange( const evaluate::ActualArguments &actuals, int index, int lowerBound, int upperBound, parser::ContextualMessages &messages); +parser::Messages CheckExplicitInterface( + const evaluate::characteristics::Procedure &, evaluate::ActualArguments &, + SemanticsContext &, const Scope *, const evaluate::SpecificIntrinsic *, + bool allowActualArgumentConversions, bool extentErrors, + bool ignoreImplicitVsExplicit); + // Checks actual arguments for the purpose of resolving a generic interface. bool CheckInterfaceForGeneric(const evaluate::characteristics::Procedure &, evaluate::ActualArguments &, SemanticsContext &, diff --git a/flang/lib/Semantics/check-declarations.cpp b/flang/lib/Semantics/check-declarations.cpp index 31e246c..549ee83 100644 --- a/flang/lib/Semantics/check-declarations.cpp +++ b/flang/lib/Semantics/check-declarations.cpp @@ -472,6 +472,10 @@ void CheckHelper::Check(const Symbol &symbol) { messages_.Say( "A function result may not also be a named constant"_err_en_US); } + if (!IsProcedurePointer(symbol) && IsProcedure(symbol)) { + messages_.Say( + "A function result may not be a procedure unless it is a procedure pointer"_err_en_US); + } } if (IsAutomatic(symbol)) { if (const Symbol * common{FindCommonBlockContaining(symbol)}) { @@ -1781,7 +1785,7 @@ void CheckHelper::CheckExternal(const Symbol &symbol) { if (auto previousChars{Characterize(previous)}) { std::string whyNot; if (!chars->IsCompatibleWith(*previousChars, - /*ignoreImplicitVsExplicit=*/false, &whyNot)) { + /*ignoreImplicitVsExplicit=*/true, &whyNot)) { if (auto *msg{Warn(common::UsageWarning::ExternalInterfaceMismatch, "The external interface '%s' is not compatible with an earlier definition (%s)"_warn_en_US, symbol.name(), whyNot)}) { diff --git a/flang/lib/Semantics/expression.cpp b/flang/lib/Semantics/expression.cpp index 4aeb9a4..32aa6b1 100644 --- a/flang/lib/Semantics/expression.cpp +++ b/flang/lib/Semantics/expression.cpp @@ -2552,11 +2552,12 @@ auto ExpressionAnalyzer::AnalyzeProcedureComponentRef( } return true; }}; - auto pair{ - ResolveGeneric(generic, arguments, adjustment, isSubroutine)}; - sym = pair.first; + auto result{ResolveGeneric( + generic, arguments, adjustment, isSubroutine, SymbolVector{})}; + sym = result.specific; if (!sym) { - EmitGenericResolutionError(generic, pair.second, isSubroutine); + EmitGenericResolutionError(generic, result.failedDueToAmbiguity, + isSubroutine, arguments, result.tried); return std::nullopt; } // re-resolve the name to the specific binding @@ -2886,10 +2887,10 @@ const Symbol *ExpressionAnalyzer::ResolveForward(const Symbol &symbol) { // Resolve a call to a generic procedure with given actual arguments. // adjustActuals is called on procedure bindings to handle pass arg. -std::pair<const Symbol *, bool> ExpressionAnalyzer::ResolveGeneric( - const Symbol &symbol, const ActualArguments &actuals, - const AdjustActuals &adjustActuals, bool isSubroutine, - bool mightBeStructureConstructor) { +auto ExpressionAnalyzer::ResolveGeneric(const Symbol &symbol, + const ActualArguments &actuals, const AdjustActuals &adjustActuals, + bool isSubroutine, SymbolVector &&tried, bool mightBeStructureConstructor) + -> GenericResolution { const Symbol &ultimate{symbol.GetUltimate()}; // Check for a match with an explicit INTRINSIC const Symbol *explicitIntrinsic{nullptr}; @@ -2948,7 +2949,7 @@ std::pair<const Symbol *, bool> ExpressionAnalyzer::ResolveGeneric( // cannot be unambiguously distinguished // Underspecified external procedure actual arguments can // also lead to ambiguity. - return {nullptr, true /* due to ambiguity */}; + return {nullptr, true /* due to ambiguity */, std::move(tried)}; } } if (!procedure->IsElemental()) { @@ -2959,6 +2960,8 @@ std::pair<const Symbol *, bool> ExpressionAnalyzer::ResolveGeneric( } crtMatchingDistance = ComputeCudaMatchingDistance( context_.languageFeatures(), *procedure, localActuals); + } else { + tried.push_back(*specific); } } } @@ -3038,11 +3041,12 @@ std::pair<const Symbol *, bool> ExpressionAnalyzer::ResolveGeneric( // Check parent derived type if (const auto *parentScope{symbol.owner().GetDerivedTypeParent()}) { if (const Symbol * extended{parentScope->FindComponent(symbol.name())}) { - auto pair{ResolveGeneric( - *extended, actuals, adjustActuals, isSubroutine, false)}; - if (pair.first) { - return pair; + auto result{ResolveGeneric(*extended, actuals, adjustActuals, + isSubroutine, std::move(tried), false)}; + if (result.specific != nullptr) { + return result; } + tried = std::move(result.tried); } } // Structure constructor? @@ -3054,14 +3058,15 @@ std::pair<const Symbol *, bool> ExpressionAnalyzer::ResolveGeneric( if (!symbol.owner().IsGlobal() && !symbol.owner().IsDerivedType()) { if (const Symbol * outer{symbol.owner().parent().FindSymbol(symbol.name())}) { - auto pair{ResolveGeneric(*outer, actuals, adjustActuals, isSubroutine, - mightBeStructureConstructor)}; - if (pair.first) { - return pair; + auto result{ResolveGeneric(*outer, actuals, adjustActuals, isSubroutine, + std::move(tried), mightBeStructureConstructor)}; + if (result.specific) { + return result; } + tried = std::move(result.tried); } } - return {nullptr, false}; + return {nullptr, false, std::move(tried)}; } const Symbol &ExpressionAnalyzer::AccessSpecific( @@ -3098,16 +3103,39 @@ const Symbol &ExpressionAnalyzer::AccessSpecific( } } -void ExpressionAnalyzer::EmitGenericResolutionError( - const Symbol &symbol, bool dueToAmbiguity, bool isSubroutine) { - Say(dueToAmbiguity - ? "The actual arguments to the generic procedure '%s' matched multiple specific procedures, perhaps due to use of NULL() without MOLD= or an actual procedure with an implicit interface"_err_en_US - : semantics::IsGenericDefinedOp(symbol) - ? "No specific procedure of generic operator '%s' matches the actual arguments"_err_en_US - : isSubroutine - ? "No specific subroutine of generic '%s' matches the actual arguments"_err_en_US - : "No specific function of generic '%s' matches the actual arguments"_err_en_US, - symbol.name()); +void ExpressionAnalyzer::EmitGenericResolutionError(const Symbol &symbol, + bool dueToAmbiguity, bool isSubroutine, ActualArguments &arguments, + const SymbolVector &tried) { + if (auto *msg{Say(dueToAmbiguity + ? "The actual arguments to the generic procedure '%s' matched multiple specific procedures, perhaps due to use of NULL() without MOLD= or an actual procedure with an implicit interface"_err_en_US + : semantics::IsGenericDefinedOp(symbol) + ? "No specific procedure of generic operator '%s' matches the actual arguments"_err_en_US + : isSubroutine + ? "No specific subroutine of generic '%s' matches the actual arguments"_err_en_US + : "No specific function of generic '%s' matches the actual arguments"_err_en_US, + symbol.name())}) { + parser::ContextualMessages &messages{GetContextualMessages()}; + semantics::Scope &scope{context_.FindScope(messages.at())}; + for (const Symbol &specific : tried) { + if (auto procChars{characteristics::Procedure::Characterize( + specific, GetFoldingContext())}) { + if (procChars->HasExplicitInterface()) { + if (auto reasons{semantics::CheckExplicitInterface(*procChars, + arguments, context_, &scope, /*intrinsic=*/nullptr, + /*allocActualArgumentConversions=*/false, + /*extentErrors=*/false, + /*ignoreImplicitVsExplicit=*/false)}; + !reasons.empty()) { + reasons.AttachTo( + msg->Attach(specific.name(), + "Specific procedure '%s' does not match the actual arguments because"_en_US, + specific.name()), + parser::Severity::None); + } + } + } + } + } } auto ExpressionAnalyzer::GetCalleeAndArguments( @@ -3146,12 +3174,14 @@ auto ExpressionAnalyzer::GetCalleeAndArguments(const parser::Name &name, bool isGenericInterface{ultimate.has<semantics::GenericDetails>()}; bool isExplicitIntrinsic{ultimate.attrs().test(semantics::Attr::INTRINSIC)}; const Symbol *resolution{nullptr}; + SymbolVector tried; if (isGenericInterface || isExplicitIntrinsic) { ExpressionAnalyzer::AdjustActuals noAdjustment; - auto pair{ResolveGeneric(*symbol, arguments, noAdjustment, isSubroutine, - mightBeStructureConstructor)}; - resolution = pair.first; - dueToAmbiguity = pair.second; + auto result{ResolveGeneric(*symbol, arguments, noAdjustment, isSubroutine, + SymbolVector{}, mightBeStructureConstructor)}; + resolution = result.specific; + dueToAmbiguity = result.failedDueToAmbiguity; + tried = std::move(result.tried); if (resolution) { if (context_.GetPPCBuiltinsScope() && resolution->name().ToString().rfind("__ppc_", 0) == 0) { @@ -3182,7 +3212,8 @@ auto ExpressionAnalyzer::GetCalleeAndArguments(const parser::Name &name, std::move(specificCall->arguments)}; } else { if (isGenericInterface) { - EmitGenericResolutionError(*symbol, dueToAmbiguity, isSubroutine); + EmitGenericResolutionError( + *symbol, dueToAmbiguity, isSubroutine, arguments, tried); } return std::nullopt; } @@ -4955,8 +4986,10 @@ std::optional<ProcedureRef> ArgumentAnalyzer::GetDefinedAssignmentProc( auto restorer{context_.GetContextualMessages().DiscardMessages()}; if (const Symbol *symbol{scope.FindSymbol(oprName)}) { ExpressionAnalyzer::AdjustActuals noAdjustment; - proc = - context_.ResolveGeneric(*symbol, actuals_, noAdjustment, true).first; + proc = context_ + .ResolveGeneric( + *symbol, actuals_, noAdjustment, true, SymbolVector{}) + .specific; if (proc) { isProcElemental = IsElementalProcedure(*proc); } @@ -5105,17 +5138,18 @@ const Symbol *ArgumentAnalyzer::FindBoundOp(parser::CharBlock oprName, [&](const Symbol &proc, ActualArguments &) { return passIndex == GetPassIndex(proc).value_or(-1); }}; - auto pair{ - context_.ResolveGeneric(*generic, actuals_, adjustment, isSubroutine)}; - if (const Symbol *binding{pair.first}) { + auto result{context_.ResolveGeneric( + *generic, actuals_, adjustment, isSubroutine, SymbolVector{})}; + if (const Symbol *binding{result.specific}) { CHECK(binding->has<semantics::ProcBindingDetails>()); // Use the most recent override of the binding, if any return scope->FindComponent(binding->name()); } else { if (isAmbiguous) { - *isAmbiguous = pair.second; + *isAmbiguous = result.failedDueToAmbiguity; } - context_.EmitGenericResolutionError(*generic, pair.second, isSubroutine); + context_.EmitGenericResolutionError(*generic, result.failedDueToAmbiguity, + isSubroutine, actuals_, result.tried); } } return nullptr; diff --git a/flang/test/Lower/CUDA/cuda-kernel-calls.cuf b/flang/test/Lower/CUDA/cuda-kernel-calls.cuf index 71e594e..e0941f7 100644 --- a/flang/test/Lower/CUDA/cuda-kernel-calls.cuf +++ b/flang/test/Lower/CUDA/cuda-kernel-calls.cuf @@ -16,6 +16,7 @@ contains subroutine host() real, device :: a integer(8) :: stream + integer(4) :: nbytes ! CHECK-LABEL: func.func @_QMtest_callPhost() ! CHECK: %[[A:.*]]:2 = hlfir.declare %{{.*}} {data_attr = #cuf.cuda<device>, uniq_name = "_QMtest_callFhostEa"} : (!fir.ref<f32>) -> (!fir.ref<f32>, !fir.ref<f32>) @@ -57,6 +58,10 @@ contains call dev_kernel1<<<*,32,0,stream>>>(a) ! CHECK: cuf.kernel_launch @_QMtest_callPdev_kernel1<<<%c-1{{.*}}, %c1{{.*}}, %c1{{.*}}, %c32{{.*}}, %c1{{.*}}, %c1{{.*}}, %c0{{.*}}, %{{.*}} : !fir.ref<i64>>>>(%{{.*}}) : (!fir.ref<f32>) + call dev_kernel1<<<*, 32, 0.8 * nbytes>>>(a) +! CHECK: %[[MUL:.*]] = arith.mulf %{{.*}}, %{{.*}} fastmath<contract> : f32 +! CHECK: %[[BYTES:.*]] = fir.convert %[[MUL]] : (f32) -> i32 +! CHECK: cuf.kernel_launch @_QMtest_callPdev_kernel1<<<%{{.*}}, %{{.*}}, %{{.*}}, %{{.*}}, %{{.*}}, %{{.*}}, %[[BYTES]]>>>(%{{.*}}) : (!fir.ref<f32>) end end diff --git a/flang/test/Parser/cuf-sanity-common b/flang/test/Parser/cuf-sanity-common index 816e03b..2348c2e 100644 --- a/flang/test/Parser/cuf-sanity-common +++ b/flang/test/Parser/cuf-sanity-common @@ -43,6 +43,7 @@ module m call globalsub<<<1, 2>>> call globalsub<<<1, 2, 3>>> call globalsub<<<1, 2, 3, 4>>> + call globalsub<<<1, 2, 0.9*10, 4>>> call globalsub<<<*,5>>> allocate(pa(32), pinned = isPinned) end subroutine diff --git a/flang/test/Parser/cuf-sanity-tree.CUF b/flang/test/Parser/cuf-sanity-tree.CUF index 83d7540..b4d53f2 100644 --- a/flang/test/Parser/cuf-sanity-tree.CUF +++ b/flang/test/Parser/cuf-sanity-tree.CUF @@ -178,7 +178,7 @@ include "cuf-sanity-common" !CHECK: | | | | | | | LiteralConstant -> IntLiteralConstant = '1' !CHECK: | | | | | | Scalar -> Expr = '2_4' !CHECK: | | | | | | | LiteralConstant -> IntLiteralConstant = '2' -!CHECK: | | | | | | Scalar -> Integer -> Expr = '3_4' +!CHECK: | | | | | | Scalar -> Expr = '3_4' !CHECK: | | | | | | | LiteralConstant -> IntLiteralConstant = '3' !CHECK: | | | | ExecutionPartConstruct -> ExecutableConstruct -> ActionStmt -> CallStmt = 'CALL globalsub<<<1_4,2_4,3_4,4_4>>>()' !CHECK: | | | | | Call @@ -188,10 +188,27 @@ include "cuf-sanity-common" !CHECK: | | | | | | | LiteralConstant -> IntLiteralConstant = '1' !CHECK: | | | | | | Scalar -> Expr = '2_4' !CHECK: | | | | | | | LiteralConstant -> IntLiteralConstant = '2' -!CHECK: | | | | | | Scalar -> Integer -> Expr = '3_4' +!CHECK: | | | | | | Scalar -> Expr = '3_4' !CHECK: | | | | | | | LiteralConstant -> IntLiteralConstant = '3' !CHECK: | | | | | | Scalar -> Integer -> Expr = '4_4' !CHECK: | | | | | | | LiteralConstant -> IntLiteralConstant = '4' +!CHECK: | | | | ExecutionPartConstruct -> ExecutableConstruct -> ActionStmt -> CallStmt = 'CALL globalsub<<<1_4,2_4,9._4,4_4>>>()' +!CHECK: | | | | | Call +!CHECK: | | | | | | ProcedureDesignator -> Name = 'globalsub' +!CHECK: | | | | | Chevrons +!CHECK: | | | | | | StarOrExpr -> Scalar -> Expr = '1_4' +!CHECK: | | | | | | | LiteralConstant -> IntLiteralConstant = '1' +!CHECK: | | | | | | Scalar -> Expr = '2_4' +!CHECK: | | | | | | | LiteralConstant -> IntLiteralConstant = '2' +!CHECK: | | | | | | Scalar -> Expr = '9._4' +!CHECK: | | | | | | | Multiply +!CHECK: | | | | | | | | Expr = '8.9999997615814208984375e-1_4' +!CHECK: | | | | | | | | | LiteralConstant -> RealLiteralConstant +!CHECK: | | | | | | | | | | Real = '0.9' +!CHECK: | | | | | | | | Expr = '10_4' +!CHECK: | | | | | | | | | LiteralConstant -> IntLiteralConstant = '10' +!CHECK: | | | | | | Scalar -> Integer -> Expr = '4_4' +!CHECK: | | | | | | | LiteralConstant -> IntLiteralConstant = '4' !CHECK: | | | | ExecutionPartConstruct -> ExecutableConstruct -> ActionStmt -> AllocateStmt !CHECK: | | | | | Allocation !CHECK: | | | | | | AllocateObject = 'pa' diff --git a/flang/test/Preprocessing/bug164727.cuf b/flang/test/Preprocessing/bug164727.cuf new file mode 100644 index 0000000..89c846d --- /dev/null +++ b/flang/test/Preprocessing/bug164727.cuf @@ -0,0 +1,6 @@ +!RUN: %flang_fc1 -fdebug-unparse -x cuda %s 2>&1 | FileCheck %s +!CHECK: REAL, MANAGED, ALLOCATABLE :: x +real, & + !@cuf managed, & + allocatable :: x +end diff --git a/flang/test/Semantics/bug1491.f90 b/flang/test/Semantics/bug1491.f90 new file mode 100644 index 0000000..ccc6eea --- /dev/null +++ b/flang/test/Semantics/bug1491.f90 @@ -0,0 +1,21 @@ +!RUN: %python %S/test_errors.py %s %flang_fc1 -Werror -pedantic +module m + interface + integer function foo1() + end function + integer function foo2(j) + end function + integer function foo3() + end function + end interface +end module + +subroutine test() + integer, external :: foo1 +!WARNING: The external interface 'foo2' is not compatible with an earlier definition (distinct numbers of dummy arguments) [-Wexternal-interface-mismatch] + integer, external :: foo2 + integer, external :: foo3 + call bar(foo1()) + call bar(foo2()) + call baz(foo3) +end subroutine diff --git a/flang/test/Semantics/func-proc-result.f90 b/flang/test/Semantics/func-proc-result.f90 new file mode 100644 index 0000000..5bf8ac9 --- /dev/null +++ b/flang/test/Semantics/func-proc-result.f90 @@ -0,0 +1,18 @@ +!RUN: %python %S/test_errors.py %s %flang_fc1 + +function good() result(pptr) + procedure(), pointer :: pptr + external whatever + pptr => whatever +end + +function bad1() result(res1) + !ERROR: A function result may not be a procedure unless it is a procedure pointer + procedure() res1 +end + +!ERROR: Procedure 'res2' is referenced before being sufficiently defined in a context where it must be so +function bad2() result(res2) + !ERROR: EXTERNAL attribute not allowed on 'res2' + external res2 +end diff --git a/flang/test/Semantics/generic-error.f90 b/flang/test/Semantics/generic-error.f90 new file mode 100644 index 0000000..25c0410 --- /dev/null +++ b/flang/test/Semantics/generic-error.f90 @@ -0,0 +1,21 @@ +! RUN: not %flang_fc1 -fsyntax-only %s 2>&1 | FileCheck %s +module m + interface generic + procedure :: sub1, sub2 + end interface + contains + subroutine sub1(x) + end + subroutine sub2(j) + end +end + +program test + use m +!CHECK: error: No specific subroutine of generic 'generic' matches the actual arguments +!CHECK: Specific procedure 'sub1' does not match the actual arguments +!CHECK: Actual argument type 'REAL(8)' is not compatible with dummy argument type 'REAL(4)' +!CHECK: Specific procedure 'sub2' does not match the actual arguments +!CHECK: Actual argument type 'REAL(8)' is not compatible with dummy argument type 'INTEGER(4)' + call generic(1.d0) +end diff --git a/flang/test/Semantics/null-init.f90 b/flang/test/Semantics/null-init.f90 index d01ad75..a88cefe 100644 --- a/flang/test/Semantics/null-init.f90 +++ b/flang/test/Semantics/null-init.f90 @@ -37,7 +37,7 @@ end module module m7 interface - !WARNING: The external interface 'null' is not compatible with an earlier definition (incompatible procedure attributes: ImplicitInterface) [-Wexternal-interface-mismatch] + !WARNING: The external interface 'null' is not compatible with an earlier definition (function results have incompatible attributes) [-Wexternal-interface-mismatch] function null() result(p) integer, pointer :: p end function diff --git a/flang/test/Transforms/debug-assumed-size-array.fir b/flang/test/Transforms/debug-assumed-size-array.fir index 40e5710..2c91552 100644 --- a/flang/test/Transforms/debug-assumed-size-array.fir +++ b/flang/test/Transforms/debug-assumed-size-array.fir @@ -5,7 +5,7 @@ module { %c5 = arith.constant 5 : index %c1 = arith.constant 1 : index %c2 = arith.constant 2 : index - %c-1 = arith.constant -1 : index + %c-1 = fir.assumed_size_extent : index %0 = fir.undefined !fir.dscope %1 = fircg.ext_declare %arg0(%c5, %c-1) dummy_scope %0 {uniq_name = "_QMhelperFfnEa1"} : (!fir.ref<!fir.array<5x?xi32>>, index, index, !fir.dscope) -> !fir.ref<!fir.array<5x?xi32>> loc(#loc1) %2 = fircg.ext_declare %arg1(%c-1) origin %c2 dummy_scope %0 {uniq_name = "_QMhelperFfnEa2"} : (!fir.ref<!fir.array<?xi32>>, index, index, !fir.dscope) -> !fir.ref<!fir.array<?xi32>> loc(#loc2) diff --git a/libc/include/llvm-libc-macros/gpu/signal-macros.h b/libc/include/llvm-libc-macros/gpu/signal-macros.h index f0d49ea..76488e9 100644 --- a/libc/include/llvm-libc-macros/gpu/signal-macros.h +++ b/libc/include/llvm-libc-macros/gpu/signal-macros.h @@ -9,6 +9,8 @@ #ifndef LLVM_LIBC_MACROS_GPU_SIGNAL_MACROS_H #define LLVM_LIBC_MACROS_GPU_SIGNAL_MACROS_H +#include "__llvm-libc-common.h" + #define SIGINT 2 #define SIGILL 4 #define SIGABRT 6 @@ -16,9 +18,10 @@ #define SIGSEGV 11 #define SIGTERM 15 -#define SIG_DFL ((void (*)(int))(0)) -#define SIG_IGN ((void (*)(int))(1)) -#define SIG_ERR ((void (*)(int))(-1)) +#define SIG_ERR __LLVM_LIBC_CAST(reinterpret_cast, void (*)(int), -1) +#define SIG_DFL __LLVM_LIBC_CAST(reinterpret_cast, void (*)(int), 0) +#define SIG_IGN __LLVM_LIBC_CAST(reinterpret_cast, void (*)(int), 1) +#define SIG_HOLD __LLVM_LIBC_CAST(reinterpret_cast, void (*)(int), 2) // Max signal number #define NSIG 64 diff --git a/libc/include/llvm-libc-macros/linux/signal-macros.h b/libc/include/llvm-libc-macros/linux/signal-macros.h index d220241..e7f268d 100644 --- a/libc/include/llvm-libc-macros/linux/signal-macros.h +++ b/libc/include/llvm-libc-macros/linux/signal-macros.h @@ -9,6 +9,8 @@ #ifndef LLVM_LIBC_MACROS_LINUX_SIGNAL_MACROS_H #define LLVM_LIBC_MACROS_LINUX_SIGNAL_MACROS_H +#include "__llvm-libc-common.h" + #define SIGHUP 1 #define SIGINT 2 #define SIGQUIT 3 @@ -86,9 +88,10 @@ #error "Signal stack sizes not defined for your platform." #endif -#define SIG_DFL ((void (*)(int))0) -#define SIG_IGN ((void (*)(int))1) -#define SIG_ERR ((void (*)(int))(-1)) +#define SIG_ERR __LLVM_LIBC_CAST(reinterpret_cast, void (*)(int), -1) +#define SIG_DFL __LLVM_LIBC_CAST(reinterpret_cast, void (*)(int), 0) +#define SIG_IGN __LLVM_LIBC_CAST(reinterpret_cast, void (*)(int), 1) +#define SIG_HOLD __LLVM_LIBC_CAST(reinterpret_cast, void (*)(int), 2) // SIGCHLD si_codes #define CLD_EXITED 1 // child has exited diff --git a/lld/COFF/Chunks.cpp b/lld/COFF/Chunks.cpp index cb5cba5..548d87b 100644 --- a/lld/COFF/Chunks.cpp +++ b/lld/COFF/Chunks.cpp @@ -777,7 +777,7 @@ uint32_t SectionChunk::getSectionNumber() const { return s.getIndex() + 1; } -CommonChunk::CommonChunk(const COFFSymbolRef s) : sym(s) { +CommonChunk::CommonChunk(const COFFSymbolRef s) : live(false), sym(s) { // The value of a common symbol is its size. Align all common symbols smaller // than 32 bytes naturally, i.e. round the size up to the next power of two. // This is what MSVC link.exe does. diff --git a/lld/COFF/Chunks.h b/lld/COFF/Chunks.h index 6d88f5e..cf8857d 100644 --- a/lld/COFF/Chunks.h +++ b/lld/COFF/Chunks.h @@ -522,6 +522,8 @@ public: uint32_t getOutputCharacteristics() const override; StringRef getSectionName() const override { return ".bss"; } + bool live; + private: const COFFSymbolRef sym; }; diff --git a/lld/COFF/Symbols.h b/lld/COFF/Symbols.h index c86ded8..9f077dd 100644 --- a/lld/COFF/Symbols.h +++ b/lld/COFF/Symbols.h @@ -236,6 +236,8 @@ public: CommonChunk *c = nullptr) : DefinedCOFF(DefinedCommonKind, f, n, s), data(c), size(size) { this->isExternal = true; + if (c) + c->live = true; } static bool classof(const Symbol *s) { diff --git a/lld/COFF/Writer.cpp b/lld/COFF/Writer.cpp index 258a82e..3ac2668 100644 --- a/lld/COFF/Writer.cpp +++ b/lld/COFF/Writer.cpp @@ -1114,6 +1114,10 @@ void Writer::createSections() { sc->printDiscardedMessage(); continue; } + if (auto *cc = dyn_cast<CommonChunk>(c)) { + if (!cc->live) + continue; + } StringRef name = c->getSectionName(); if (shouldStripSectionSuffix(sc, name, ctx.config.mingw)) name = name.split('$').first; diff --git a/lld/test/COFF/common-dedup.ll b/lld/test/COFF/common-dedup.ll new file mode 100644 index 0000000..cec3a70 --- /dev/null +++ b/lld/test/COFF/common-dedup.ll @@ -0,0 +1,39 @@ +; REQUIRES: x86 +; RUN: rm -rf %t.dir +; RUN: split-file %s %t.dir +; RUN: llc %t.dir/t1.ll -o %t.dir/t1.obj --filetype=obj +; RUN: llc %t.dir/t2.ll -o %t.dir/t2.obj --filetype=obj +; RUN: lld-link %t.dir/t1.obj %t.dir/t2.obj -entry:main -out:%t.dir/out.exe +; RUN: llvm-readobj --section-headers %t.dir/out.exe | FileCheck %s + +; Make sure that the data section contains just one copy of @a, not two. +; CHECK: Name: .data +; CHECK-NEXT: VirtualSize: 0x1000 + +;--- t1.ll +target triple = "x86_64-pc-windows-msvc" +@a = common global [4096 x i8] zeroinitializer + +define i32 @usea() { + %ref_common = load i32, ptr @a + ret i32 %ref_common +} + +;--- t2.ll +target triple = "x86_64-pc-windows-msvc" +@a = common global [4096 x i8] zeroinitializer + +define i32 @useb() { + %ref_common = load i32, ptr @a + ret i32 %ref_common +} + +declare i32 @usea() + +define dso_local i32 @main() local_unnamed_addr { +entry: + %a = tail call i32 @usea() + %b = tail call i32 @useb() + %add = add nsw i32 %a, %b + ret i32 %add +} diff --git a/lldb/include/lldb/Target/Target.h b/lldb/include/lldb/Target/Target.h index f4a0923..c375df2 100644 --- a/lldb/include/lldb/Target/Target.h +++ b/lldb/include/lldb/Target/Target.h @@ -1356,7 +1356,11 @@ public: StopHook(const StopHook &rhs); virtual ~StopHook() = default; - enum class StopHookKind : uint32_t { CommandBased = 0, ScriptBased }; + enum class StopHookKind : uint32_t { + CommandBased = 0, + ScriptBased, + CodeBased, + }; enum class StopHookResult : uint32_t { KeepStopped = 0, RequestContinue, @@ -1403,6 +1407,12 @@ public: bool GetRunAtInitialStop() const { return m_at_initial_stop; } + void SetSuppressOutput(bool suppress_output) { + m_suppress_output = suppress_output; + } + + bool GetSuppressOutput() const { return m_suppress_output; } + void GetDescription(Stream &s, lldb::DescriptionLevel level) const; virtual void GetSubclassDescription(Stream &s, lldb::DescriptionLevel level) const = 0; @@ -1414,6 +1424,7 @@ public: bool m_active = true; bool m_auto_continue = false; bool m_at_initial_stop = true; + bool m_suppress_output = false; StopHook(lldb::TargetSP target_sp, lldb::user_id_t uid); }; @@ -1433,8 +1444,8 @@ public: private: StringList m_commands; - // Use CreateStopHook to make a new empty stop hook. The GetCommandPointer - // and fill it with commands, and SetSpecifier to set the specifier shared + // Use CreateStopHook to make a new empty stop hook. Use SetActionFromString + // to fill it with commands, and SetSpecifier to set the specifier shared // pointer (can be null, that will match anything.) StopHookCommandLine(lldb::TargetSP target_sp, lldb::user_id_t uid) : StopHook(target_sp, uid) {} @@ -1460,19 +1471,56 @@ public: StructuredDataImpl m_extra_args; lldb::ScriptedStopHookInterfaceSP m_interface_sp; - /// Use CreateStopHook to make a new empty stop hook. The GetCommandPointer - /// and fill it with commands, and SetSpecifier to set the specifier shared - /// pointer (can be null, that will match anything.) + /// Use CreateStopHook to make a new empty stop hook. Use SetScriptCallback + /// to set the script to execute, and SetSpecifier to set the specifier + /// shared pointer (can be null, that will match anything.) StopHookScripted(lldb::TargetSP target_sp, lldb::user_id_t uid) : StopHook(target_sp, uid) {} friend class Target; }; + class StopHookCoded : public StopHook { + public: + ~StopHookCoded() override = default; + + using HandleStopCallback = StopHookResult(ExecutionContext &exc_ctx, + lldb::StreamSP output); + + void SetCallback(llvm::StringRef name, HandleStopCallback *callback) { + m_name = name; + m_callback = callback; + } + + StopHookResult HandleStop(ExecutionContext &exc_ctx, + lldb::StreamSP output) override { + return m_callback(exc_ctx, output); + } + + void GetSubclassDescription(Stream &s, + lldb::DescriptionLevel level) const override { + s.Indent(); + s.Printf("%s (built-in)\n", m_name.c_str()); + } + + private: + std::string m_name; + HandleStopCallback *m_callback; + + /// Use CreateStopHook to make a new empty stop hook. Use SetCallback to set + /// the callback to execute, and SetSpecifier to set the specifier shared + /// pointer (can be null, that will match anything.) + StopHookCoded(lldb::TargetSP target_sp, lldb::user_id_t uid) + : StopHook(target_sp, uid) {} + friend class Target; + }; + + void RegisterInternalStopHooks(); + typedef std::shared_ptr<StopHook> StopHookSP; /// Add an empty stop hook to the Target's stop hook list, and returns a - /// shared pointer to it in new_hook. Returns the id of the new hook. - StopHookSP CreateStopHook(StopHook::StopHookKind kind); + /// shared pointer to the new hook. + StopHookSP CreateStopHook(StopHook::StopHookKind kind, bool internal = false); /// If you tried to create a stop hook, and that failed, call this to /// remove the stop hook, as it will also reset the stop hook counter. @@ -1484,8 +1532,6 @@ public: // control over the process for the first time. bool RunStopHooks(bool at_initial_stop = false); - size_t GetStopHookSize(); - bool SetSuppresStopHooks(bool suppress) { bool old_value = m_suppress_stop_hooks; m_suppress_stop_hooks = suppress; @@ -1504,19 +1550,7 @@ public: void SetAllStopHooksActiveState(bool active_state); - size_t GetNumStopHooks() const { return m_stop_hooks.size(); } - - StopHookSP GetStopHookAtIndex(size_t index) { - if (index >= GetNumStopHooks()) - return StopHookSP(); - StopHookCollection::iterator pos = m_stop_hooks.begin(); - - while (index > 0) { - pos++; - index--; - } - return (*pos).second; - } + const std::vector<StopHookSP> GetStopHooks(bool internal = false) const; lldb::PlatformSP GetPlatform() { return m_platform_sp; } @@ -1656,6 +1690,7 @@ protected: typedef std::map<lldb::user_id_t, StopHookSP> StopHookCollection; StopHookCollection m_stop_hooks; lldb::user_id_t m_stop_hook_next_id; + std::vector<StopHookSP> m_internal_stop_hooks; uint32_t m_latest_stop_hook_id; /// This records the last natural stop at /// which we ran a stop-hook. bool m_valid; diff --git a/lldb/source/Commands/CommandCompletions.cpp b/lldb/source/Commands/CommandCompletions.cpp index b2fc893..c60d303 100644 --- a/lldb/source/Commands/CommandCompletions.cpp +++ b/lldb/source/Commands/CommandCompletions.cpp @@ -777,13 +777,11 @@ void CommandCompletions::StopHookIDs(CommandInterpreter &interpreter, if (!target_sp) return; - const size_t num = target_sp->GetNumStopHooks(); - for (size_t idx = 0; idx < num; ++idx) { + for (auto &stophook_sp : target_sp->GetStopHooks()) { StreamString strm; // The value 11 is an offset to make the completion description looks // neater. strm.SetIndentLevel(11); - const Target::StopHookSP stophook_sp = target_sp->GetStopHookAtIndex(idx); stophook_sp->GetDescription(strm, lldb::eDescriptionLevelInitial); request.TryCompleteCurrentArg(std::to_string(stophook_sp->GetID()), strm.GetString()); diff --git a/lldb/source/Commands/CommandObjectBreakpoint.cpp b/lldb/source/Commands/CommandObjectBreakpoint.cpp index de0a7e7..5a55126 100644 --- a/lldb/source/Commands/CommandObjectBreakpoint.cpp +++ b/lldb/source/Commands/CommandObjectBreakpoint.cpp @@ -1114,9 +1114,7 @@ public: CommandObjectBreakpointList(CommandInterpreter &interpreter) : CommandObjectParsed( interpreter, "breakpoint list", - "List some or all breakpoints at configurable levels of detail.", - nullptr) { - CommandArgumentData bp_id_arg; + "List some or all breakpoints at configurable levels of detail.") { // Define the first (and only) variant of this arg. AddSimpleArgumentList(eArgTypeBreakpointID, eArgRepeatOptional); diff --git a/lldb/source/Commands/CommandObjectTarget.cpp b/lldb/source/Commands/CommandObjectTarget.cpp index c59d028..8de6521 100644 --- a/lldb/source/Commands/CommandObjectTarget.cpp +++ b/lldb/source/Commands/CommandObjectTarget.cpp @@ -5223,33 +5223,72 @@ private: #pragma mark CommandObjectTargetStopHookList // CommandObjectTargetStopHookList +#define LLDB_OPTIONS_target_stop_hook_list +#include "CommandOptions.inc" class CommandObjectTargetStopHookList : public CommandObjectParsed { public: CommandObjectTargetStopHookList(CommandInterpreter &interpreter) : CommandObjectParsed(interpreter, "target stop-hook list", - "List all stop-hooks.", "target stop-hook list") {} + "List all stop-hooks.") {} ~CommandObjectTargetStopHookList() override = default; + Options *GetOptions() override { return &m_options; } + + class CommandOptions : public Options { + public: + CommandOptions() = default; + ~CommandOptions() override = default; + + Status SetOptionValue(uint32_t option_idx, llvm::StringRef option_arg, + ExecutionContext *execution_context) override { + Status error; + const int short_option = m_getopt_table[option_idx].val; + + switch (short_option) { + case 'i': + m_internal = true; + break; + default: + llvm_unreachable("Unimplemented option"); + } + + return error; + } + + void OptionParsingStarting(ExecutionContext *execution_context) override { + m_internal = false; + } + + llvm::ArrayRef<OptionDefinition> GetDefinitions() override { + return llvm::ArrayRef(g_target_stop_hook_list_options); + } + + // Instance variables to hold the values for command options. + bool m_internal = false; + }; + protected: void DoExecute(Args &command, CommandReturnObject &result) override { Target &target = GetTarget(); - size_t num_hooks = target.GetNumStopHooks(); - if (num_hooks == 0) { - result.GetOutputStream().PutCString("No stop hooks.\n"); - } else { - for (size_t i = 0; i < num_hooks; i++) { - Target::StopHookSP this_hook = target.GetStopHookAtIndex(i); - if (i > 0) - result.GetOutputStream().PutCString("\n"); - this_hook->GetDescription(result.GetOutputStream(), - eDescriptionLevelFull); - } + bool printed_hook = false; + for (auto &hook : target.GetStopHooks(m_options.m_internal)) { + if (printed_hook) + result.GetOutputStream().PutCString("\n"); + hook->GetDescription(result.GetOutputStream(), eDescriptionLevelFull); + printed_hook = true; } + + if (!printed_hook) + result.GetOutputStream().PutCString("No stop hooks.\n"); + result.SetStatus(eReturnStatusSuccessFinishResult); } + +private: + CommandOptions m_options; }; #pragma mark CommandObjectMultiwordTargetStopHooks diff --git a/lldb/source/Commands/Options.td b/lldb/source/Commands/Options.td index a9f054e..ed06131 100644 --- a/lldb/source/Commands/Options.td +++ b/lldb/source/Commands/Options.td @@ -77,7 +77,7 @@ let Command = "breakpoint list" in { // FIXME: We need to add an "internal" command, and then add this sort of // thing to it. But I need to see it for now, and don't want to wait. def blist_internal : Option<"internal", "i">, - Desc<"Show debugger ${i}nternal breakpoints">; + Desc<"Show debugger ${i}nternal breakpoints.">; def blist_brief : Option<"brief", "b">, Group<1>, Desc<"Give a ${b}rief description of the breakpoint (no " @@ -1686,7 +1686,7 @@ let Command = "target modules lookup" in { "match, if a best match is available.">; } -let Command = "target stop hook add" in { +let Command = "target stop_hook add" in { def target_stop_hook_add_one_liner : Option<"one-liner", "o">, GroupRange<1, 3>, @@ -1762,6 +1762,12 @@ let Command = "target stop hook add" in { "Defaults to true.">; } +let Command = "target stop_hook list" in { + def target_stop_hook_list_internal + : Option<"internal", "i">, + Desc<"Show debugger ${i}nternal stop hooks.">; +} + let Command = "thread backtrace" in { def thread_backtrace_count : Option<"count", "c">, Group<1>, diff --git a/lldb/source/Target/Target.cpp b/lldb/source/Target/Target.cpp index e224a12..d070c3d 100644 --- a/lldb/source/Target/Target.cpp +++ b/lldb/source/Target/Target.cpp @@ -183,8 +183,8 @@ Target::Target(Debugger &debugger, const ArchSpec &target_arch, m_watchpoint_list(), m_process_sp(), m_search_filter_sp(), m_image_search_paths(ImageSearchPathsChanged, this), m_source_manager_up(), m_stop_hooks(), m_stop_hook_next_id(0), - m_latest_stop_hook_id(0), m_valid(true), m_suppress_stop_hooks(false), - m_is_dummy_target(is_dummy_target), + m_internal_stop_hooks(), m_latest_stop_hook_id(0), m_valid(true), + m_suppress_stop_hooks(false), m_is_dummy_target(is_dummy_target), m_target_unique_id(g_target_unique_id++), m_frame_recognizer_manager_up( std::make_unique<StackFrameRecognizerManager>()) { @@ -217,6 +217,7 @@ Target::~Target() { void Target::PrimeFromDummyTarget(Target &target) { m_stop_hooks = target.m_stop_hooks; m_stop_hook_next_id = target.m_stop_hook_next_id; + m_internal_stop_hooks = target.m_internal_stop_hooks; for (const auto &breakpoint_sp : target.m_breakpoint_list.Breakpoints()) { if (breakpoint_sp->IsInternal()) @@ -383,6 +384,7 @@ void Target::Destroy() { m_image_search_paths.Clear(notify); m_stop_hooks.clear(); m_stop_hook_next_id = 0; + m_internal_stop_hooks.clear(); m_suppress_stop_hooks = false; m_repl_map.clear(); Args signal_args; @@ -3041,8 +3043,9 @@ SourceManager &Target::GetSourceManager() { return *m_source_manager_up; } -Target::StopHookSP Target::CreateStopHook(StopHook::StopHookKind kind) { - lldb::user_id_t new_uid = ++m_stop_hook_next_id; +Target::StopHookSP Target::CreateStopHook(StopHook::StopHookKind kind, + bool internal) { + user_id_t new_uid = (internal ? LLDB_INVALID_UID : ++m_stop_hook_next_id); Target::StopHookSP stop_hook_sp; switch (kind) { case StopHook::StopHookKind::CommandBased: @@ -3051,8 +3054,14 @@ Target::StopHookSP Target::CreateStopHook(StopHook::StopHookKind kind) { case StopHook::StopHookKind::ScriptBased: stop_hook_sp.reset(new StopHookScripted(shared_from_this(), new_uid)); break; + case StopHook::StopHookKind::CodeBased: + stop_hook_sp.reset(new StopHookCoded(shared_from_this(), new_uid)); + break; } - m_stop_hooks[new_uid] = stop_hook_sp; + if (internal) + m_internal_stop_hooks.push_back(stop_hook_sp); + else + m_stop_hooks[new_uid] = stop_hook_sp; return stop_hook_sp; } @@ -3098,6 +3107,23 @@ void Target::SetAllStopHooksActiveState(bool active_state) { } } +// FIXME: Ideally we would like to return a `const &` (const reference) instead +// of creating copy here, but that is not possible due to different container +// types. In C++20, we should be able to use `std::ranges::views::values` to +// adapt the key-pair entries in the `std::map` (behind `StopHookCollection`) +// to avoid creating the copy. +const std::vector<Target::StopHookSP> +Target::GetStopHooks(bool internal) const { + if (internal) + return m_internal_stop_hooks; + + std::vector<StopHookSP> stop_hooks; + for (auto &[_, hook] : m_stop_hooks) + stop_hooks.push_back(hook); + + return stop_hooks; +} + bool Target::RunStopHooks(bool at_initial_stop) { if (m_suppress_stop_hooks) return false; @@ -3111,16 +3137,20 @@ bool Target::RunStopHooks(bool at_initial_stop) { if (!(state == eStateStopped || state == eStateAttaching)) return false; - if (m_stop_hooks.empty()) - return false; + auto is_active = [at_initial_stop](StopHookSP hook) { + bool should_run_now = (!at_initial_stop || hook->GetRunAtInitialStop()); + return hook->IsActive() && should_run_now; + }; - bool no_active_hooks = - llvm::none_of(m_stop_hooks, [at_initial_stop](auto &p) { - bool should_run_now = - !at_initial_stop || p.second->GetRunAtInitialStop(); - return p.second->IsActive() && should_run_now; - }); - if (no_active_hooks) + // Create list of active internal and user stop hooks. + std::vector<StopHookSP> active_hooks; + llvm::copy_if(m_internal_stop_hooks, std::back_inserter(active_hooks), + is_active); + for (auto &[_, hook] : m_stop_hooks) { + if (is_active(hook)) + active_hooks.push_back(hook); + } + if (active_hooks.empty()) return false; // Make sure we check that we are not stopped because of us running a user @@ -3169,24 +3199,21 @@ bool Target::RunStopHooks(bool at_initial_stop) { StreamSP output_sp = m_debugger.GetAsyncOutputStream(); auto on_exit = llvm::make_scope_exit([output_sp] { output_sp->Flush(); }); - bool print_hook_header = (m_stop_hooks.size() != 1); - bool print_thread_header = (num_exe_ctx != 1); + size_t num_hooks_with_output = llvm::count_if( + active_hooks, [](auto h) { return !h->GetSuppressOutput(); }); + bool print_hook_header = (num_hooks_with_output > 1); + bool print_thread_header = (num_exe_ctx > 1); bool should_stop = false; bool requested_continue = false; - for (auto stop_entry : m_stop_hooks) { - StopHookSP cur_hook_sp = stop_entry.second; - if (!cur_hook_sp->IsActive()) - continue; - if (at_initial_stop && !cur_hook_sp->GetRunAtInitialStop()) - continue; - + for (auto cur_hook_sp : active_hooks) { bool any_thread_matched = false; for (auto exc_ctx : exc_ctx_with_reasons) { if (!cur_hook_sp->ExecutionContextPasses(exc_ctx)) continue; - if (print_hook_header && !any_thread_matched) { + bool suppress_output = cur_hook_sp->GetSuppressOutput(); + if (print_hook_header && !any_thread_matched && !suppress_output) { StreamString s; cur_hook_sp->GetDescription(s, eDescriptionLevelBrief); if (s.GetSize() != 0) @@ -3197,7 +3224,7 @@ bool Target::RunStopHooks(bool at_initial_stop) { any_thread_matched = true; } - if (print_thread_header) + if (print_thread_header && !suppress_output) output_sp->Printf("-- Thread %d\n", exc_ctx.GetThreadPtr()->GetIndexID()); diff --git a/lldb/test/API/macosx/posix_spawn/TestLaunchProcessPosixSpawn.py b/lldb/test/API/macosx/posix_spawn/TestLaunchProcessPosixSpawn.py index ffb6ef0..0f40dfd 100644 --- a/lldb/test/API/macosx/posix_spawn/TestLaunchProcessPosixSpawn.py +++ b/lldb/test/API/macosx/posix_spawn/TestLaunchProcessPosixSpawn.py @@ -36,9 +36,11 @@ class TestLaunchProcessPosixSpawn(TestBase): def run_arch(self, exe, arch): self.runCmd("target create -arch {} {}".format(arch, exe)) - self.runCmd("run") - - process = self.dbg.GetSelectedTarget().process + target = self.dbg.GetSelectedTarget() + launch_info = target.GetLaunchInfo() + error = lldb.SBError() + process = target.Launch(launch_info, error) + self.assertTrue(error.Success(), str(error)) self.assertState(process.GetState(), lldb.eStateExited) self.assertIn("slice: {}".format(arch), process.GetSTDOUT(1000)) diff --git a/lldb/test/Shell/ExecControl/StopHook/stop-hook-list.test b/lldb/test/Shell/ExecControl/StopHook/stop-hook-list.test new file mode 100644 index 0000000..42d0a67 --- /dev/null +++ b/lldb/test/Shell/ExecControl/StopHook/stop-hook-list.test @@ -0,0 +1,70 @@ +# Test stop hook user ID assignment, ordering, and printing. +# +# RUN: %lldb -b -s %s | FileCheck %s + +# Create some stop hooks +target stop-hook add -o 'print "Hello"' +target stop-hook add -o 'print "world,"' +target stop-hook add -o 'print "nice"' +target stop-hook add -o 'print "weather"' +target stop-hook add -o 'print "today!"' + +# Print hooks +target stop-hook list + +# CHECK: (lldb) target stop-hook list +# CHECK: Hook: 1 +# CHECK: "Hello" +# CHECK: Hook: 2 +# CHECK: "world," +# CHECK: Hook: 3 +# CHECK: "nice" +# CHECK: Hook: 4 +# CHECK: "weather" +# CHECK: Hook: 5 +# CHECK: "today!" + +# Delete last hook, then add new one +target stop-hook delete 5 +target stop-hook add -o 'print "Sunshine,"' + +# Stop hook gets new user ID (it is not reused) +# CHECK: (lldb) target stop-hook add -o 'print "Sunshine,"' +# CHECK: Stop hook #6 added. + +target stop-hook list +# CHECK: (lldb) target stop-hook list +# CHECK: Hook: 4 +# CHECK-NOT: Hook: 5 +# CHECK: Hook: 6 + +# Add a few more hooks +target stop-hook add -o 'print "rain,"' +target stop-hook add -o 'print "and wind!"' +target stop-hook add -o 'print "It is all okay!"' +# CHECK: Stop hook #7 added. +# CHECK: Stop hook #8 added. +# CHECK: Stop hook #9 added. + +# Delete a few hooks +target stop-hook delete 1 +target stop-hook delete 3 +target stop-hook delete 7 +target stop-hook delete 9 + +# Check that the list is still well-ordered +target stop-hook list +# CHECK: (lldb) target stop-hook list +# CHECK-NOT: Hook: 1 +# CHECK: Hook: 2 +# CHECK: "world," +# CHECK-NOT: Hook: 3 +# CHECK: Hook: 4 +# CHECK: "weather" +# CHECK-NOT: Hook: 5 +# CHECK: Hook: 6 +# CHECK: "Sunshine," +# CHECK-NOT: Hook: 7 +# CHECK: Hook: 8 +# CHECK: "and wind!" +# CHECK-NOT: Hook: 9 diff --git a/llvm/docs/DirectX/DXILArchitecture.rst b/llvm/docs/DirectX/DXILArchitecture.rst index 32b1e72..bce7fda 100644 --- a/llvm/docs/DirectX/DXILArchitecture.rst +++ b/llvm/docs/DirectX/DXILArchitecture.rst @@ -118,9 +118,10 @@ The passes to generate DXIL IR follow the flow: Each of these passes has a defined responsibility: #. DXILOpLowering translates LLVM intrinsic calls to dx.op calls. -#. DXILPrepare transforms the DXIL IR to be compatible with LLVM 3.7, and - inserts bitcasts to allow typed pointers to be inserted. -#. DXILTranslateMetadata emits the DXIL Metadata structures. +#. DXILPrepare updates functions in the DXIL IR to be compatible with LLVM 3.7, + namely removing attributes, and inserting bitcasts to allow typed pointers + to be inserted. +#. DXILTranslateMetadata transforms and emits all recognized DXIL Metadata. The passes to encode DXIL to binary in the DX Container follow the flow: diff --git a/llvm/docs/ProgrammersManual.rst b/llvm/docs/ProgrammersManual.rst index 9cdac9c..d99b584 100644 --- a/llvm/docs/ProgrammersManual.rst +++ b/llvm/docs/ProgrammersManual.rst @@ -2161,6 +2161,16 @@ that are not simple pointers (use :ref:`SmallPtrSet <dss_smallptrset>` for pointers). Note that ``DenseSet`` has the same requirements for the value type that :ref:`DenseMap <dss_densemap>` has. +.. _dss_radixtree: + +llvm/ADT/RadixTree.h +^^^^^^^^^^^^^^^^^^^^ + +``RadixTree`` is a trie-based data structure that stores range-like keys and +their associated values. It is particularly efficient for storing keys that +share common prefixes, as it can compress these prefixes to save memory. It +supports efficient search of matching prefixes. + .. _dss_sparseset: llvm/ADT/SparseSet.h diff --git a/llvm/include/llvm/ADT/IndexedMap.h b/llvm/include/llvm/ADT/IndexedMap.h index 55935a7..02193c7 100644 --- a/llvm/include/llvm/ADT/IndexedMap.h +++ b/llvm/include/llvm/ADT/IndexedMap.h @@ -43,40 +43,40 @@ class IndexedMap { // is trivially copyable. using StorageT = SmallVector<T, 0>; - StorageT storage_; - T nullVal_ = T(); - ToIndexT toIndex_; + StorageT Storage; + T NullVal = T(); + ToIndexT ToIndex; public: IndexedMap() = default; - explicit IndexedMap(const T &val) : nullVal_(val) {} + explicit IndexedMap(const T &Val) : NullVal(Val) {} - typename StorageT::reference operator[](IndexT n) { - assert(toIndex_(n) < storage_.size() && "index out of bounds!"); - return storage_[toIndex_(n)]; + typename StorageT::reference operator[](IndexT N) { + assert(ToIndex(N) < Storage.size() && "index out of bounds!"); + return Storage[ToIndex(N)]; } - typename StorageT::const_reference operator[](IndexT n) const { - assert(toIndex_(n) < storage_.size() && "index out of bounds!"); - return storage_[toIndex_(n)]; + typename StorageT::const_reference operator[](IndexT N) const { + assert(ToIndex(N) < Storage.size() && "index out of bounds!"); + return Storage[ToIndex(N)]; } - void reserve(typename StorageT::size_type s) { storage_.reserve(s); } + void reserve(typename StorageT::size_type S) { Storage.reserve(S); } - void resize(typename StorageT::size_type s) { storage_.resize(s, nullVal_); } + void resize(typename StorageT::size_type S) { Storage.resize(S, NullVal); } - void clear() { storage_.clear(); } + void clear() { Storage.clear(); } - void grow(IndexT n) { - unsigned NewSize = toIndex_(n) + 1; - if (NewSize > storage_.size()) + void grow(IndexT N) { + unsigned NewSize = ToIndex(N) + 1; + if (NewSize > Storage.size()) resize(NewSize); } - bool inBounds(IndexT n) const { return toIndex_(n) < storage_.size(); } + bool inBounds(IndexT N) const { return ToIndex(N) < Storage.size(); } - typename StorageT::size_type size() const { return storage_.size(); } + typename StorageT::size_type size() const { return Storage.size(); } }; } // namespace llvm diff --git a/llvm/include/llvm/ADT/RadixTree.h b/llvm/include/llvm/ADT/RadixTree.h new file mode 100644 index 0000000..a65acdd --- /dev/null +++ b/llvm/include/llvm/ADT/RadixTree.h @@ -0,0 +1,351 @@ +//===-- llvm/ADT/RadixTree.h - Radix Tree implementation --------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +//===----------------------------------------------------------------------===// +// +// This file implements a Radix Tree. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_RADIXTREE_H +#define LLVM_ADT_RADIXTREE_H + +#include "llvm/ADT/ADL.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/iterator.h" +#include "llvm/ADT/iterator_range.h" +#include <cassert> +#include <cstddef> +#include <iterator> +#include <limits> +#include <list> +#include <utility> +#include <vector> + +namespace llvm { + +/// \brief A Radix Tree implementation. +/// +/// A Radix Tree (also known as a compact prefix tree or radix trie) is a +/// data structure that stores a dynamic set or associative array where keys +/// are strings and values are associated with these keys. Unlike a regular +/// trie, the edges of a radix tree can be labeled with sequences of characters +/// as well as single characters. This makes radix trees more efficient for +/// storing sparse data sets, where many nodes in a regular trie would have +/// only one child. +/// +/// This implementation supports arbitrary key types that can be iterated over +/// (e.g., `std::string`, `std::vector<char>`, `ArrayRef<char>`). The key type +/// must provide `begin()` and `end()` for iteration. +/// +/// The tree stores `std::pair<const KeyType, T>` as its value type. +/// +/// Example usage: +/// \code +/// llvm::RadixTree<StringRef, int> Tree; +/// Tree.emplace("apple", 1); +/// Tree.emplace("grapefruit", 2); +/// Tree.emplace("grape", 3); +/// +/// // Find prefixes +/// for (const auto &[Key, Value] : Tree.find_prefixes("grapefruit juice")) { +/// // pair will be {"grape", 3} +/// // pair will be {"grapefruit", 2} +/// llvm::outs() << Key << ": " << Value << "\n"; +/// } +/// +/// // Iterate over all elements +/// for (const auto &[Key, Value] : Tree) +/// llvm::outs() << Key << ": " << Value << "\n"; +/// \endcode +/// +/// \note +/// The `RadixTree` takes ownership of the `KeyType` and `T` objects +/// inserted into it. When an element is removed or the tree is destroyed, +/// these objects will be destructed. +/// However, if `KeyType` is a reference-like type, e.g., StringRef or range, +/// the user must guarantee that the referenced data has a lifetime longer than +/// the tree. +template <typename KeyType, typename T> class RadixTree { +public: + using key_type = KeyType; + using mapped_type = T; + using value_type = std::pair<const KeyType, mapped_type>; + +private: + using KeyConstIteratorType = + decltype(adl_begin(std::declval<const key_type &>())); + using KeyConstIteratorRangeType = iterator_range<KeyConstIteratorType>; + using KeyValueType = + remove_cvref_t<decltype(*adl_begin(std::declval<key_type &>()))>; + using ContainerType = std::list<value_type>; + + /// Represents an internal node in the Radix Tree. + struct Node { + KeyConstIteratorRangeType Key{KeyConstIteratorType{}, + KeyConstIteratorType{}}; + std::vector<Node> Children; + + /// An iterator to the value associated with this node. + /// + /// If this node does not have a value (i.e., it's an internal node that + /// only serves as a path to other values), this iterator will be equal + /// to default constructed `ContainerType::iterator()`. + typename ContainerType::iterator Value; + + /// The first character of the Key. Used for fast child lookup. + KeyValueType KeyFront; + + Node() = default; + Node(const KeyConstIteratorRangeType &Key) + : Key(Key), KeyFront(*Key.begin()) { + assert(!Key.empty()); + } + + Node(Node &&) = default; + Node &operator=(Node &&) = default; + + Node(const Node &) = delete; + Node &operator=(const Node &) = delete; + + const Node *findChild(const KeyConstIteratorRangeType &Key) const { + if (Key.empty()) + return nullptr; + for (const Node &Child : Children) { + assert(!Child.Key.empty()); // Only root can be empty. + if (Child.KeyFront == *Key.begin()) + return &Child; + } + return nullptr; + } + + Node *findChild(const KeyConstIteratorRangeType &Query) { + const Node *This = this; + return const_cast<Node *>(This->findChild(Query)); + } + + size_t countNodes() const { + size_t R = 1; + for (const Node &C : Children) + R += C.countNodes(); + return R; + } + + /// + /// Splits the current node into two. + /// + /// This function is used when a new key needs to be inserted that shares + /// a common prefix with the current node's key, but then diverges. + /// The current `Key` is truncated to the common prefix, and a new child + /// node is created for the remainder of the original node's `Key`. + /// + /// \param SplitPoint An iterator pointing to the character in the current + /// `Key` where the split should occur. + void split(KeyConstIteratorType SplitPoint) { + Node Child(make_range(SplitPoint, Key.end())); + Key = make_range(Key.begin(), SplitPoint); + + Children.swap(Child.Children); + std::swap(Value, Child.Value); + + Children.emplace_back(std::move(Child)); + } + }; + + /// Root always corresponds to the empty key, which is the shortest possible + /// prefix for everything. + Node Root; + ContainerType KeyValuePairs; + + /// Finds or creates a new tail or leaf node corresponding to the `Key`. + Node &findOrCreate(KeyConstIteratorRangeType Key) { + Node *Curr = &Root; + if (Key.empty()) + return *Curr; + + for (;;) { + auto [I1, I2] = llvm::mismatch(Key, Curr->Key); + Key = make_range(I1, Key.end()); + + if (I2 != Curr->Key.end()) { + // Match is partial. Either query is too short, or there is mismatching + // character. Split either way, and put new node in between of the + // current and its children. + Curr->split(I2); + + // Split was caused by mismatch, so `findChild` would fail. + break; + } + + Node *Child = Curr->findChild(Key); + if (!Child) + break; + + // Move to child with the same first character. + Curr = Child; + } + + if (Key.empty()) { + // The current node completely matches the key, return it. + return *Curr; + } + + // `Key` is a suffix of original `Key` unmatched by path from the `Root` to + // the `Curr`, and we have no candidate in the children to match more. + // Create a new one. + return Curr->Children.emplace_back(Key); + } + + /// + /// An iterator for traversing prefixes search results. + /// + /// This iterator is used by `find_prefixes` to traverse the tree and find + /// elements that are prefixes to the given key. It's a forward iterator. + /// + /// \tparam MappedType The type of the value pointed to by the iterator. + /// This will be `value_type` for non-const iterators + /// and `const value_type` for const iterators. + template <typename MappedType> + class IteratorImpl + : public iterator_facade_base<IteratorImpl<MappedType>, + std::forward_iterator_tag, MappedType> { + const Node *Curr = nullptr; + KeyConstIteratorRangeType Query{KeyConstIteratorType{}, + KeyConstIteratorType{}}; + + void findNextValid() { + while (Curr && Curr->Value == typename ContainerType::iterator()) + advance(); + } + + void advance() { + assert(Curr); + if (Query.empty()) { + Curr = nullptr; + return; + } + + Curr = Curr->findChild(Query); + if (!Curr) { + Curr = nullptr; + return; + } + + auto [I1, I2] = llvm::mismatch(Query, Curr->Key); + if (I2 != Curr->Key.end()) { + Curr = nullptr; + return; + } + Query = make_range(I1, Query.end()); + } + + friend class RadixTree; + IteratorImpl(const Node *C, const KeyConstIteratorRangeType &Q) + : Curr(C), Query(Q) { + findNextValid(); + } + + public: + IteratorImpl() = default; + + MappedType &operator*() const { return *Curr->Value; } + + IteratorImpl &operator++() { + advance(); + findNextValid(); + return *this; + } + + bool operator==(const IteratorImpl &Other) const { + return Curr == Other.Curr; + } + }; + +public: + RadixTree() = default; + RadixTree(RadixTree &&) = default; + RadixTree &operator=(RadixTree &&) = default; + + using prefix_iterator = IteratorImpl<value_type>; + using const_prefix_iterator = IteratorImpl<const value_type>; + + using iterator = typename ContainerType::iterator; + using const_iterator = typename ContainerType::const_iterator; + + /// Returns true if the tree is empty. + bool empty() const { return KeyValuePairs.empty(); } + + /// Returns the number of elements in the tree. + size_t size() const { return KeyValuePairs.size(); } + + /// Returns the number of nodes in the tree. + /// + /// This function counts all internal nodes in the tree. It can be useful for + /// understanding the memory footprint or complexity of the tree structure. + size_t countNodes() const { return Root.countNodes(); } + + /// Returns an iterator to the first element. + iterator begin() { return KeyValuePairs.begin(); } + const_iterator begin() const { return KeyValuePairs.begin(); } + + /// Returns an iterator to the end of the tree. + iterator end() { return KeyValuePairs.end(); } + const_iterator end() const { return KeyValuePairs.end(); } + + /// Constructs and inserts a new element into the tree. + /// + /// This function constructs an element in place within the tree. If an + /// element with the same key already exists, the insertion fails and the + /// function returns an iterator to the existing element along with `false`. + /// Otherwise, the new element is inserted and the function returns an + /// iterator to the new element along with `true`. + /// + /// \param Key The key of the element to construct. + /// \param Args Arguments to forward to the constructor of the mapped_type. + /// \return A pair consisting of an iterator to the inserted element (or to + /// the element that prevented insertion) and a boolean value + /// indicating whether the insertion took place. + template <typename... Ts> + std::pair<iterator, bool> emplace(key_type &&Key, Ts &&...Args) { + // We want to make new `Node` to refer key in the container, not the one + // from the argument. + // FIXME: Determine that we need a new node, before expanding + // `KeyValuePairs`. + const value_type &NewValue = KeyValuePairs.emplace_front( + std::move(Key), T(std::forward<Ts>(Args)...)); + Node &Node = findOrCreate(NewValue.first); + bool HasValue = Node.Value != typename ContainerType::iterator(); + if (!HasValue) + Node.Value = KeyValuePairs.begin(); + else + KeyValuePairs.pop_front(); + return {Node.Value, !HasValue}; + } + + /// + /// Finds all elements whose keys are prefixes of the given `Key`. + /// + /// This function returns an iterator range over all elements in the tree + /// whose keys are prefixes of the provided `Key`. For example, if the tree + /// contains "abcde", "abc", "abcdefgh", and `Key` is "abcde", this function + /// would return iterators to "abcde" and "abc". + /// + /// \param Key The key to search for prefixes of. + /// \return An `iterator_range` of `const_prefix_iterator`s, allowing + /// iteration over the found prefix elements. + /// \note The returned iterators reference the `Key` provided by the caller. + /// The caller must ensure that `Key` remains valid for the lifetime + /// of the iterators. + iterator_range<const_prefix_iterator> + find_prefixes(const key_type &Key) const { + return iterator_range<const_prefix_iterator>{ + const_prefix_iterator(&Root, KeyConstIteratorRangeType(Key)), + const_prefix_iterator{}}; + } +}; + +} // namespace llvm + +#endif // LLVM_ADT_RADIXTREE_H diff --git a/llvm/include/llvm/ADT/STLForwardCompat.h b/llvm/include/llvm/ADT/STLForwardCompat.h index 9c81981..e02694f 100644 --- a/llvm/include/llvm/ADT/STLForwardCompat.h +++ b/llvm/include/llvm/ADT/STLForwardCompat.h @@ -125,7 +125,7 @@ struct detector<std::void_t<Op<Args...>>, Op, Args...> { template <template <class...> class Op, class... Args> using is_detected = typename detail::detector<void, Op, Args...>::value_t; -struct identity_cxx20 // NOLINT(readability-identifier-naming) +struct identity // NOLINT(readability-identifier-naming) { using is_transparent = void; diff --git a/llvm/include/llvm/ADT/SparseMultiSet.h b/llvm/include/llvm/ADT/SparseMultiSet.h index 5e4e170..59de4cf 100644 --- a/llvm/include/llvm/ADT/SparseMultiSet.h +++ b/llvm/include/llvm/ADT/SparseMultiSet.h @@ -82,7 +82,7 @@ namespace llvm { /// @tparam SparseT An unsigned integer type. See above. /// template <typename ValueT, typename KeyT = unsigned, - typename KeyFunctorT = identity_cxx20, typename SparseT = uint8_t> + typename KeyFunctorT = identity, typename SparseT = uint8_t> class SparseMultiSet { static_assert(std::is_unsigned_v<SparseT>, "SparseT must be an unsigned integer type"); diff --git a/llvm/include/llvm/ADT/SparseSet.h b/llvm/include/llvm/ADT/SparseSet.h index 4697de09..41fd501 100644 --- a/llvm/include/llvm/ADT/SparseSet.h +++ b/llvm/include/llvm/ADT/SparseSet.h @@ -59,24 +59,20 @@ template <typename ValueT> struct SparseSetValTraits { } }; -/// SparseSetValFunctor - Helper class for selecting SparseSetValTraits. The -/// generic implementation handles ValueT classes which either provide -/// getSparseSetIndex() or specialize SparseSetValTraits<>. +/// SparseSetValFunctor - Helper class for getting a value's index. /// +/// In the generic case, this is done via SparseSetValTraits. When the value +/// type is the same as the key type, the KeyFunctor is used directly. template <typename KeyT, typename ValueT, typename KeyFunctorT> struct SparseSetValFunctor { unsigned operator()(const ValueT &Val) const { - return SparseSetValTraits<ValueT>::getValIndex(Val); + if constexpr (std::is_same_v<KeyT, ValueT>) + return KeyFunctorT()(Val); + else + return SparseSetValTraits<ValueT>::getValIndex(Val); } }; -/// SparseSetValFunctor<KeyT, KeyT> - Helper class for the common case of -/// identity key/value sets. -template <typename KeyT, typename KeyFunctorT> -struct SparseSetValFunctor<KeyT, KeyT, KeyFunctorT> { - unsigned operator()(const KeyT &Key) const { return KeyFunctorT()(Key); } -}; - /// SparseSet - Fast set implementation for objects that can be identified by /// small unsigned keys. /// @@ -117,7 +113,7 @@ struct SparseSetValFunctor<KeyT, KeyT, KeyFunctorT> { /// @tparam SparseT An unsigned integer type. See above. /// template <typename ValueT, typename KeyT = unsigned, - typename KeyFunctorT = identity_cxx20, typename SparseT = uint8_t> + typename KeyFunctorT = identity, typename SparseT = uint8_t> class SparseSet { static_assert(std::is_unsigned_v<SparseT>, "SparseT must be an unsigned integer type"); diff --git a/llvm/include/llvm/CodeGen/Passes.h b/llvm/include/llvm/CodeGen/Passes.h index 9fddd47..a852555 100644 --- a/llvm/include/llvm/CodeGen/Passes.h +++ b/llvm/include/llvm/CodeGen/Passes.h @@ -610,14 +610,6 @@ LLVM_ABI ModulePass *createCheckDebugMachineModulePass(); /// caller saved registers with stack slots. LLVM_ABI extern char &FixupStatepointCallerSavedID; -/// The pass transforms load/store <256 x i32> to AMX load/store intrinsics -/// or split the data to two <128 x i32>. -LLVM_ABI FunctionPass *createX86LowerAMXTypePass(); - -/// The pass transforms amx intrinsics to scalar operation if the function has -/// optnone attribute or it is O0. -LLVM_ABI FunctionPass *createX86LowerAMXIntrinsicsPass(); - /// When learning an eviction policy, extract score(reward) information, /// otherwise this does nothing LLVM_ABI FunctionPass *createRegAllocScoringPass(); diff --git a/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h b/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h index 26d7080..ab0d7e3 100644 --- a/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h +++ b/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h @@ -89,7 +89,7 @@ namespace llvm { /// allocated once for the pass. It can be cleared in constant time and reused /// without any frees. using RegUnit2SUnitsMap = - SparseMultiSet<PhysRegSUOper, unsigned, identity_cxx20, uint16_t>; + SparseMultiSet<PhysRegSUOper, unsigned, identity, uint16_t>; /// Track local uses of virtual registers. These uses are gathered by the DAG /// builder and may be consulted by the scheduler to avoid iterating an entire diff --git a/llvm/include/llvm/DebugInfo/CodeView/AppendingTypeTableBuilder.h b/llvm/include/llvm/DebugInfo/CodeView/AppendingTypeTableBuilder.h index 3a36863..5a46207 100644 --- a/llvm/include/llvm/DebugInfo/CodeView/AppendingTypeTableBuilder.h +++ b/llvm/include/llvm/DebugInfo/CodeView/AppendingTypeTableBuilder.h @@ -34,7 +34,7 @@ class LLVM_ABI AppendingTypeTableBuilder : public TypeCollection { public: explicit AppendingTypeTableBuilder(BumpPtrAllocator &Storage); - ~AppendingTypeTableBuilder(); + ~AppendingTypeTableBuilder() override; // TypeCollection overrides std::optional<TypeIndex> getFirst() override; diff --git a/llvm/include/llvm/DebugInfo/CodeView/GlobalTypeTableBuilder.h b/llvm/include/llvm/DebugInfo/CodeView/GlobalTypeTableBuilder.h index a587b3e..93e1c99 100644 --- a/llvm/include/llvm/DebugInfo/CodeView/GlobalTypeTableBuilder.h +++ b/llvm/include/llvm/DebugInfo/CodeView/GlobalTypeTableBuilder.h @@ -47,7 +47,7 @@ class LLVM_ABI GlobalTypeTableBuilder : public TypeCollection { public: explicit GlobalTypeTableBuilder(BumpPtrAllocator &Storage); - ~GlobalTypeTableBuilder(); + ~GlobalTypeTableBuilder() override; // TypeCollection overrides std::optional<TypeIndex> getFirst() override; diff --git a/llvm/include/llvm/DebugInfo/CodeView/MergingTypeTableBuilder.h b/llvm/include/llvm/DebugInfo/CodeView/MergingTypeTableBuilder.h index 7302784..b9b2669 100644 --- a/llvm/include/llvm/DebugInfo/CodeView/MergingTypeTableBuilder.h +++ b/llvm/include/llvm/DebugInfo/CodeView/MergingTypeTableBuilder.h @@ -43,7 +43,7 @@ class LLVM_ABI MergingTypeTableBuilder : public TypeCollection { public: explicit MergingTypeTableBuilder(BumpPtrAllocator &Storage); - ~MergingTypeTableBuilder(); + ~MergingTypeTableBuilder() override; // TypeCollection overrides std::optional<TypeIndex> getFirst() override; diff --git a/llvm/include/llvm/DebugInfo/GSYM/GsymContext.h b/llvm/include/llvm/DebugInfo/GSYM/GsymContext.h index 07d599c..e3e9b2b 100644 --- a/llvm/include/llvm/DebugInfo/GSYM/GsymContext.h +++ b/llvm/include/llvm/DebugInfo/GSYM/GsymContext.h @@ -30,7 +30,7 @@ class GsymReader; class GsymContext : public DIContext { public: GsymContext(std::unique_ptr<GsymReader> Reader); - ~GsymContext(); + ~GsymContext() override; GsymContext(GsymContext &) = delete; GsymContext &operator=(GsymContext &) = delete; diff --git a/llvm/include/llvm/DebugInfo/LogicalView/Core/LVElement.h b/llvm/include/llvm/DebugInfo/LogicalView/Core/LVElement.h index 0e7be45..34bace8 100644 --- a/llvm/include/llvm/DebugInfo/LogicalView/Core/LVElement.h +++ b/llvm/include/llvm/DebugInfo/LogicalView/Core/LVElement.h @@ -143,7 +143,7 @@ public: VirtualityCode(0) {} LVElement(const LVElement &) = delete; LVElement &operator=(const LVElement &) = delete; - virtual ~LVElement() = default; + ~LVElement() override = default; LVSubclassID getSubclassID() const { return SubclassID; } diff --git a/llvm/include/llvm/DebugInfo/LogicalView/Core/LVLine.h b/llvm/include/llvm/DebugInfo/LogicalView/Core/LVLine.h index 3618ce7..dd17f76 100644 --- a/llvm/include/llvm/DebugInfo/LogicalView/Core/LVLine.h +++ b/llvm/include/llvm/DebugInfo/LogicalView/Core/LVLine.h @@ -53,7 +53,7 @@ public: } LVLine(const LVLine &) = delete; LVLine &operator=(const LVLine &) = delete; - virtual ~LVLine() = default; + ~LVLine() override = default; static bool classof(const LVElement *Element) { return Element->getSubclassID() == LVSubclassID::LV_LINE; @@ -117,7 +117,7 @@ public: LVLineDebug() : LVLine() { setIsLineDebug(); } LVLineDebug(const LVLineDebug &) = delete; LVLineDebug &operator=(const LVLineDebug &) = delete; - ~LVLineDebug() = default; + ~LVLineDebug() override = default; // Additional line information. It includes attributes that describes // states in the machine instructions (basic block, end prologue, etc). @@ -142,7 +142,7 @@ public: LVLineAssembler() : LVLine() { setIsLineAssembler(); } LVLineAssembler(const LVLineAssembler &) = delete; LVLineAssembler &operator=(const LVLineAssembler &) = delete; - ~LVLineAssembler() = default; + ~LVLineAssembler() override = default; // Print blanks as the line number. std::string noLineAsString(bool ShowZero) const override { diff --git a/llvm/include/llvm/DebugInfo/LogicalView/Core/LVLocation.h b/llvm/include/llvm/DebugInfo/LogicalView/Core/LVLocation.h index 0718e33..090af54 100644 --- a/llvm/include/llvm/DebugInfo/LogicalView/Core/LVLocation.h +++ b/llvm/include/llvm/DebugInfo/LogicalView/Core/LVLocation.h @@ -100,7 +100,7 @@ public: LVLocation() : LVObject() { setIsLocation(); } LVLocation(const LVLocation &) = delete; LVLocation &operator=(const LVLocation &) = delete; - virtual ~LVLocation() = default; + ~LVLocation() override = default; PROPERTY(Property, IsAddressRange); PROPERTY(Property, IsBaseClassOffset); @@ -171,7 +171,7 @@ public: LVLocationSymbol() : LVLocation() {} LVLocationSymbol(const LVLocationSymbol &) = delete; LVLocationSymbol &operator=(const LVLocationSymbol &) = delete; - ~LVLocationSymbol() = default; + ~LVLocationSymbol() override = default; void addObject(LVAddress LowPC, LVAddress HighPC, LVUnsigned SectionOffset, uint64_t LocDescOffset) override; diff --git a/llvm/include/llvm/DebugInfo/LogicalView/Core/LVRange.h b/llvm/include/llvm/DebugInfo/LogicalView/Core/LVRange.h index b5c8333..4fa6a9a 100644 --- a/llvm/include/llvm/DebugInfo/LogicalView/Core/LVRange.h +++ b/llvm/include/llvm/DebugInfo/LogicalView/Core/LVRange.h @@ -62,7 +62,7 @@ public: LVRange() : LVObject(), RangesTree(Allocator) {} LVRange(const LVRange &) = delete; LVRange &operator=(const LVRange &) = delete; - ~LVRange() = default; + ~LVRange() override = default; void addEntry(LVScope *Scope, LVAddress LowerAddress, LVAddress UpperAddress); void addEntry(LVScope *Scope); diff --git a/llvm/include/llvm/DebugInfo/LogicalView/Core/LVScope.h b/llvm/include/llvm/DebugInfo/LogicalView/Core/LVScope.h index f4f3516..2e2619c 100644 --- a/llvm/include/llvm/DebugInfo/LogicalView/Core/LVScope.h +++ b/llvm/include/llvm/DebugInfo/LogicalView/Core/LVScope.h @@ -153,7 +153,7 @@ public: } LVScope(const LVScope &) = delete; LVScope &operator=(const LVScope &) = delete; - virtual ~LVScope() = default; + ~LVScope() override = default; static bool classof(const LVElement *Element) { return Element->getSubclassID() == LVSubclassID::LV_SCOPE; @@ -349,7 +349,7 @@ public: LVScopeAggregate() : LVScope() {} LVScopeAggregate(const LVScopeAggregate &) = delete; LVScopeAggregate &operator=(const LVScopeAggregate &) = delete; - ~LVScopeAggregate() = default; + ~LVScopeAggregate() override = default; // DW_AT_specification, DW_AT_abstract_origin. LVScope *getReference() const override { return Reference; } @@ -387,7 +387,7 @@ public: } LVScopeAlias(const LVScopeAlias &) = delete; LVScopeAlias &operator=(const LVScopeAlias &) = delete; - ~LVScopeAlias() = default; + ~LVScopeAlias() override = default; // Returns true if current scope is logically equal to the given 'Scope'. bool equals(const LVScope *Scope) const override; @@ -401,7 +401,7 @@ public: LVScopeArray() : LVScope() { setIsArray(); } LVScopeArray(const LVScopeArray &) = delete; LVScopeArray &operator=(const LVScopeArray &) = delete; - ~LVScopeArray() = default; + ~LVScopeArray() override = default; void resolveExtra() override; @@ -513,7 +513,7 @@ public: } LVScopeCompileUnit(const LVScopeCompileUnit &) = delete; LVScopeCompileUnit &operator=(const LVScopeCompileUnit &) = delete; - ~LVScopeCompileUnit() = default; + ~LVScopeCompileUnit() override = default; LVScope *getCompileUnitParent() const override { return static_cast<LVScope *>(const_cast<LVScopeCompileUnit *>(this)); @@ -643,7 +643,7 @@ public: LVScopeEnumeration() : LVScope() { setIsEnumeration(); } LVScopeEnumeration(const LVScopeEnumeration &) = delete; LVScopeEnumeration &operator=(const LVScopeEnumeration &) = delete; - ~LVScopeEnumeration() = default; + ~LVScopeEnumeration() override = default; // Returns true if current scope is logically equal to the given 'Scope'. bool equals(const LVScope *Scope) const override; @@ -658,7 +658,7 @@ public: LVScopeFormalPack() : LVScope() { setIsTemplatePack(); } LVScopeFormalPack(const LVScopeFormalPack &) = delete; LVScopeFormalPack &operator=(const LVScopeFormalPack &) = delete; - ~LVScopeFormalPack() = default; + ~LVScopeFormalPack() override = default; // Returns true if current scope is logically equal to the given 'Scope'. bool equals(const LVScope *Scope) const override; @@ -676,7 +676,7 @@ public: LVScopeFunction() : LVScope() {} LVScopeFunction(const LVScopeFunction &) = delete; LVScopeFunction &operator=(const LVScopeFunction &) = delete; - virtual ~LVScopeFunction() = default; + ~LVScopeFunction() override = default; // DW_AT_specification, DW_AT_abstract_origin. LVScope *getReference() const override { return Reference; } @@ -728,7 +728,7 @@ public: LVScopeFunctionInlined() : LVScopeFunction() { setIsInlinedFunction(); } LVScopeFunctionInlined(const LVScopeFunctionInlined &) = delete; LVScopeFunctionInlined &operator=(const LVScopeFunctionInlined &) = delete; - ~LVScopeFunctionInlined() = default; + ~LVScopeFunctionInlined() override = default; uint32_t getDiscriminator() const override { return Discriminator; } void setDiscriminator(uint32_t Value) override { @@ -767,7 +767,7 @@ public: LVScopeFunctionType() : LVScopeFunction() { setIsFunctionType(); } LVScopeFunctionType(const LVScopeFunctionType &) = delete; LVScopeFunctionType &operator=(const LVScopeFunctionType &) = delete; - ~LVScopeFunctionType() = default; + ~LVScopeFunctionType() override = default; void resolveExtra() override; }; @@ -781,7 +781,7 @@ public: } LVScopeModule(const LVScopeModule &) = delete; LVScopeModule &operator=(const LVScopeModule &) = delete; - ~LVScopeModule() = default; + ~LVScopeModule() override = default; // Returns true if current scope is logically equal to the given 'Scope'. bool equals(const LVScope *Scope) const override; @@ -797,7 +797,7 @@ public: LVScopeNamespace() : LVScope() { setIsNamespace(); } LVScopeNamespace(const LVScopeNamespace &) = delete; LVScopeNamespace &operator=(const LVScopeNamespace &) = delete; - ~LVScopeNamespace() = default; + ~LVScopeNamespace() override = default; // Access DW_AT_extension reference. LVScope *getReference() const override { return Reference; } @@ -827,7 +827,7 @@ public: LVScopeRoot() : LVScope() { setIsRoot(); } LVScopeRoot(const LVScopeRoot &) = delete; LVScopeRoot &operator=(const LVScopeRoot &) = delete; - ~LVScopeRoot() = default; + ~LVScopeRoot() override = default; StringRef getFileFormatName() const { return getStringPool().getString(FileFormatNameIndex); @@ -859,7 +859,7 @@ public: LVScopeTemplatePack() : LVScope() { setIsTemplatePack(); } LVScopeTemplatePack(const LVScopeTemplatePack &) = delete; LVScopeTemplatePack &operator=(const LVScopeTemplatePack &) = delete; - ~LVScopeTemplatePack() = default; + ~LVScopeTemplatePack() override = default; // Returns true if current scope is logically equal to the given 'Scope'. bool equals(const LVScope *Scope) const override; diff --git a/llvm/include/llvm/DebugInfo/LogicalView/Core/LVSymbol.h b/llvm/include/llvm/DebugInfo/LogicalView/Core/LVSymbol.h index ec9017e..c5314fc 100644 --- a/llvm/include/llvm/DebugInfo/LogicalView/Core/LVSymbol.h +++ b/llvm/include/llvm/DebugInfo/LogicalView/Core/LVSymbol.h @@ -74,7 +74,7 @@ public: } LVSymbol(const LVSymbol &) = delete; LVSymbol &operator=(const LVSymbol &) = delete; - ~LVSymbol() = default; + ~LVSymbol() override = default; static bool classof(const LVElement *Element) { return Element->getSubclassID() == LVSubclassID::LV_SYMBOL; diff --git a/llvm/include/llvm/DebugInfo/LogicalView/Core/LVType.h b/llvm/include/llvm/DebugInfo/LogicalView/Core/LVType.h index 59e6a92..af4abcf 100644 --- a/llvm/include/llvm/DebugInfo/LogicalView/Core/LVType.h +++ b/llvm/include/llvm/DebugInfo/LogicalView/Core/LVType.h @@ -67,7 +67,7 @@ public: LVType() : LVElement(LVSubclassID::LV_TYPE) { setIsType(); } LVType(const LVType &) = delete; LVType &operator=(const LVType &) = delete; - virtual ~LVType() = default; + ~LVType() override = default; static bool classof(const LVElement *Element) { return Element->getSubclassID() == LVSubclassID::LV_TYPE; @@ -157,7 +157,7 @@ public: } LVTypeDefinition(const LVTypeDefinition &) = delete; LVTypeDefinition &operator=(const LVTypeDefinition &) = delete; - ~LVTypeDefinition() = default; + ~LVTypeDefinition() override = default; // Return the underlying type for a type definition. LVElement *getUnderlyingType() override; @@ -183,7 +183,7 @@ public: } LVTypeEnumerator(const LVTypeEnumerator &) = delete; LVTypeEnumerator &operator=(const LVTypeEnumerator &) = delete; - ~LVTypeEnumerator() = default; + ~LVTypeEnumerator() override = default; // Process the values for a DW_TAG_enumerator. StringRef getValue() const override { @@ -206,7 +206,7 @@ public: LVTypeImport() : LVType() { setIncludeInPrint(); } LVTypeImport(const LVTypeImport &) = delete; LVTypeImport &operator=(const LVTypeImport &) = delete; - ~LVTypeImport() = default; + ~LVTypeImport() override = default; // Returns true if current type is logically equal to the given 'Type'. bool equals(const LVType *Type) const override; @@ -223,7 +223,7 @@ public: LVTypeParam(); LVTypeParam(const LVTypeParam &) = delete; LVTypeParam &operator=(const LVTypeParam &) = delete; - ~LVTypeParam() = default; + ~LVTypeParam() override = default; // Template parameter value. StringRef getValue() const override { @@ -256,7 +256,7 @@ public: } LVTypeSubrange(const LVTypeSubrange &) = delete; LVTypeSubrange &operator=(const LVTypeSubrange &) = delete; - ~LVTypeSubrange() = default; + ~LVTypeSubrange() override = default; int64_t getCount() const override { return getIsSubrangeCount() ? LowerBound : 0; diff --git a/llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h b/llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h index 2cf4a8e..cc8dda2 100644 --- a/llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h +++ b/llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h @@ -192,7 +192,7 @@ public: : LVReader(Filename, FileFormatName, W, BinaryType) {} LVBinaryReader(const LVBinaryReader &) = delete; LVBinaryReader &operator=(const LVBinaryReader &) = delete; - virtual ~LVBinaryReader() = default; + ~LVBinaryReader() override = default; void addInlineeLines(LVScope *Scope, LVLines &Lines) { CUInlineeLines.emplace(Scope, std::make_unique<LVLines>(std::move(Lines))); diff --git a/llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewReader.h b/llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewReader.h index 4dd7c96..9f6fd553 100644 --- a/llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewReader.h +++ b/llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewReader.h @@ -200,7 +200,7 @@ public: Input(&Pdb), ExePath(ExePath), LogicalVisitor(this, W, Input) {} LVCodeViewReader(const LVCodeViewReader &) = delete; LVCodeViewReader &operator=(const LVCodeViewReader &) = delete; - ~LVCodeViewReader() = default; + ~LVCodeViewReader() override = default; void getLinkageName(const llvm::object::coff_section *CoffSection, uint32_t RelocOffset, uint32_t Offset, diff --git a/llvm/include/llvm/DebugInfo/LogicalView/Readers/LVDWARFReader.h b/llvm/include/llvm/DebugInfo/LogicalView/Readers/LVDWARFReader.h index 2abc18b..1cf2914 100644 --- a/llvm/include/llvm/DebugInfo/LogicalView/Readers/LVDWARFReader.h +++ b/llvm/include/llvm/DebugInfo/LogicalView/Readers/LVDWARFReader.h @@ -123,7 +123,7 @@ public: Obj(Obj) {} LVDWARFReader(const LVDWARFReader &) = delete; LVDWARFReader &operator=(const LVDWARFReader &) = delete; - ~LVDWARFReader() = default; + ~LVDWARFReader() override = default; LVAddress getCUBaseAddress() const { return CUBaseAddress; } void setCUBaseAddress(LVAddress Address) { CUBaseAddress = Address; } diff --git a/llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeBuiltin.h b/llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeBuiltin.h index b21cd09..c0b3151 100644 --- a/llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeBuiltin.h +++ b/llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeBuiltin.h @@ -20,7 +20,7 @@ namespace pdb { class LLVM_ABI PDBSymbolTypeBuiltin : public PDBSymbol { DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::BuiltinType) public: - ~PDBSymbolTypeBuiltin(); + ~PDBSymbolTypeBuiltin() override; void dump(PDBSymDumper &Dumper) const override; FORWARD_SYMBOL_METHOD(getBuiltinType) diff --git a/llvm/include/llvm/ExecutionEngine/Orc/Core.h b/llvm/include/llvm/ExecutionEngine/Orc/Core.h index f05febf..24a0cb7 100644 --- a/llvm/include/llvm/ExecutionEngine/Orc/Core.h +++ b/llvm/include/llvm/ExecutionEngine/Orc/Core.h @@ -1768,7 +1768,7 @@ private: // FIXME: We should be able to derive FailedSymsForQuery from each query once // we fix how the detach operation works. struct EmitQueries { - JITDylib::AsynchronousSymbolQuerySet Updated; + JITDylib::AsynchronousSymbolQuerySet Completed; JITDylib::AsynchronousSymbolQuerySet Failed; DenseMap<AsynchronousSymbolQuery *, std::shared_ptr<SymbolDependenceMap>> FailedSymsForQuery; diff --git a/llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h b/llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h index 4a32113b..6adaa8a 100644 --- a/llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h +++ b/llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h @@ -34,7 +34,7 @@ using ExecutorAddrDiff = uint64_t; class ExecutorAddr { public: /// A wrap/unwrap function that leaves pointers unmodified. - using rawPtr = llvm::identity_cxx20; + using rawPtr = llvm::identity; #if __has_feature(ptrauth_calls) template <typename T> class PtrauthSignDefault { diff --git a/llvm/include/llvm/ExecutionEngine/Orc/Shared/SymbolFilter.h b/llvm/include/llvm/ExecutionEngine/Orc/Shared/SymbolFilter.h deleted file mode 100644 index 5170893..0000000 --- a/llvm/include/llvm/ExecutionEngine/Orc/Shared/SymbolFilter.h +++ /dev/null @@ -1,173 +0,0 @@ -//===- SymbolFilter.h - Utilities for Symbol Filtering ---------*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_EXECUTIONENGINE_ORC_SHARED_SYMBOLFILTER_H -#define LLVM_EXECUTIONENGINE_ORC_SHARED_SYMBOLFILTER_H - -#include "llvm/ExecutionEngine/Orc/Shared/SimplePackedSerialization.h" - -#include <cmath> -#include <type_traits> -#include <vector> - -namespace llvm { -namespace orc { - -namespace shared { -using SPSBloomFilter = - SPSTuple<bool, uint32_t, uint32_t, uint32_t, SPSSequence<uint64_t>>; -} - -class BloomFilter { -public: - using HashFunc = std::function<uint32_t(StringRef)>; - - BloomFilter() = default; - BloomFilter(BloomFilter &&) noexcept = default; - BloomFilter &operator=(BloomFilter &&) noexcept = default; - BloomFilter(const BloomFilter &) = delete; - BloomFilter &operator=(const BloomFilter &) = delete; - - BloomFilter(uint32_t SymbolCount, float FalsePositiveRate, HashFunc hashFn) - : HashFn(std::move(hashFn)) { - initialize(SymbolCount, FalsePositiveRate); - } - bool isInitialized() const { return Initialized; } - - void add(StringRef Sym) { - assert(Initialized); - addHash(HashFn(Sym)); - } - - bool mayContain(StringRef Sym) const { - return !isEmpty() && testHash(HashFn(Sym)); - } - - bool isEmpty() const { return SymbolCount == 0; } - -private: - friend class shared::SPSSerializationTraits<shared::SPSBloomFilter, - BloomFilter>; - static constexpr uint32_t BitsPerEntry = 64; - - bool Initialized = false; - uint32_t SymbolCount = 0; - uint32_t BloomSize = 0; - uint32_t BloomShift = 0; - std::vector<uint64_t> BloomTable; - HashFunc HashFn; - - void initialize(uint32_t SymCount, float FalsePositiveRate) { - assert(SymCount > 0); - SymbolCount = SymCount; - Initialized = true; - - float ln2 = std::log(2.0f); - float M = -1.0f * SymbolCount * std::log(FalsePositiveRate) / (ln2 * ln2); - BloomSize = static_cast<uint32_t>(std::ceil(M / BitsPerEntry)); - BloomShift = std::min(6u, log2ceil(SymbolCount)); - BloomTable.resize(BloomSize, 0); - } - - void addHash(uint32_t Hash) { - uint32_t Hash2 = Hash >> BloomShift; - uint32_t N = (Hash / BitsPerEntry) % BloomSize; - uint64_t Mask = - (1ULL << (Hash % BitsPerEntry)) | (1ULL << (Hash2 % BitsPerEntry)); - BloomTable[N] |= Mask; - } - - bool testHash(uint32_t Hash) const { - uint32_t Hash2 = Hash >> BloomShift; - uint32_t N = (Hash / BitsPerEntry) % BloomSize; - uint64_t Mask = - (1ULL << (Hash % BitsPerEntry)) | (1ULL << (Hash2 % BitsPerEntry)); - return (BloomTable[N] & Mask) == Mask; - } - - static constexpr uint32_t log2ceil(uint32_t V) { - return V <= 1 ? 0 : 32 - countl_zero(V - 1); - } -}; - -class BloomFilterBuilder { -public: - using HashFunc = BloomFilter::HashFunc; - - BloomFilterBuilder() = default; - - BloomFilterBuilder &setFalsePositiveRate(float Rate) { - assert(Rate > 0.0f && Rate < 1.0f); - FalsePositiveRate = Rate; - return *this; - } - - BloomFilterBuilder &setHashFunction(HashFunc Fn) { - HashFn = std::move(Fn); - return *this; - } - - BloomFilter build(ArrayRef<StringRef> Symbols) const { - assert(!Symbols.empty() && "Cannot build filter from empty symbol list."); - BloomFilter F(static_cast<uint32_t>(Symbols.size()), FalsePositiveRate, - HashFn); - for (const auto &Sym : Symbols) - F.add(Sym); - - return F; - } - -private: - float FalsePositiveRate = 0.02f; - HashFunc HashFn = [](StringRef S) -> uint32_t { - uint32_t H = 5381; - for (char C : S) - H = ((H << 5) + H) + static_cast<uint8_t>(C); // H * 33 + C - return H; - }; -}; - -namespace shared { - -template <> class SPSSerializationTraits<SPSBloomFilter, BloomFilter> { -public: - static size_t size(const BloomFilter &Filter) { - return SPSBloomFilter::AsArgList::size( - Filter.Initialized, Filter.SymbolCount, Filter.BloomSize, - Filter.BloomShift, Filter.BloomTable); - } - - static bool serialize(SPSOutputBuffer &OB, const BloomFilter &Filter) { - return SPSBloomFilter::AsArgList::serialize( - OB, Filter.Initialized, Filter.SymbolCount, Filter.BloomSize, - Filter.BloomShift, Filter.BloomTable); - } - - static bool deserialize(SPSInputBuffer &IB, BloomFilter &Filter) { - bool IsInitialized; - uint32_t SymbolCount = 0, BloomSize = 0, BloomShift = 0; - std::vector<uint64_t> BloomTable; - - if (!SPSBloomFilter::AsArgList::deserialize( - IB, IsInitialized, SymbolCount, BloomSize, BloomShift, BloomTable)) - return false; - - Filter.Initialized = IsInitialized; - Filter.SymbolCount = SymbolCount; - Filter.BloomSize = BloomSize; - Filter.BloomShift = BloomShift; - Filter.BloomTable = std::move(BloomTable); - - return true; - } -}; - -} // end namespace shared -} // end namespace orc -} // end namespace llvm -#endif // LLVM_EXECUTIONENGINE_ORC_SHARED_SYMBOLFILTER_H diff --git a/llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryResolver.h b/llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryResolver.h deleted file mode 100644 index 50d4f6d041..0000000 --- a/llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryResolver.h +++ /dev/null @@ -1,514 +0,0 @@ -//===- LibraryResolver.h - Automatic Library Symbol Resolution -*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This file provides support for automatically searching symbols across -// dynamic libraries that have not yet been loaded. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_LIBRARYRESOLVER_H -#define LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_LIBRARYRESOLVER_H - -#include "llvm/ADT/FunctionExtras.h" -#include "llvm/ExecutionEngine/Orc/Shared/SymbolFilter.h" -#include "llvm/ExecutionEngine/Orc/TargetProcess/LibraryScanner.h" -#include "llvm/Support/Path.h" - -#include <atomic> -#include <shared_mutex> -#include <unordered_map> - -namespace llvm { -namespace orc { - -/// Manages library metadata and state for symbol resolution. -/// -/// Tracks libraries by load state and kind (user/system), and stores -/// associated Bloom filters and hash maps to speed up symbol lookups. -/// Thread-safe for concurrent access. -class LibraryManager { -public: - enum class LibState : uint8_t { Unloaded = 0, Loaded = 1, Queried = 2 }; - - class LibraryInfo { - public: - LibraryInfo(const LibraryInfo &) = delete; - LibraryInfo &operator=(const LibraryInfo &) = delete; - - LibraryInfo(std::string FilePath, LibState S, PathType K, - std::optional<BloomFilter> Filter = std::nullopt) - : FilePath(std::move(FilePath)), S(S), K(K), Filter(std::move(Filter)) { - } - - StringRef getBasePath() const { return sys::path::parent_path(FilePath); } - StringRef getFileName() const { return sys::path::filename(FilePath); } - - std::string getFullPath() const { return FilePath; } - - bool setFilter(BloomFilter F) { - std::lock_guard<std::shared_mutex> Lock(Mtx); - if (Filter) - return false; - Filter.emplace(std::move(F)); - return true; - } - - bool ensureFilterBuilt(const BloomFilterBuilder &FB, - ArrayRef<StringRef> Symbols) { - std::lock_guard<std::shared_mutex> Lock(Mtx); - if (Filter) - return false; - Filter.emplace(FB.build(Symbols)); - return true; - } - - bool mayContain(StringRef Symbol) const { - assert(hasFilter()); - std::shared_lock<std::shared_mutex> Lock(Mtx); - return Filter->mayContain(Symbol); - } - - bool hasFilter() const { - std::shared_lock<std::shared_mutex> Lock(Mtx); - return Filter.has_value(); - } - - LibState getState() const { return S.load(); } - PathType getKind() const { return K; } - - void setState(LibState s) { S.store(s); } - - bool operator==(const LibraryInfo &other) const { - return FilePath == other.FilePath; - } - - private: - std::string FilePath; - std::atomic<LibState> S; - PathType K; - std::optional<BloomFilter> Filter; - mutable std::shared_mutex Mtx; - }; - - /// A read-only view of libraries filtered by state and kind. - /// - /// Lets you loop over only the libraries in a map that match a given State - /// and PathType. - class FilteredView { - public: - using Map = StringMap<std::shared_ptr<LibraryInfo>>; - using Iterator = typename Map::const_iterator; - class FilterIterator { - public: - FilterIterator(Iterator it_, Iterator end_, LibState S, PathType K) - : it(it_), end(end_), S(S), K(K) { - advance(); - } - - bool operator!=(const FilterIterator &other) const { - return it != other.it; - } - - const std::shared_ptr<LibraryInfo> &operator*() const { - return it->second; - } - - FilterIterator &operator++() { - ++it; - advance(); - return *this; - } - - private: - void advance() { - for (; it != end; ++it) - if (it->second->getState() == S && it->second->getKind() == K) - break; - } - Iterator it; - Iterator end; - LibState S; - PathType K; - }; - FilteredView(Iterator begin, Iterator end, LibState s, PathType k) - : mapBegin(begin), mapEnd(end), state(s), kind(k) {} - - FilterIterator begin() const { - return FilterIterator(mapBegin, mapEnd, state, kind); - } - - FilterIterator end() const { - return FilterIterator(mapEnd, mapEnd, state, kind); - } - - private: - Iterator mapBegin; - Iterator mapEnd; - LibState state; - PathType kind; - }; - -private: - StringMap<std::shared_ptr<LibraryInfo>> Libraries; - mutable std::shared_mutex Mtx; - -public: - using LibraryVisitor = std::function<bool(const LibraryInfo &)>; - - LibraryManager() = default; - ~LibraryManager() = default; - - bool addLibrary(std::string Path, PathType Kind, - std::optional<BloomFilter> Filter = std::nullopt) { - std::unique_lock<std::shared_mutex> Lock(Mtx); - if (Libraries.count(Path) > 0) - return false; - Libraries.insert({std::move(Path), - std::make_shared<LibraryInfo>(Path, LibState::Unloaded, - Kind, std::move(Filter))}); - return true; - } - - bool hasLibrary(StringRef Path) const { - std::shared_lock<std::shared_mutex> Lock(Mtx); - if (Libraries.count(Path) > 0) - return true; - return false; - } - - bool removeLibrary(StringRef Path) { - std::unique_lock<std::shared_mutex> Lock(Mtx); - auto I = Libraries.find(Path); - if (I == Libraries.end()) - return false; - Libraries.erase(I); - return true; - } - - void markLoaded(StringRef Path) { - std::unique_lock<std::shared_mutex> Lock(Mtx); - if (auto It = Libraries.find(Path); It != Libraries.end()) - It->second->setState(LibState::Loaded); - } - - void markQueried(StringRef Path) { - std::unique_lock<std::shared_mutex> Lock(Mtx); - if (auto It = Libraries.find(Path); It != Libraries.end()) - It->second->setState(LibState::Queried); - } - - std::shared_ptr<LibraryInfo> getLibrary(StringRef Path) { - std::shared_lock<std::shared_mutex> Lock(Mtx); - if (auto It = Libraries.find(Path); It != Libraries.end()) - return It->second; - return nullptr; - } - - FilteredView getView(LibState S, PathType K) const { - std::shared_lock<std::shared_mutex> Lock(Mtx); - return FilteredView(Libraries.begin(), Libraries.end(), S, K); - } - - void forEachLibrary(const LibraryVisitor &visitor) const { - std::unique_lock<std::shared_mutex> Lock(Mtx); - for (const auto &[_, entry] : Libraries) { - if (!visitor(*entry)) - break; - } - } - - bool isLoaded(StringRef Path) const { - std::unique_lock<std::shared_mutex> Lock(Mtx); - if (auto It = Libraries.find(Path.str()); It != Libraries.end()) - return It->second->getState() == LibState::Loaded; - return false; - } - - bool isQueried(StringRef Path) const { - std::unique_lock<std::shared_mutex> Lock(Mtx); - if (auto It = Libraries.find(Path.str()); It != Libraries.end()) - return It->second->getState() == LibState::Queried; - return false; - } - - void clear() { - std::unique_lock<std::shared_mutex> Lock(Mtx); - Libraries.clear(); - } -}; - -using LibraryInfo = LibraryManager::LibraryInfo; - -struct SearchPlanEntry { - LibraryManager::LibState State; // Loaded, Queried, Unloaded - PathType Type; // User, System -}; - -struct SearchPolicy { - std::vector<SearchPlanEntry> Plan; - - static SearchPolicy defaultPlan() { - return {{{LibraryManager::LibState::Loaded, PathType::User}, - {LibraryManager::LibState::Queried, PathType::User}, - {LibraryManager::LibState::Unloaded, PathType::User}, - {LibraryManager::LibState::Loaded, PathType::System}, - {LibraryManager::LibState::Queried, PathType::System}, - {LibraryManager::LibState::Unloaded, PathType::System}}}; - } -}; - -struct SymbolEnumeratorOptions { - enum Filter : uint32_t { - None = 0, - IgnoreUndefined = 1 << 0, - IgnoreWeak = 1 << 1, - IgnoreIndirect = 1 << 2, - IgnoreHidden = 1 << 3, - IgnoreNonGlobal = 1 << 4 - }; - - static SymbolEnumeratorOptions defaultOptions() { - return {Filter::IgnoreUndefined | Filter::IgnoreWeak | - Filter::IgnoreIndirect}; - } - uint32_t FilterFlags = Filter::None; -}; - -struct SearchConfig { - SearchPolicy Policy; - SymbolEnumeratorOptions Options; - - SearchConfig() - : Policy(SearchPolicy::defaultPlan()), // default plan - Options(SymbolEnumeratorOptions::defaultOptions()) {} -}; - -/// Scans libraries and resolves Symbols across user and system paths. -/// -/// Supports symbol enumeration and filtering via SymbolEnumerator, and tracks -/// symbol resolution results through SymbolQuery. Thread-safe and uses -/// LibraryScanHelper for efficient path resolution and caching. -class LibraryResolver { - friend class LibraryResolutionDriver; - -public: - class SymbolEnumerator { - public: - enum class EnumerateResult { Continue, Stop, Error }; - - using OnEachSymbolFn = std::function<EnumerateResult(StringRef Sym)>; - - static bool enumerateSymbols(StringRef Path, OnEachSymbolFn OnEach, - const SymbolEnumeratorOptions &Opts); - }; - - /// Tracks a set of symbols and the libraries where they are resolved. - /// - /// SymbolQuery is used to keep track of which symbols have been resolved - /// to which libraries. It supports concurrent read/write access using a - /// shared mutex, allowing multiple readers or a single writer at a time. - class SymbolQuery { - public: - /// Holds the result for a single symbol. - struct Result { - std::string Name; - std::string ResolvedLibPath; - }; - - private: - mutable std::shared_mutex Mtx; - StringMap<Result> Results; - std::atomic<size_t> ResolvedCount = 0; - - public: - explicit SymbolQuery(const std::vector<std::string> &Symbols) { - for (const auto &s : Symbols) { - if (!Results.contains(s)) - Results.insert({s, Result{s, ""}}); - } - } - - SmallVector<StringRef> getUnresolvedSymbols() const { - SmallVector<StringRef> Unresolved; - std::shared_lock<std::shared_mutex> Lock(Mtx); - for (const auto &[name, res] : Results) { - if (res.ResolvedLibPath.empty()) - Unresolved.push_back(name); - } - return Unresolved; - } - - void resolve(StringRef Sym, const std::string &LibPath) { - std::unique_lock<std::shared_mutex> Lock(Mtx); - auto It = Results.find(Sym); - if (It != Results.end() && It->second.ResolvedLibPath.empty()) { - It->second.ResolvedLibPath = LibPath; - ResolvedCount.fetch_add(1, std::memory_order_relaxed); - } - } - - bool allResolved() const { - return ResolvedCount.load(std::memory_order_relaxed) == Results.size(); - } - - bool hasUnresolved() const { - return ResolvedCount.load(std::memory_order_relaxed) < Results.size(); - } - - std::optional<StringRef> getResolvedLib(StringRef Sym) const { - std::shared_lock<std::shared_mutex> Lock(Mtx); - auto It = Results.find(Sym); - if (It != Results.end() && !It->second.ResolvedLibPath.empty()) - return StringRef(It->second.ResolvedLibPath); - return std::nullopt; - } - - bool isResolved(StringRef Sym) const { - std::shared_lock<std::shared_mutex> Lock(Mtx); - auto It = Results.find(Sym.str()); - return It != Results.end() && !It->second.ResolvedLibPath.empty(); - } - - std::vector<const Result *> getAllResults() const { - std::shared_lock<std::shared_mutex> Lock(Mtx); - std::vector<const Result *> Out; - Out.reserve(Results.size()); - for (const auto &[_, res] : Results) - Out.push_back(&res); - return Out; - } - }; - - struct Setup { - std::vector<std::string> BasePaths; - std::shared_ptr<LibraryPathCache> Cache; - std::shared_ptr<PathResolver> PResolver; - - size_t ScanBatchSize = 0; - - LibraryScanner::ShouldScanFn ShouldScanCall = [](StringRef) { - return true; - }; - - BloomFilterBuilder FilterBuilder = BloomFilterBuilder(); - - static Setup - create(std::vector<std::string> BasePaths, - std::shared_ptr<LibraryPathCache> existingCache = nullptr, - std::shared_ptr<PathResolver> existingResolver = nullptr, - LibraryScanner::ShouldScanFn customShouldScan = nullptr) { - Setup S; - S.BasePaths = std::move(BasePaths); - - S.Cache = - existingCache ? existingCache : std::make_shared<LibraryPathCache>(); - - S.PResolver = existingResolver ? existingResolver - : std::make_shared<PathResolver>(S.Cache); - - if (customShouldScan) - S.ShouldScanCall = std::move(customShouldScan); - - return S; - } - }; - - LibraryResolver() = delete; - explicit LibraryResolver(const Setup &S); - ~LibraryResolver() = default; - - using OnSearchComplete = unique_function<void(SymbolQuery &)>; - - void dump() { - int i = 0; - LibMgr.forEachLibrary([&](const LibraryInfo &Lib) -> bool { - dbgs() << ++i << ". Library Path : " << Lib.getFullPath() << " -> \n\t\t:" - << " ({Type : (" - << (Lib.getKind() == PathType::User ? "User" : "System") - << ") }, { State : " - << (Lib.getState() == LibraryManager::LibState::Loaded - ? "Loaded" - : "Unloaded") - << "})\n"; - return true; - }); - } - - void searchSymbolsInLibraries(std::vector<std::string> &SymList, - OnSearchComplete OnComplete, - const SearchConfig &Config = SearchConfig()); - -private: - bool scanLibrariesIfNeeded(PathType K, size_t BatchSize = 0); - void resolveSymbolsInLibrary(LibraryInfo &Lib, SymbolQuery &Q, - const SymbolEnumeratorOptions &Opts); - bool - symbolExistsInLibrary(const LibraryInfo &Lib, StringRef Sym, - std::vector<std::string> *MatchedSymbols = nullptr); - - bool symbolExistsInLibrary(const LibraryInfo &Lib, StringRef SymName, - std::vector<std::string> *AllSymbols, - const SymbolEnumeratorOptions &Opts); - - std::shared_ptr<LibraryPathCache> LibPathCache; - std::shared_ptr<PathResolver> LibPathResolver; - LibraryScanHelper ScanHelper; - BloomFilterBuilder FB; - LibraryManager LibMgr; - LibraryScanner::ShouldScanFn ShouldScanCall; - size_t scanBatchSize; -}; - -using SymbolEnumerator = LibraryResolver::SymbolEnumerator; -using SymbolQuery = LibraryResolver::SymbolQuery; -using EnumerateResult = SymbolEnumerator::EnumerateResult; - -class LibraryResolutionDriver { -public: - static std::unique_ptr<LibraryResolutionDriver> - create(const LibraryResolver::Setup &S); - - void addScanPath(const std::string &Path, PathType Kind); - bool markLibraryLoaded(StringRef Path); - bool markLibraryUnLoaded(StringRef Path); - bool isLibraryLoaded(StringRef Path) const { - return LR->LibMgr.isLoaded(Path); - } - - void resetAll() { - LR->LibMgr.clear(); - LR->ScanHelper.resetToScan(); - LR->LibPathCache->clear(); - } - - void scanAll(size_t BatchSize = 0) { - LR->scanLibrariesIfNeeded(PathType::User, BatchSize); - LR->scanLibrariesIfNeeded(PathType::System, BatchSize); - } - - void scan(PathType PK, size_t BatchSize = 0) { - LR->scanLibrariesIfNeeded(PK, BatchSize); - } - - void resolveSymbols(std::vector<std::string> Symbols, - LibraryResolver::OnSearchComplete OnCompletion, - const SearchConfig &Config = SearchConfig()); - - ~LibraryResolutionDriver() = default; - -private: - LibraryResolutionDriver(std::unique_ptr<LibraryResolver> L) - : LR(std::move(L)) {} - - std::unique_ptr<LibraryResolver> LR; -}; - -} // end namespace orc -} // end namespace llvm - -#endif // LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_LIBRARYRESOLVER_H diff --git a/llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryScanner.h b/llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryScanner.h deleted file mode 100644 index d1c2013..0000000 --- a/llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryScanner.h +++ /dev/null @@ -1,474 +0,0 @@ -//===- LibraryScanner.h - Scanner for Shared Libraries ---------*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This file provides functionality for scanning dynamic (shared) libraries. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_LIBRARYSCANNER_H -#define LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_LIBRARYSCANNER_H - -#include "llvm/ADT/FunctionExtras.h" -#include "llvm/ADT/SmallVector.h" -#include "llvm/ADT/StringRef.h" -#include "llvm/ADT/StringSet.h" -#include "llvm/Object/ObjectFile.h" -#include "llvm/Support/Allocator.h" -#include "llvm/Support/Error.h" -#include "llvm/Support/StringSaver.h" - -#include <atomic> -#include <mutex> -#include <queue> -#include <shared_mutex> -#include <string> -#include <unordered_map> -#include <unordered_set> - -namespace llvm { -namespace orc { - -class LibraryManager; - -class LibraryPathCache { - friend class PathResolver; - -public: - LibraryPathCache() = default; - - void clear(bool isRealPathCache = false) { - std::unique_lock<std::shared_mutex> lock(Mtx); - Seen.clear(); - if (isRealPathCache) { - RealPathCache.clear(); -#ifndef _WIN32 - ReadlinkCache.clear(); - LstatCache.clear(); -#endif - } - } - - void markSeen(const std::string &CanonPath) { - std::unique_lock<std::shared_mutex> lock(Mtx); - Seen.insert(CanonPath); - } - - bool hasSeen(StringRef CanonPath) const { - std::shared_lock<std::shared_mutex> lock(Mtx); - return Seen.contains(CanonPath); - } - - bool hasSeenOrMark(StringRef CanonPath) { - std::string s = CanonPath.str(); - { - std::shared_lock<std::shared_mutex> lock(Mtx); - if (Seen.contains(s)) - return true; - } - { - std::unique_lock<std::shared_mutex> lock(Mtx); - Seen.insert(s); - } - return false; - } - -private: - mutable std::shared_mutex Mtx; - - struct PathInfo { - std::string canonicalPath; - std::error_code ErrnoCode; - }; - - void insert_realpath(StringRef Path, const PathInfo &Info) { - std::unique_lock<std::shared_mutex> lock(Mtx); - RealPathCache.insert({Path, Info}); - } - - std::optional<PathInfo> read_realpath(StringRef Path) const { - std::shared_lock<std::shared_mutex> lock(Mtx); - auto It = RealPathCache.find(Path); - if (It != RealPathCache.end()) - return It->second; - - return std::nullopt; - } - - StringSet<> Seen; - StringMap<PathInfo> RealPathCache; - -#ifndef _WIN32 - StringMap<std::string> ReadlinkCache; - StringMap<mode_t> LstatCache; - - void insert_link(StringRef Path, const std::string &s) { - std::unique_lock<std::shared_mutex> lock(Mtx); - ReadlinkCache.insert({Path, s}); - } - - std::optional<std::string> read_link(StringRef Path) const { - std::shared_lock<std::shared_mutex> lock(Mtx); - auto It = ReadlinkCache.find(Path); - if (It != ReadlinkCache.end()) - return It->second; - - return std::nullopt; - } - - void insert_lstat(StringRef Path, mode_t m) { - std::unique_lock<std::shared_mutex> lock(Mtx); - LstatCache.insert({Path, m}); - } - - std::optional<mode_t> read_lstat(StringRef Path) const { - std::shared_lock<std::shared_mutex> lock(Mtx); - auto It = LstatCache.find(Path); - if (It != LstatCache.end()) - return It->second; - - return std::nullopt; - } - -#endif -}; - -/// Resolves file system paths with optional caching of results. -/// -/// Supports lstat, readlink, and realpath operations. Can resolve paths -/// relative to a base and handle symbolic links. Caches results to reduce -/// repeated system calls when enabled. -class PathResolver { -private: - std::shared_ptr<LibraryPathCache> LibPathCache; - -public: - PathResolver(std::shared_ptr<LibraryPathCache> cache) - : LibPathCache(std::move(cache)) {} - - std::optional<std::string> resolve(StringRef Path, std::error_code &ec) { - return realpathCached(Path, ec); - } -#ifndef _WIN32 - mode_t lstatCached(StringRef Path); - std::optional<std::string> readlinkCached(StringRef Path); -#endif - std::optional<std::string> realpathCached(StringRef Path, std::error_code &ec, - StringRef base = "", - bool baseIsResolved = false, - long symloopLevel = 40); -}; - -/// Performs placeholder substitution in dynamic library paths. -/// -/// Configures known placeholders (like @loader_path) and replaces them -/// in input paths with their resolved values. -class DylibSubstitutor { -public: - void configure(StringRef loaderPath); - - std::string substitute(StringRef input) const { - for (const auto &[ph, value] : Placeholders) { - if (input.starts_with_insensitive(ph)) - return (Twine(value) + input.drop_front(ph.size())).str(); - } - return input.str(); - } - -private: - StringMap<std::string> Placeholders; -}; - -/// Validates and normalizes dynamic library paths. -/// -/// Uses a `PathResolver` to resolve paths to their canonical form and -/// checks whether they point to valid shared libraries. -class DylibPathValidator { -public: - DylibPathValidator(PathResolver &PR) : LibPathResolver(PR) {} - - static bool isSharedLibrary(StringRef Path); - - std::optional<std::string> normalize(StringRef Path) const { - std::error_code ec; - auto real = LibPathResolver.resolve(Path, ec); - if (!real || ec) - return std::nullopt; - - return real; - } - - /// Validate the given path as a shared library. - std::optional<std::string> validate(StringRef Path) const { - auto realOpt = normalize(Path); - if (!realOpt) - return std::nullopt; - - if (!isSharedLibrary(*realOpt)) - return std::nullopt; - - return realOpt; - } - -private: - PathResolver &LibPathResolver; -}; - -enum class SearchPathType { - RPath, - UsrOrSys, - RunPath, -}; - -struct SearchPathConfig { - ArrayRef<StringRef> Paths; - SearchPathType type; -}; - -class SearchPathResolver { -public: - SearchPathResolver(const SearchPathConfig &Cfg, - StringRef PlaceholderPrefix = "") - : Kind(Cfg.type), PlaceholderPrefix(PlaceholderPrefix) { - for (auto &path : Cfg.Paths) - Paths.emplace_back(path.str()); - } - - std::optional<std::string> resolve(StringRef libStem, - const DylibSubstitutor &Subst, - DylibPathValidator &Validator) const; - SearchPathType searchPathType() const { return Kind; } - -private: - std::vector<std::string> Paths; - SearchPathType Kind; - std::string PlaceholderPrefix; -}; - -class DylibResolverImpl { -public: - DylibResolverImpl(DylibSubstitutor Substitutor, DylibPathValidator &Validator, - std::vector<SearchPathResolver> Resolvers) - : Substitutor(std::move(Substitutor)), Validator(Validator), - Resolvers(std::move(Resolvers)) {} - - std::optional<std::string> resolve(StringRef Stem, - bool VariateLibStem = false) const; - -private: - std::optional<std::string> tryWithExtensions(StringRef libstem) const; - - DylibSubstitutor Substitutor; - DylibPathValidator &Validator; - std::vector<SearchPathResolver> Resolvers; -}; - -class DylibResolver { -public: - DylibResolver(DylibPathValidator &Validator) : Validator(Validator) {} - - void configure(StringRef loaderPath, - ArrayRef<SearchPathConfig> SearchPathCfg) { - DylibSubstitutor Substitutor; - Substitutor.configure(loaderPath); - - std::vector<SearchPathResolver> Resolvers; - for (const auto &cfg : SearchPathCfg) { - Resolvers.emplace_back(cfg, - cfg.type == SearchPathType::RPath ? "@rpath" : ""); - } - - impl_ = std::make_unique<DylibResolverImpl>( - std::move(Substitutor), Validator, std::move(Resolvers)); - } - - std::optional<std::string> resolve(StringRef libStem, - bool VariateLibStem = false) const { - if (!impl_) - return std::nullopt; - return impl_->resolve(libStem, VariateLibStem); - } - - static std::string resolvelinkerFlag(StringRef libStem, - StringRef loaderPath) { - DylibSubstitutor Substitutor; - Substitutor.configure(loaderPath); - return Substitutor.substitute(libStem); - } - -private: - DylibPathValidator &Validator; - std::unique_ptr<DylibResolverImpl> impl_; -}; - -enum class PathType : uint8_t { User, System, Unknown }; - -enum class ScanState : uint8_t { NotScanned, Scanning, Scanned }; - -struct LibrarySearchPath { - std::string BasePath; // Canonical base directory path - PathType Kind; // User or System - std::atomic<ScanState> State; - - LibrarySearchPath(std::string Base, PathType K) - : BasePath(std::move(Base)), Kind(K), State(ScanState::NotScanned) {} -}; - -/// Scans and tracks libraries for symbol resolution. -/// -/// Maintains a list of library paths to scan, caches scanned units, -/// and resolves paths canonically for consistent tracking. -class LibraryScanHelper { -public: - explicit LibraryScanHelper(const std::vector<std::string> &SPaths, - std::shared_ptr<LibraryPathCache> LibPathCache, - std::shared_ptr<PathResolver> LibPathResolver) - : LibPathCache(std::move(LibPathCache)), - LibPathResolver(std::move(LibPathResolver)) { - DEBUG_WITH_TYPE( - "orc", dbgs() << "LibraryScanHelper::LibraryScanHelper: base paths : " - << SPaths.size() << "\n";); - for (const auto &p : SPaths) - addBasePath(p); - } - - void - addBasePath(const std::string &P, - PathType Kind = - PathType::Unknown); // Add a canonical directory for scanning - std::vector<std::shared_ptr<LibrarySearchPath>> - getNextBatch(PathType Kind, size_t batchSize); - - bool leftToScan(PathType K) const; - void resetToScan(); - - bool isTrackedBasePath(StringRef P) const; - std::vector<std::shared_ptr<LibrarySearchPath>> getAllUnits() const; - - SmallVector<StringRef> getSearchPaths() const { - SmallVector<StringRef> SearchPaths; - for (const auto &[_, SP] : LibSearchPaths) - SearchPaths.push_back(SP->BasePath); - return SearchPaths; - } - - PathResolver &getPathResolver() const { return *LibPathResolver; } - - LibraryPathCache &getCache() const { return *LibPathCache; } - - bool hasSeenOrMark(StringRef P) const { - return LibPathCache->hasSeenOrMark(P); - } - - std::optional<std::string> resolve(StringRef P, std::error_code &ec) const { - return LibPathResolver->resolve(P.str(), ec); - } - -private: - std::string resolveCanonical(StringRef P, std::error_code &ec) const; - PathType classifyKind(StringRef P) const; - - mutable std::shared_mutex Mtx; - std::shared_ptr<LibraryPathCache> LibPathCache; - std::shared_ptr<PathResolver> LibPathResolver; - - StringMap<std::shared_ptr<LibrarySearchPath>> - LibSearchPaths; // key: canonical path - std::deque<StringRef> UnscannedUsr; - std::deque<StringRef> UnscannedSys; -}; - -/// Loads an object file and provides access to it. -/// -/// Owns the underlying `ObjectFile` and ensures it is valid. -/// Any errors encountered during construction are stored and -/// returned when attempting to access the file. -class ObjectFileLoader { -public: - /// Construct an object file loader from the given path. - explicit ObjectFileLoader(StringRef Path) { - auto ObjOrErr = loadObjectFileWithOwnership(Path); - if (ObjOrErr) - Obj = std::move(*ObjOrErr); - else { - consumeError(std::move(Err)); - Err = ObjOrErr.takeError(); - } - } - - ObjectFileLoader(const ObjectFileLoader &) = delete; - ObjectFileLoader &operator=(const ObjectFileLoader &) = delete; - - ObjectFileLoader(ObjectFileLoader &&) = default; - ObjectFileLoader &operator=(ObjectFileLoader &&) = default; - - /// Get the loaded object file, or return an error if loading failed. - Expected<object::ObjectFile &> getObjectFile() { - if (Err) - return std::move(Err); - return *Obj.getBinary(); - } - - static bool isArchitectureCompatible(const object::ObjectFile &Obj); - -private: - object::OwningBinary<object::ObjectFile> Obj; - Error Err = Error::success(); - - static Expected<object::OwningBinary<object::ObjectFile>> - loadObjectFileWithOwnership(StringRef FilePath); -}; - -/// Scans libraries, resolves dependencies, and registers them. -class LibraryScanner { -public: - using ShouldScanFn = std::function<bool(StringRef)>; - - LibraryScanner( - LibraryScanHelper &H, LibraryManager &LibMgr, - ShouldScanFn ShouldScanCall = [](StringRef path) { return true; }) - : ScanHelper(H), LibMgr(LibMgr), - ShouldScanCall(std::move(ShouldScanCall)) {} - - void scanNext(PathType Kind, size_t batchSize = 1); - - /// Dependency info for a library. - struct LibraryDepsInfo { - llvm::BumpPtrAllocator Alloc; - llvm::StringSaver Saver{Alloc}; - - SmallVector<StringRef, 2> rpath; - SmallVector<StringRef, 2> runPath; - SmallVector<StringRef, 4> deps; - bool isPIE = false; - - void addRPath(StringRef s) { rpath.push_back(Saver.save(s)); } - - void addRunPath(StringRef s) { runPath.push_back(Saver.save(s)); } - - void addDep(StringRef s) { deps.push_back(Saver.save(s)); } - }; - -private: - LibraryScanHelper &ScanHelper; - LibraryManager &LibMgr; - ShouldScanFn ShouldScanCall; - - std::optional<std::string> shouldScan(StringRef FilePath); - Expected<LibraryDepsInfo> extractDeps(StringRef FilePath); - - void handleLibrary(StringRef P, PathType K, int level = 1); - - void scanBaseDir(std::shared_ptr<LibrarySearchPath> U); -}; - -using LibraryDepsInfo = LibraryScanner::LibraryDepsInfo; - -} // end namespace orc -} // end namespace llvm - -#endif // LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_LIBRARYSCANNER_H diff --git a/llvm/include/llvm/Support/SpecialCaseList.h b/llvm/include/llvm/Support/SpecialCaseList.h index ead7655..a235975 100644 --- a/llvm/include/llvm/Support/SpecialCaseList.h +++ b/llvm/include/llvm/Support/SpecialCaseList.h @@ -13,7 +13,10 @@ #define LLVM_SUPPORT_SPECIALCASELIST_H #include "llvm/ADT/ArrayRef.h" +#include "llvm/ADT/RadixTree.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringMap.h" +#include "llvm/ADT/iterator_range.h" #include "llvm/Support/Allocator.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/GlobPattern.h" @@ -162,6 +165,10 @@ private: }; std::vector<GlobMatcher::Glob> Globs; + + RadixTree<iterator_range<StringRef::const_iterator>, + SmallVector<const GlobMatcher::Glob *, 1>> + PrefixToGlob; }; /// Represents a set of patterns and their line numbers diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp index 9e78ec9..8ea1326 100644 --- a/llvm/lib/CodeGen/CodeGenPrepare.cpp +++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp @@ -4030,7 +4030,6 @@ bool PhiNodeSetIterator::operator!=(const PhiNodeSetIterator &RHS) const { /// if it is simplified. class SimplificationTracker { DenseMap<Value *, Value *> Storage; - const SimplifyQuery &SQ; // Tracks newly created Phi nodes. The elements are iterated by insertion // order. PhiNodeSet AllPhiNodes; @@ -4038,8 +4037,6 @@ class SimplificationTracker { SmallPtrSet<SelectInst *, 32> AllSelectNodes; public: - SimplificationTracker(const SimplifyQuery &sq) : SQ(sq) {} - Value *Get(Value *V) { do { auto SV = Storage.find(V); @@ -4049,30 +4046,6 @@ public: } while (true); } - Value *Simplify(Value *Val) { - SmallVector<Value *, 32> WorkList; - SmallPtrSet<Value *, 32> Visited; - WorkList.push_back(Val); - while (!WorkList.empty()) { - auto *P = WorkList.pop_back_val(); - if (!Visited.insert(P).second) - continue; - if (auto *PI = dyn_cast<Instruction>(P)) - if (Value *V = simplifyInstruction(cast<Instruction>(PI), SQ)) { - for (auto *U : PI->users()) - WorkList.push_back(cast<Value>(U)); - Put(PI, V); - PI->replaceAllUsesWith(V); - if (auto *PHI = dyn_cast<PHINode>(PI)) - AllPhiNodes.erase(PHI); - if (auto *Select = dyn_cast<SelectInst>(PI)) - AllSelectNodes.erase(Select); - PI->eraseFromParent(); - } - } - return Get(Val); - } - void Put(Value *From, Value *To) { Storage.insert({From, To}); } void ReplacePhi(PHINode *From, PHINode *To) { @@ -4133,8 +4106,7 @@ private: /// Common Type for all different fields in addressing modes. Type *CommonType = nullptr; - /// SimplifyQuery for simplifyInstruction utility. - const SimplifyQuery &SQ; + const DataLayout &DL; /// Original Address. Value *Original; @@ -4143,8 +4115,8 @@ private: Value *CommonValue = nullptr; public: - AddressingModeCombiner(const SimplifyQuery &_SQ, Value *OriginalValue) - : SQ(_SQ), Original(OriginalValue) {} + AddressingModeCombiner(const DataLayout &DL, Value *OriginalValue) + : DL(DL), Original(OriginalValue) {} ~AddressingModeCombiner() { eraseCommonValueIfDead(); } @@ -4256,7 +4228,7 @@ private: // Keep track of keys where the value is null. We will need to replace it // with constant null when we know the common type. SmallVector<Value *, 2> NullValue; - Type *IntPtrTy = SQ.DL.getIntPtrType(AddrModes[0].OriginalValue->getType()); + Type *IntPtrTy = DL.getIntPtrType(AddrModes[0].OriginalValue->getType()); for (auto &AM : AddrModes) { Value *DV = AM.GetFieldAsValue(DifferentField, IntPtrTy); if (DV) { @@ -4306,7 +4278,7 @@ private: // simplification is possible only if original phi/selects were not // simplified yet. // Using this mapping we can find the current value in AddrToBase. - SimplificationTracker ST(SQ); + SimplificationTracker ST; // First step, DFS to create PHI nodes for all intermediate blocks. // Also fill traverse order for the second step. @@ -4465,7 +4437,6 @@ private: PHI->addIncoming(ST.Get(Map[PV]), B); } } - Map[Current] = ST.Simplify(V); } } @@ -5856,8 +5827,7 @@ bool CodeGenPrepare::optimizeMemoryInst(Instruction *MemoryInst, Value *Addr, // the graph are compatible. bool PhiOrSelectSeen = false; SmallVector<Instruction *, 16> AddrModeInsts; - const SimplifyQuery SQ(*DL, TLInfo); - AddressingModeCombiner AddrModes(SQ, Addr); + AddressingModeCombiner AddrModes(*DL, Addr); TypePromotionTransaction TPT(RemovedInsts); TypePromotionTransaction::ConstRestorationPt LastKnownGood = TPT.getRestorationPoint(); diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp index 72b364c..697b779 100644 --- a/llvm/lib/CodeGen/RegAllocFast.cpp +++ b/llvm/lib/CodeGen/RegAllocFast.cpp @@ -211,7 +211,7 @@ private: unsigned getSparseSetIndex() const { return VirtReg.virtRegIndex(); } }; - using LiveRegMap = SparseSet<LiveReg, unsigned, identity_cxx20, uint16_t>; + using LiveRegMap = SparseSet<LiveReg, unsigned, identity, uint16_t>; /// This map contains entries for each virtual register that is currently /// available in a physical register. LiveRegMap LiveVirtRegs; diff --git a/llvm/lib/ExecutionEngine/Orc/Core.cpp b/llvm/lib/ExecutionEngine/Orc/Core.cpp index 8d413a3..d029ac5 100644 --- a/llvm/lib/ExecutionEngine/Orc/Core.cpp +++ b/llvm/lib/ExecutionEngine/Orc/Core.cpp @@ -2901,13 +2901,23 @@ ExecutionSession::IL_emit(MaterializationResponsibility &MR, for (auto &SN : ER.Ready) IL_collectQueries( - EQ.Updated, SN->defs(), + EQ.Completed, SN->defs(), [](JITDylib::SymbolTableEntry &E) { E.setState(SymbolState::Ready); }, [](AsynchronousSymbolQuery &Q, JITDylib &JD, NonOwningSymbolStringPtr Name, JITDylib::SymbolTableEntry &E) { Q.notifySymbolMetRequiredState(SymbolStringPtr(Name), E.getSymbol()); }); + // std::erase_if is not available in C++17, and llvm::erase_if does not work + // here. + for (auto it = EQ.Completed.begin(), end = EQ.Completed.end(); it != end;) { + if ((*it)->isComplete()) { + ++it; + } else { + it = EQ.Completed.erase(it); + } + } + #ifdef EXPENSIVE_CHECKS verifySessionState("exiting ExecutionSession::IL_emit"); #endif @@ -3043,9 +3053,8 @@ Error ExecutionSession::OL_notifyEmitted( } } - for (auto &UQ : EmitQueries->Updated) - if (UQ->isComplete()) - UQ->handleComplete(*this); + for (auto &UQ : EmitQueries->Completed) + UQ->handleComplete(*this); // If there are any bad dependencies then return an error. if (!BadDeps.empty()) { diff --git a/llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt b/llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt index ca8192b..9275586 100644 --- a/llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt +++ b/llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt @@ -16,11 +16,9 @@ add_llvm_component_library(LLVMOrcTargetProcess ExecutorSharedMemoryMapperService.cpp DefaultHostBootstrapValues.cpp ExecutorResolver.cpp - LibraryResolver.cpp JITLoaderGDB.cpp JITLoaderPerf.cpp JITLoaderVTune.cpp - LibraryScanner.cpp OrcRTBootstrap.cpp RegisterEHFrames.cpp SimpleExecutorDylibManager.cpp @@ -38,8 +36,6 @@ add_llvm_component_library(LLVMOrcTargetProcess LINK_COMPONENTS ${intel_jit_profiling} - BinaryFormat - Object OrcShared Support TargetParser diff --git a/llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryResolver.cpp b/llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryResolver.cpp deleted file mode 100644 index 9d25b74..0000000 --- a/llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryResolver.cpp +++ /dev/null @@ -1,369 +0,0 @@ -//===- LibraryResolver.cpp - Library Resolution of Unresolved Symbols ---===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// Library resolution impl for unresolved symbols -// -//===----------------------------------------------------------------------===// - -#include "llvm/ExecutionEngine/Orc/TargetProcess/LibraryResolver.h" -#include "llvm/ExecutionEngine/Orc/TargetProcess/LibraryScanner.h" - -#include "llvm/ADT/StringSet.h" - -#include "llvm/BinaryFormat/MachO.h" -#include "llvm/Object/COFF.h" -#include "llvm/Object/ELF.h" -#include "llvm/Object/ELFObjectFile.h" -#include "llvm/Object/MachO.h" -#include "llvm/Object/ObjectFile.h" -#include "llvm/Support/Error.h" - -#include <mutex> -#include <thread> - -#define DEBUG_TYPE "orc-resolver" - -namespace llvm::orc { - -LibraryResolver::LibraryResolver(const LibraryResolver::Setup &S) - : LibPathCache(S.Cache ? S.Cache : std::make_shared<LibraryPathCache>()), - LibPathResolver(S.PResolver - ? S.PResolver - : std::make_shared<PathResolver>(LibPathCache)), - ScanHelper(S.BasePaths, LibPathCache, LibPathResolver), - FB(S.FilterBuilder), LibMgr(), - ShouldScanCall(S.ShouldScanCall ? S.ShouldScanCall - : [](StringRef) -> bool { return true; }), - scanBatchSize(S.ScanBatchSize) { - - if (ScanHelper.getAllUnits().empty()) { - LLVM_DEBUG(dbgs() << "Warning: No base paths provided for scanning.\n"); - } -} - -std::unique_ptr<LibraryResolutionDriver> -LibraryResolutionDriver::create(const LibraryResolver::Setup &S) { - auto LR = std::make_unique<LibraryResolver>(S); - return std::unique_ptr<LibraryResolutionDriver>( - new LibraryResolutionDriver(std::move(LR))); -} - -void LibraryResolutionDriver::addScanPath(const std::string &Path, PathType K) { - LR->ScanHelper.addBasePath(Path, K); -} - -bool LibraryResolutionDriver::markLibraryLoaded(StringRef Path) { - auto Lib = LR->LibMgr.getLibrary(Path); - if (!Lib) - return false; - - Lib->setState(LibraryManager::LibState::Loaded); - - return true; -} - -bool LibraryResolutionDriver::markLibraryUnLoaded(StringRef Path) { - auto Lib = LR->LibMgr.getLibrary(Path); - if (!Lib) - return false; - - Lib->setState(LibraryManager::LibState::Unloaded); - - return true; -} - -void LibraryResolutionDriver::resolveSymbols( - std::vector<std::string> Syms, - LibraryResolver::OnSearchComplete OnCompletion, - const SearchConfig &Config) { - LR->searchSymbolsInLibraries(Syms, std::move(OnCompletion), Config); -} - -static bool shouldIgnoreSymbol(const object::SymbolRef &Sym, - uint32_t IgnoreFlags) { - Expected<uint32_t> FlagsOrErr = Sym.getFlags(); - if (!FlagsOrErr) { - consumeError(FlagsOrErr.takeError()); - return true; - } - - uint32_t Flags = *FlagsOrErr; - - using Filter = SymbolEnumeratorOptions; - if ((IgnoreFlags & Filter::IgnoreUndefined) && - (Flags & object::SymbolRef::SF_Undefined)) - return true; - if ((IgnoreFlags & Filter::IgnoreIndirect) && - (Flags & object::SymbolRef::SF_Indirect)) - return true; - if ((IgnoreFlags & Filter::IgnoreWeak) && - (Flags & object::SymbolRef::SF_Weak)) - return true; - - return false; -} - -bool SymbolEnumerator::enumerateSymbols(StringRef Path, OnEachSymbolFn OnEach, - const SymbolEnumeratorOptions &Opts) { - if (Path.empty()) - return false; - - ObjectFileLoader ObjLoader(Path); - - auto ObjOrErr = ObjLoader.getObjectFile(); - if (!ObjOrErr) { - std::string ErrMsg; - handleAllErrors(ObjOrErr.takeError(), - [&](const ErrorInfoBase &EIB) { ErrMsg = EIB.message(); }); - LLVM_DEBUG(dbgs() << "Failed loading object file: " << Path - << "\nError: " << ErrMsg << "\n"); - return false; - } - - object::ObjectFile *Obj = &ObjOrErr.get(); - - auto processSymbolRange = - [&](object::ObjectFile::symbol_iterator_range Range) -> EnumerateResult { - for (const auto &Sym : Range) { - if (shouldIgnoreSymbol(Sym, Opts.FilterFlags)) - continue; - - auto NameOrErr = Sym.getName(); - if (!NameOrErr) { - consumeError(NameOrErr.takeError()); - continue; - } - - StringRef Name = *NameOrErr; - if (Name.empty()) - continue; - - EnumerateResult Res = OnEach(Name); - if (Res != EnumerateResult::Continue) - return Res; - } - return EnumerateResult::Continue; - }; - - EnumerateResult Res = processSymbolRange(Obj->symbols()); - if (Res != EnumerateResult::Continue) - return Res == EnumerateResult::Stop; - - if (Obj->isELF()) { - const auto *ElfObj = cast<object::ELFObjectFileBase>(Obj); - Res = processSymbolRange(ElfObj->getDynamicSymbolIterators()); - if (Res != EnumerateResult::Continue) - return Res == EnumerateResult::Stop; - } else if (Obj->isCOFF()) { - const auto *CoffObj = cast<object::COFFObjectFile>(Obj); - for (auto I = CoffObj->export_directory_begin(), - E = CoffObj->export_directory_end(); - I != E; ++I) { - StringRef Name; - if (I->getSymbolName(Name)) - continue; - if (Name.empty()) - continue; - - if (OnEach(Name) != EnumerateResult::Continue) - return false; - } - } else if (Obj->isMachO()) { - } - - return true; -} - -class SymbolSearchContext { -public: - SymbolSearchContext(SymbolQuery &Q) : Q(Q) {} - - bool hasSearched(LibraryInfo *Lib) const { return Searched.count(Lib); } - - void markSearched(LibraryInfo *Lib) { Searched.insert(Lib); } - - inline bool allResolved() const { return Q.allResolved(); } - - SymbolQuery &query() { return Q; } - -private: - SymbolQuery &Q; - DenseSet<LibraryInfo *> Searched; -}; - -void LibraryResolver::resolveSymbolsInLibrary( - LibraryInfo &Lib, SymbolQuery &UnresolvedSymbols, - const SymbolEnumeratorOptions &Opts) { - LLVM_DEBUG(dbgs() << "Checking unresolved symbols " - << " in library : " << Lib.getFileName() << "\n";); - StringSet<> DiscoveredSymbols; - - if (!UnresolvedSymbols.hasUnresolved()) { - LLVM_DEBUG(dbgs() << "Skipping library: " << Lib.getFullPath() - << " — unresolved symbols exist.\n";); - return; - } - - bool HasEnumerated = false; - auto enumerateSymbolsIfNeeded = [&]() { - if (HasEnumerated) - return; - - HasEnumerated = true; - - LLVM_DEBUG(dbgs() << "Enumerating symbols in library: " << Lib.getFullPath() - << "\n";); - SymbolEnumerator::enumerateSymbols( - Lib.getFullPath(), - [&](StringRef sym) { - DiscoveredSymbols.insert(sym); - return EnumerateResult::Continue; - }, - Opts); - - if (DiscoveredSymbols.empty()) { - LLVM_DEBUG(dbgs() << " No symbols and remove library : " - << Lib.getFullPath() << "\n";); - LibMgr.removeLibrary(Lib.getFullPath()); - return; - } - }; - - if (!Lib.hasFilter()) { - LLVM_DEBUG(dbgs() << "Building filter for library: " << Lib.getFullPath() - << "\n";); - enumerateSymbolsIfNeeded(); - SmallVector<StringRef> SymbolVec; - SymbolVec.reserve(DiscoveredSymbols.size()); - for (const auto &KV : DiscoveredSymbols) - SymbolVec.push_back(KV.first()); - - Lib.ensureFilterBuilt(FB, SymbolVec); - LLVM_DEBUG({ - dbgs() << "DiscoveredSymbols : " << DiscoveredSymbols.size() << "\n"; - for (const auto &KV : DiscoveredSymbols) - dbgs() << "DiscoveredSymbols : " << KV.first() << "\n"; - }); - } - - const auto &Unresolved = UnresolvedSymbols.getUnresolvedSymbols(); - bool HadAnySym = false; - LLVM_DEBUG(dbgs() << "Total unresolved symbols : " << Unresolved.size() - << "\n";); - for (const auto &Sym : Unresolved) { - if (Lib.mayContain(Sym)) { - LLVM_DEBUG(dbgs() << "Checking symbol '" << Sym - << "' in library: " << Lib.getFullPath() << "\n";); - enumerateSymbolsIfNeeded(); - if (DiscoveredSymbols.count(Sym) > 0) { - LLVM_DEBUG(dbgs() << " Resolved symbol: " << Sym - << " in library: " << Lib.getFullPath() << "\n";); - UnresolvedSymbols.resolve(Sym, Lib.getFullPath()); - HadAnySym = true; - } - } - } - - using LibraryState = LibraryManager::LibState; - if (HadAnySym && Lib.getState() != LibraryState::Loaded) - Lib.setState(LibraryState::Queried); -} - -void LibraryResolver::searchSymbolsInLibraries( - std::vector<std::string> &SymbolList, OnSearchComplete OnComplete, - const SearchConfig &Config) { - SymbolQuery Q(SymbolList); - - using LibraryState = LibraryManager::LibState; - using LibraryType = PathType; - auto tryResolveFrom = [&](LibraryState S, LibraryType K) { - LLVM_DEBUG(dbgs() << "Trying resolve from state=" << static_cast<int>(S) - << " type=" << static_cast<int>(K) << "\n";); - - SymbolSearchContext Ctx(Q); - while (!Ctx.allResolved()) { - - for (auto &Lib : LibMgr.getView(S, K)) { - if (Ctx.hasSearched(Lib.get())) - continue; - - // can use Async here? - resolveSymbolsInLibrary(*Lib, Ctx.query(), Config.Options); - Ctx.markSearched(Lib.get()); - - if (Ctx.allResolved()) - return; - } - - if (Ctx.allResolved()) - return; - - if (!scanLibrariesIfNeeded(K, scanBatchSize)) - break; // no more new libs to scan - } - }; - - for (const auto &[St, Ty] : Config.Policy.Plan) { - tryResolveFrom(St, Ty); - if (Q.allResolved()) - break; - } - - // done: - LLVM_DEBUG({ - dbgs() << "Search complete.\n"; - for (const auto &r : Q.getAllResults()) - dbgs() << "Resolved Symbol:" << r->Name << " -> " << r->ResolvedLibPath - << "\n"; - }); - - OnComplete(Q); -} - -bool LibraryResolver::scanLibrariesIfNeeded(PathType PK, size_t BatchSize) { - LLVM_DEBUG(dbgs() << "LibraryResolver::scanLibrariesIfNeeded: Scanning for " - << (PK == PathType::User ? "User" : "System") - << " libraries\n";); - if (!ScanHelper.leftToScan(PK)) - return false; - - LibraryScanner Scanner(ScanHelper, LibMgr, ShouldScanCall); - Scanner.scanNext(PK, BatchSize); - return true; -} - -bool LibraryResolver::symbolExistsInLibrary(const LibraryInfo &Lib, - StringRef SymName, - std::vector<std::string> *AllSyms) { - SymbolEnumeratorOptions Opts; - return symbolExistsInLibrary(Lib, SymName, AllSyms, Opts); -} - -bool LibraryResolver::symbolExistsInLibrary( - const LibraryInfo &Lib, StringRef SymName, - std::vector<std::string> *AllSyms, const SymbolEnumeratorOptions &Opts) { - bool Found = false; - - SymbolEnumerator::enumerateSymbols( - Lib.getFullPath(), - [&](StringRef Sym) { - if (AllSyms) - AllSyms->emplace_back(Sym.str()); - - if (Sym == SymName) { - Found = true; - } - - return EnumerateResult::Continue; - }, - Opts); - - return Found; -} - -} // end namespace llvm::orc diff --git a/llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryScanner.cpp b/llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryScanner.cpp deleted file mode 100644 index f1e8b5d..0000000 --- a/llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryScanner.cpp +++ /dev/null @@ -1,1161 +0,0 @@ -//===- LibraryScanner.cpp - Provide Library Scanning Implementation ----===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#include "llvm/ExecutionEngine/Orc/TargetProcess/LibraryScanner.h" -#include "llvm/ExecutionEngine/Orc/TargetProcess/LibraryResolver.h" - -#include "llvm/ADT/StringExtras.h" -#include "llvm/Object/COFF.h" -#include "llvm/Object/ELF.h" -#include "llvm/Object/ELFObjectFile.h" -#include "llvm/Object/ELFTypes.h" -#include "llvm/Object/MachO.h" -#include "llvm/Object/MachOUniversal.h" -#include "llvm/Object/ObjectFile.h" -#include "llvm/Support/Error.h" -#include "llvm/Support/FileSystem.h" -#include "llvm/Support/MemoryBuffer.h" -#include "llvm/Support/Path.h" -#include "llvm/Support/Program.h" -#include "llvm/TargetParser/Host.h" -#include "llvm/TargetParser/Triple.h" - -#ifdef LLVM_ON_UNIX -#include <sys/stat.h> -#include <unistd.h> -#endif // LLVM_ON_UNIX - -#ifdef __APPLE__ -#include <sys/stat.h> -#undef LC_LOAD_DYLIB -#undef LC_RPATH -#endif // __APPLE__ - -#define DEBUG_TYPE "orc-scanner" - -namespace llvm::orc { - -void handleError(Error Err, StringRef context = "") { - consumeError(handleErrors(std::move(Err), [&](const ErrorInfoBase &EIB) { - dbgs() << "LLVM Error"; - if (!context.empty()) - dbgs() << " [" << context << "]"; - dbgs() << ": " << EIB.message() << "\n"; - })); -} - -bool ObjectFileLoader::isArchitectureCompatible(const object::ObjectFile &Obj) { - Triple HostTriple(sys::getDefaultTargetTriple()); - Triple ObjTriple = Obj.makeTriple(); - - LLVM_DEBUG({ - dbgs() << "Host triple: " << HostTriple.str() - << ", Object triple: " << ObjTriple.str() << "\n"; - }); - - if (ObjTriple.getArch() != Triple::UnknownArch && - HostTriple.getArch() != ObjTriple.getArch()) - return false; - - if (ObjTriple.getOS() != Triple::UnknownOS && - HostTriple.getOS() != ObjTriple.getOS()) - return false; - - if (ObjTriple.getEnvironment() != Triple::UnknownEnvironment && - HostTriple.getEnvironment() != Triple::UnknownEnvironment && - HostTriple.getEnvironment() != ObjTriple.getEnvironment()) - return false; - - return true; -} - -Expected<object::OwningBinary<object::ObjectFile>> -ObjectFileLoader::loadObjectFileWithOwnership(StringRef FilePath) { - LLVM_DEBUG(dbgs() << "ObjectFileLoader: Attempting to open file " << FilePath - << "\n";); - auto BinOrErr = object::createBinary(FilePath); - if (!BinOrErr) { - LLVM_DEBUG(dbgs() << "ObjectFileLoader: Failed to open file " << FilePath - << "\n";); - return BinOrErr.takeError(); - } - - LLVM_DEBUG(dbgs() << "ObjectFileLoader: Successfully opened file " << FilePath - << "\n";); - - auto OwningBin = BinOrErr->takeBinary(); - object::Binary *Bin = OwningBin.first.get(); - - if (Bin->isArchive()) { - LLVM_DEBUG(dbgs() << "ObjectFileLoader: File is an archive, not supported: " - << FilePath << "\n";); - return createStringError(std::errc::invalid_argument, - "Archive files are not supported: %s", - FilePath.str().c_str()); - } - -#if defined(__APPLE__) - if (auto *UB = dyn_cast<object::MachOUniversalBinary>(Bin)) { - LLVM_DEBUG(dbgs() << "ObjectFileLoader: Detected Mach-O universal binary: " - << FilePath << "\n";); - for (auto ObjForArch : UB->objects()) { - auto ObjOrErr = ObjForArch.getAsObjectFile(); - if (!ObjOrErr) { - LLVM_DEBUG( - dbgs() - << "ObjectFileLoader: Skipping invalid architecture slice\n";); - - consumeError(ObjOrErr.takeError()); - continue; - } - - std::unique_ptr<object::ObjectFile> Obj = std::move(ObjOrErr.get()); - if (isArchitectureCompatible(*Obj)) { - LLVM_DEBUG( - dbgs() << "ObjectFileLoader: Found compatible object slice\n";); - - return object::OwningBinary<object::ObjectFile>( - std::move(Obj), std::move(OwningBin.second)); - - } else { - LLVM_DEBUG(dbgs() << "ObjectFileLoader: Incompatible architecture " - "slice skipped\n";); - } - } - LLVM_DEBUG(dbgs() << "ObjectFileLoader: No compatible slices found in " - "universal binary\n";); - return createStringError(inconvertibleErrorCode(), - "No compatible object found in fat binary: %s", - FilePath.str().c_str()); - } -#endif - - auto ObjOrErr = - object::ObjectFile::createObjectFile(Bin->getMemoryBufferRef()); - if (!ObjOrErr) { - LLVM_DEBUG(dbgs() << "ObjectFileLoader: Failed to create object file\n";); - return ObjOrErr.takeError(); - } - LLVM_DEBUG(dbgs() << "ObjectFileLoader: Detected object file\n";); - - std::unique_ptr<object::ObjectFile> Obj = std::move(*ObjOrErr); - if (!isArchitectureCompatible(*Obj)) { - LLVM_DEBUG(dbgs() << "ObjectFileLoader: Incompatible architecture: " - << FilePath << "\n";); - return createStringError(inconvertibleErrorCode(), - "Incompatible object file: %s", - FilePath.str().c_str()); - } - - LLVM_DEBUG(dbgs() << "ObjectFileLoader: Object file is compatible\n";); - - return object::OwningBinary<object::ObjectFile>(std::move(Obj), - std::move(OwningBin.second)); -} - -template <class ELFT> -bool isELFSharedLibrary(const object::ELFFile<ELFT> &ELFObj) { - if (ELFObj.getHeader().e_type != ELF::ET_DYN) - return false; - - auto PHOrErr = ELFObj.program_headers(); - if (!PHOrErr) { - consumeError(PHOrErr.takeError()); - return true; - } - - for (auto Phdr : *PHOrErr) { - if (Phdr.p_type == ELF::PT_INTERP) - return false; - } - - return true; -} - -bool isSharedLibraryObject(object::ObjectFile &Obj) { - if (Obj.isELF()) { - if (auto *ELF32LE = dyn_cast<object::ELF32LEObjectFile>(&Obj)) - return isELFSharedLibrary(ELF32LE->getELFFile()); - if (auto *ELF64LE = dyn_cast<object::ELF64LEObjectFile>(&Obj)) - return isELFSharedLibrary(ELF64LE->getELFFile()); - if (auto *ELF32BE = dyn_cast<object::ELF32BEObjectFile>(&Obj)) - return isELFSharedLibrary(ELF32BE->getELFFile()); - if (auto *ELF64BE = dyn_cast<object::ELF64BEObjectFile>(&Obj)) - return isELFSharedLibrary(ELF64BE->getELFFile()); - } else if (Obj.isMachO()) { - const object::MachOObjectFile *MachO = - dyn_cast<object::MachOObjectFile>(&Obj); - if (!MachO) { - LLVM_DEBUG(dbgs() << "Failed to cast to MachOObjectFile.\n";); - return false; - } - LLVM_DEBUG({ - bool Result = - MachO->getHeader().filetype == MachO::HeaderFileType::MH_DYLIB; - dbgs() << "Mach-O filetype: " << MachO->getHeader().filetype - << " (MH_DYLIB == " << MachO::HeaderFileType::MH_DYLIB - << "), shared: " << Result << "\n"; - }); - - return MachO->getHeader().filetype == MachO::HeaderFileType::MH_DYLIB; - } else if (Obj.isCOFF()) { - const object::COFFObjectFile *coff = dyn_cast<object::COFFObjectFile>(&Obj); - if (!coff) - return false; - return coff->getCharacteristics() & COFF::IMAGE_FILE_DLL; - } else { - LLVM_DEBUG(dbgs() << "Binary is not an ObjectFile.\n";); - } - - return false; -} - -bool DylibPathValidator::isSharedLibrary(StringRef Path) { - LLVM_DEBUG(dbgs() << "Checking if path is a shared library: " << Path - << "\n";); - - auto FileType = sys::fs::get_file_type(Path, /*Follow*/ true); - if (FileType != sys::fs::file_type::regular_file) { - LLVM_DEBUG(dbgs() << "File type is not a regular file for path: " << Path - << "\n";); - return false; - } - - file_magic MagicCode; - identify_magic(Path, MagicCode); - - // Skip archives. - if (MagicCode == file_magic::archive) - return false; - - // Universal binary handling. -#if defined(__APPLE__) - if (MagicCode == file_magic::macho_universal_binary) { - ObjectFileLoader ObjLoader(Path); - auto ObjOrErr = ObjLoader.getObjectFile(); - if (!ObjOrErr) { - consumeError(ObjOrErr.takeError()); - return false; - } - return isSharedLibraryObject(ObjOrErr.get()); - } -#endif - - // Object file inspection for PE/COFF, ELF, and Mach-O - bool NeedsObjectInspection = -#if defined(_WIN32) - (MagicCode == file_magic::pecoff_executable); -#elif defined(__APPLE__) - (MagicCode == file_magic::macho_fixed_virtual_memory_shared_lib || - MagicCode == file_magic::macho_dynamically_linked_shared_lib || - MagicCode == file_magic::macho_dynamically_linked_shared_lib_stub); -#elif defined(LLVM_ON_UNIX) -#ifdef __CYGWIN__ - (MagicCode == file_magic::pecoff_executable); -#else - (MagicCode == file_magic::elf_shared_object); -#endif -#else -#error "Unsupported platform." -#endif - - if (NeedsObjectInspection) { - ObjectFileLoader ObjLoader(Path); - auto ObjOrErr = ObjLoader.getObjectFile(); - if (!ObjOrErr) { - consumeError(ObjOrErr.takeError()); - return false; - } - return isSharedLibraryObject(ObjOrErr.get()); - } - - LLVM_DEBUG(dbgs() << "Path is not identified as a shared library: " << Path - << "\n";); - return false; -} - -void DylibSubstitutor::configure(StringRef LoaderPath) { - SmallString<512> ExecPath(sys::fs::getMainExecutable(nullptr, nullptr)); - sys::path::remove_filename(ExecPath); - - SmallString<512> LoaderDir; - if (LoaderPath.empty()) { - LoaderDir = ExecPath; - } else { - LoaderDir = LoaderPath.str(); - if (!sys::fs::is_directory(LoaderPath)) - sys::path::remove_filename(LoaderDir); - } - -#ifdef __APPLE__ - Placeholders["@loader_path"] = std::string(LoaderDir); - Placeholders["@executable_path"] = std::string(ExecPath); -#else - Placeholders["$origin"] = std::string(LoaderDir); -#endif -} - -std::optional<std::string> -SearchPathResolver::resolve(StringRef Stem, const DylibSubstitutor &Subst, - DylibPathValidator &Validator) const { - for (const auto &SP : Paths) { - std::string Base = Subst.substitute(SP); - - SmallString<512> FullPath(Base); - if (!PlaceholderPrefix.empty() && - Stem.starts_with_insensitive(PlaceholderPrefix)) - FullPath.append(Stem.drop_front(PlaceholderPrefix.size())); - else - sys::path::append(FullPath, Stem); - - LLVM_DEBUG(dbgs() << "SearchPathResolver::resolve FullPath = " << FullPath - << "\n";); - - if (auto Valid = Validator.validate(FullPath.str())) - return Valid; - } - - return std::nullopt; -} - -std::optional<std::string> -DylibResolverImpl::tryWithExtensions(StringRef LibStem) const { - LLVM_DEBUG(dbgs() << "tryWithExtensions: baseName = " << LibStem << "\n";); - SmallVector<SmallString<256>, 8> Candidates; - - // Add extensions by platform -#if defined(__APPLE__) - Candidates.emplace_back(LibStem); - Candidates.back() += ".dylib"; -#elif defined(_WIN32) - Candidates.emplace_back(LibStem); - Candidates.back() += ".dll"; -#else - Candidates.emplace_back(LibStem); - Candidates.back() += ".so"; -#endif - - // Optionally try "lib" prefix if not already there - StringRef FileName = sys::path::filename(LibStem); - StringRef Base = sys::path::parent_path(LibStem); - if (!FileName.starts_with("lib")) { - SmallString<256> WithPrefix(Base); - if (!WithPrefix.empty()) - sys::path::append(WithPrefix, ""); // ensure separator if needed - WithPrefix += "lib"; - WithPrefix += FileName; - -#if defined(__APPLE__) - WithPrefix += ".dylib"; -#elif defined(_WIN32) - WithPrefix += ".dll"; -#else - WithPrefix += ".so"; -#endif - - Candidates.push_back(std::move(WithPrefix)); - } - - LLVM_DEBUG({ - dbgs() << " Candidates to try:\n"; - for (const auto &C : Candidates) - dbgs() << " " << C << "\n"; - }); - - // Try all variants using tryAllPaths - for (const auto &Name : Candidates) { - - LLVM_DEBUG(dbgs() << " Trying candidate: " << Name << "\n";); - - for (const auto &R : Resolvers) { - if (auto Res = R.resolve(Name, Substitutor, Validator)) - return Res; - } - } - - LLVM_DEBUG(dbgs() << " -> No candidate Resolved.\n";); - - return std::nullopt; -} - -std::optional<std::string> -DylibResolverImpl::resolve(StringRef LibStem, bool VariateLibStem) const { - LLVM_DEBUG(dbgs() << "Resolving library stem: " << LibStem << "\n";); - - // If it is an absolute path, don't try iterate over the paths. - if (sys::path::is_absolute(LibStem)) { - LLVM_DEBUG(dbgs() << " -> Absolute path detected.\n";); - return Validator.validate(LibStem); - } - - if (!LibStem.starts_with_insensitive("@rpath")) { - if (auto norm = Validator.validate(Substitutor.substitute(LibStem))) { - LLVM_DEBUG(dbgs() << " -> Resolved after substitution: " << *norm - << "\n";); - - return norm; - } - } - - for (const auto &R : Resolvers) { - LLVM_DEBUG(dbgs() << " -> Resolving via search path ... \n";); - if (auto Result = R.resolve(LibStem, Substitutor, Validator)) { - LLVM_DEBUG(dbgs() << " -> Resolved via search path: " << *Result - << "\n";); - - return Result; - } - } - - // Expand libStem with paths, extensions, etc. - // std::string foundName; - if (VariateLibStem) { - LLVM_DEBUG(dbgs() << " -> Trying with extensions...\n";); - - if (auto Norm = tryWithExtensions(LibStem)) { - LLVM_DEBUG(dbgs() << " -> Resolved via tryWithExtensions: " << *Norm - << "\n";); - - return Norm; - } - } - - LLVM_DEBUG(dbgs() << " -> Could not resolve: " << LibStem << "\n";); - - return std::nullopt; -} - -#ifndef _WIN32 -mode_t PathResolver::lstatCached(StringRef Path) { - // If already cached - retun cached result - if (auto Cache = LibPathCache->read_lstat(Path)) - return *Cache; - - // Not cached: perform lstat and store - struct stat buf{}; - mode_t st_mode = (lstat(Path.str().c_str(), &buf) == -1) ? 0 : buf.st_mode; - - LibPathCache->insert_lstat(Path, st_mode); - - return st_mode; -} - -std::optional<std::string> PathResolver::readlinkCached(StringRef Path) { - // If already cached - retun cached result - if (auto Cache = LibPathCache->read_link(Path)) - return Cache; - - // If result not in cache - call system function and cache result - char buf[PATH_MAX]; - ssize_t len; - if ((len = readlink(Path.str().c_str(), buf, sizeof(buf))) != -1) { - buf[len] = '\0'; - std::string s(buf); - LibPathCache->insert_link(Path, s); - return s; - } - return std::nullopt; -} - -void createComponent(StringRef Path, StringRef BasePath, bool BaseIsResolved, - SmallVector<StringRef, 16> &Component) { - StringRef Separator = sys::path::get_separator(); - if (!BaseIsResolved) { - if (Path[0] == '~' && - (Path.size() == 1 || sys::path::is_separator(Path[1]))) { - static SmallString<128> HomeP; - if (HomeP.str().empty()) - sys::path::home_directory(HomeP); - StringRef(HomeP).split(Component, Separator, /*MaxSplit*/ -1, - /*KeepEmpty*/ false); - } else if (BasePath.empty()) { - static SmallString<256> CurrentPath; - if (CurrentPath.str().empty()) - sys::fs::current_path(CurrentPath); - StringRef(CurrentPath) - .split(Component, Separator, /*MaxSplit*/ -1, /*KeepEmpty*/ false); - } else { - BasePath.split(Component, Separator, /*MaxSplit*/ -1, - /*KeepEmpty*/ false); - } - } - - Path.split(Component, Separator, /*MaxSplit*/ -1, /*KeepEmpty*/ false); -} - -void normalizePathSegments(SmallVector<StringRef, 16> &PathParts) { - SmallVector<StringRef, 16> NormalizedPath; - for (auto &Part : PathParts) { - if (Part == ".") { - continue; - } else if (Part == "..") { - if (!NormalizedPath.empty() && NormalizedPath.back() != "..") { - NormalizedPath.pop_back(); - } else { - NormalizedPath.push_back(".."); - } - } else { - NormalizedPath.push_back(Part); - } - } - PathParts.swap(NormalizedPath); -} -#endif - -std::optional<std::string> PathResolver::realpathCached(StringRef Path, - std::error_code &EC, - StringRef Base, - bool BaseIsResolved, - long SymLoopLevel) { - EC.clear(); - - if (Path.empty()) { - EC = std::make_error_code(std::errc::no_such_file_or_directory); - LLVM_DEBUG(dbgs() << "PathResolver::realpathCached: Empty path\n";); - - return std::nullopt; - } - - if (SymLoopLevel <= 0) { - EC = std::make_error_code(std::errc::too_many_symbolic_link_levels); - LLVM_DEBUG( - dbgs() << "PathResolver::realpathCached: Too many Symlink levels: " - << Path << "\n";); - - return std::nullopt; - } - - // If already cached - retun cached result - bool isRelative = sys::path::is_relative(Path); - if (!isRelative) { - if (auto Cached = LibPathCache->read_realpath(Path)) { - EC = Cached->ErrnoCode; - if (EC) { - LLVM_DEBUG(dbgs() << "PathResolver::realpathCached: Cached (error) for " - << Path << "\n";); - } else { - LLVM_DEBUG( - dbgs() << "PathResolver::realpathCached: Cached (success) for " - << Path << " => " << Cached->canonicalPath << "\n";); - } - return Cached->canonicalPath.empty() - ? std::nullopt - : std::make_optional(Cached->canonicalPath); - } - } - - LLVM_DEBUG(dbgs() << "PathResolver::realpathCached: Resolving path: " << Path - << "\n";); - - // If result not in cache - call system function and cache result - - StringRef Separator(sys::path::get_separator()); - SmallString<256> Resolved(Separator); -#ifndef _WIN32 - SmallVector<StringRef, 16> Components; - - if (isRelative) { - if (BaseIsResolved) { - Resolved.assign(Base); - LLVM_DEBUG(dbgs() << " Using Resolved base: " << Base << "\n";); - } - createComponent(Path, Base, BaseIsResolved, Components); - } else { - Path.split(Components, Separator, /*MaxSplit*/ -1, /*KeepEmpty*/ false); - } - - normalizePathSegments(Components); - LLVM_DEBUG({ - for (auto &C : Components) - dbgs() << " " << C << " "; - - dbgs() << "\n"; - }); - - // Handle path list items - for (const auto &Component : Components) { - if (Component == ".") - continue; - if (Component == "..") { - // collapse "a/b/../c" to "a/c" - size_t S = Resolved.rfind(Separator); - if (S != llvm::StringRef::npos) - Resolved.resize(S); - if (Resolved.empty()) - Resolved = Separator; - continue; - } - - size_t oldSize = Resolved.size(); - sys::path::append(Resolved, Component); - const char *ResolvedPath = Resolved.c_str(); - LLVM_DEBUG(dbgs() << " Processing Component: " << Component << " => " - << ResolvedPath << "\n";); - mode_t st_mode = lstatCached(ResolvedPath); - - if (S_ISLNK(st_mode)) { - LLVM_DEBUG(dbgs() << " Found symlink: " << ResolvedPath << "\n";); - - auto SymlinkOpt = readlinkCached(ResolvedPath); - if (!SymlinkOpt) { - EC = std::make_error_code(std::errc::no_such_file_or_directory); - LibPathCache->insert_realpath(Path, LibraryPathCache::PathInfo{"", EC}); - LLVM_DEBUG(dbgs() << " Failed to read symlink: " << ResolvedPath - << "\n";); - - return std::nullopt; - } - - StringRef Symlink = *SymlinkOpt; - LLVM_DEBUG(dbgs() << " Symlink points to: " << Symlink << "\n";); - - std::string resolvedBase = ""; - if (sys::path::is_relative(Symlink)) { - Resolved.resize(oldSize); - resolvedBase = Resolved.str().str(); - } - - auto RealSymlink = - realpathCached(Symlink, EC, resolvedBase, - /*BaseIsResolved=*/true, SymLoopLevel - 1); - if (!RealSymlink) { - LibPathCache->insert_realpath(Path, LibraryPathCache::PathInfo{"", EC}); - LLVM_DEBUG(dbgs() << " Failed to resolve symlink target: " << Symlink - << "\n";); - - return std::nullopt; - } - - Resolved.assign(*RealSymlink); - LLVM_DEBUG(dbgs() << " Symlink Resolved to: " << Resolved << "\n";); - - } else if (st_mode == 0) { - EC = std::make_error_code(std::errc::no_such_file_or_directory); - LibPathCache->insert_realpath(Path, LibraryPathCache::PathInfo{"", EC}); - LLVM_DEBUG(dbgs() << " Component does not exist: " << ResolvedPath - << "\n";); - - return std::nullopt; - } - } -#else - sys::fs::real_path(Path, Resolved); // Windows fallback -#endif - - std::string Canonical = Resolved.str().str(); - { - LibPathCache->insert_realpath(Path, LibraryPathCache::PathInfo{ - Canonical, - std::error_code() // success - }); - } - LLVM_DEBUG(dbgs() << "PathResolver::realpathCached: Final Resolved: " << Path - << " => " << Canonical << "\n";); - return Canonical; -} - -void LibraryScanHelper::addBasePath(const std::string &Path, PathType K) { - std::error_code EC; - std::string Canon = resolveCanonical(Path, EC); - if (EC) { - LLVM_DEBUG( - dbgs() - << "LibraryScanHelper::addBasePath: Failed to canonicalize path: " - << Path << "\n";); - return; - } - std::unique_lock<std::shared_mutex> Lock(Mtx); - if (LibSearchPaths.count(Canon)) { - LLVM_DEBUG(dbgs() << "LibraryScanHelper::addBasePath: Already added: " - << Canon << "\n";); - return; - } - K = K == PathType::Unknown ? classifyKind(Canon) : K; - auto SP = std::make_shared<LibrarySearchPath>(Canon, K); - LibSearchPaths[Canon] = SP; - - if (K == PathType::User) { - LLVM_DEBUG(dbgs() << "LibraryScanHelper::addBasePath: Added User path: " - << Canon << "\n";); - UnscannedUsr.push_back(StringRef(SP->BasePath)); - } else { - LLVM_DEBUG(dbgs() << "LibraryScanHelper::addBasePath: Added System path: " - << Canon << "\n";); - UnscannedSys.push_back(StringRef(SP->BasePath)); - } -} - -std::vector<std::shared_ptr<LibrarySearchPath>> -LibraryScanHelper::getNextBatch(PathType K, size_t BatchSize) { - std::vector<std::shared_ptr<LibrarySearchPath>> Result; - auto &Queue = (K == PathType::User) ? UnscannedUsr : UnscannedSys; - - std::unique_lock<std::shared_mutex> Lock(Mtx); - - while (!Queue.empty() && (BatchSize == 0 || Result.size() < BatchSize)) { - StringRef Base = Queue.front(); - auto It = LibSearchPaths.find(Base); - if (It != LibSearchPaths.end()) { - auto &SP = It->second; - ScanState Expected = ScanState::NotScanned; - if (SP->State.compare_exchange_strong(Expected, ScanState::Scanning)) { - Result.push_back(SP); - } - } - Queue.pop_front(); - } - - return Result; -} - -bool LibraryScanHelper::isTrackedBasePath(StringRef Path) const { - std::error_code EC; - std::string Canon = resolveCanonical(Path, EC); - if (EC) - return false; - - std::shared_lock<std::shared_mutex> Lock(Mtx); - return LibSearchPaths.count(Canon) > 0; -} - -bool LibraryScanHelper::leftToScan(PathType K) const { - std::shared_lock<std::shared_mutex> Lock(Mtx); - for (const auto &KV : LibSearchPaths) { - const auto &SP = KV.second; - if (SP->Kind == K && SP->State == ScanState::NotScanned) - return true; - } - return false; -} - -void LibraryScanHelper::resetToScan() { - std::shared_lock<std::shared_mutex> Lock(Mtx); - - for (auto &[_, SP] : LibSearchPaths) { - ScanState Expected = ScanState::Scanned; - - if (!SP->State.compare_exchange_strong(Expected, ScanState::NotScanned)) - continue; - - auto &TargetList = - (SP->Kind == PathType::User) ? UnscannedUsr : UnscannedSys; - TargetList.emplace_back(SP->BasePath); - } -} - -std::vector<std::shared_ptr<LibrarySearchPath>> -LibraryScanHelper::getAllUnits() const { - std::shared_lock<std::shared_mutex> Lock(Mtx); - std::vector<std::shared_ptr<LibrarySearchPath>> Result; - Result.reserve(LibSearchPaths.size()); - for (const auto &[_, SP] : LibSearchPaths) { - Result.push_back(SP); - } - return Result; -} - -std::string LibraryScanHelper::resolveCanonical(StringRef Path, - std::error_code &EC) const { - auto Canon = LibPathResolver->resolve(Path, EC); - return EC ? Path.str() : *Canon; -} - -PathType LibraryScanHelper::classifyKind(StringRef Path) const { - // Detect home directory - const char *Home = getenv("HOME"); - if (Home && Path.find(Home) == 0) - return PathType::User; - - static const std::array<std::string, 5> UserPrefixes = { - "/usr/local", // often used by users for manual installs - "/opt/homebrew", // common on macOS - "/opt/local", // MacPorts - "/home", // Linux home dirs - "/Users", // macOS user dirs - }; - - for (const auto &Prefix : UserPrefixes) { - if (Path.find(Prefix) == 0) - return PathType::User; - } - - return PathType::System; -} - -Expected<LibraryDepsInfo> parseMachODeps(const object::MachOObjectFile &Obj) { - LibraryDepsInfo Libdeps; - LLVM_DEBUG(dbgs() << "Parsing Mach-O dependencies...\n";); - for (const auto &Command : Obj.load_commands()) { - switch (Command.C.cmd) { - case MachO::LC_LOAD_DYLIB: { - MachO::dylib_command dylibCmd = Obj.getDylibIDLoadCommand(Command); - const char *name = Command.Ptr + dylibCmd.dylib.name; - Libdeps.addDep(name); - LLVM_DEBUG(dbgs() << " Found LC_LOAD_DYLIB: " << name << "\n";); - } break; - case MachO::LC_LOAD_WEAK_DYLIB: - case MachO::LC_REEXPORT_DYLIB: - case MachO::LC_LOAD_UPWARD_DYLIB: - case MachO::LC_LAZY_LOAD_DYLIB: - break; - case MachO::LC_RPATH: { - // Extract RPATH - MachO::rpath_command rpathCmd = Obj.getRpathCommand(Command); - const char *rpath = Command.Ptr + rpathCmd.path; - LLVM_DEBUG(dbgs() << " Found LC_RPATH: " << rpath << "\n";); - - SmallVector<StringRef, 4> RawPaths; - SplitString(StringRef(rpath), RawPaths, - sys::EnvPathSeparator == ':' ? ":" : ";"); - - for (const auto &raw : RawPaths) { - Libdeps.addRPath(raw.str()); // Convert to std::string - LLVM_DEBUG(dbgs() << " Parsed RPATH entry: " << raw << "\n";); - } - break; - } - } - } - - return Expected<LibraryDepsInfo>(std::move(Libdeps)); -} - -template <class ELFT> -static Expected<StringRef> getDynamicStrTab(const object::ELFFile<ELFT> &Elf) { - auto DynamicEntriesOrError = Elf.dynamicEntries(); - if (!DynamicEntriesOrError) - return DynamicEntriesOrError.takeError(); - - for (const typename ELFT::Dyn &Dyn : *DynamicEntriesOrError) { - if (Dyn.d_tag == ELF::DT_STRTAB) { - auto MappedAddrOrError = Elf.toMappedAddr(Dyn.getPtr()); - if (!MappedAddrOrError) - return MappedAddrOrError.takeError(); - return StringRef(reinterpret_cast<const char *>(*MappedAddrOrError)); - } - } - - // If the dynamic segment is not present, we fall back on the sections. - auto SectionsOrError = Elf.sections(); - if (!SectionsOrError) - return SectionsOrError.takeError(); - - for (const typename ELFT::Shdr &Sec : *SectionsOrError) { - if (Sec.sh_type == ELF::SHT_DYNSYM) - return Elf.getStringTableForSymtab(Sec); - } - - return make_error<StringError>("dynamic string table not found", - inconvertibleErrorCode()); -} - -template <typename ELFT> -Expected<LibraryDepsInfo> parseELF(const object::ELFFile<ELFT> &Elf) { - LibraryDepsInfo Deps; - Expected<StringRef> StrTabOrErr = getDynamicStrTab(Elf); - if (!StrTabOrErr) - return StrTabOrErr.takeError(); - - const char *Data = StrTabOrErr->data(); - - auto DynamicEntriesOrError = Elf.dynamicEntries(); - if (!DynamicEntriesOrError) { - return DynamicEntriesOrError.takeError(); - } - - for (const typename ELFT::Dyn &Dyn : *DynamicEntriesOrError) { - switch (Dyn.d_tag) { - case ELF::DT_NEEDED: - Deps.addDep(Data + Dyn.d_un.d_val); - break; - case ELF::DT_RPATH: { - SmallVector<StringRef, 4> RawPaths; - SplitString(Data + Dyn.d_un.d_val, RawPaths, - sys::EnvPathSeparator == ':' ? ":" : ";"); - for (const auto &raw : RawPaths) - Deps.addRPath(raw.str()); - break; - } - case ELF::DT_RUNPATH: { - SmallVector<StringRef, 4> RawPaths; - SplitString(Data + Dyn.d_un.d_val, RawPaths, - sys::EnvPathSeparator == ':' ? ":" : ";"); - for (const auto &raw : RawPaths) - Deps.addRunPath(raw.str()); - break; - } - case ELF::DT_FLAGS_1: - // Check if this is not a pie executable. - if (Dyn.d_un.d_val & ELF::DF_1_PIE) - Deps.isPIE = true; - break; - // (Dyn.d_tag == ELF::DT_NULL) continue; - // (Dyn.d_tag == ELF::DT_AUXILIARY || Dyn.d_tag == ELF::DT_FILTER) - default: - break; - } - } - - return Expected<LibraryDepsInfo>(std::move(Deps)); -} - -Expected<LibraryDepsInfo> parseELFDeps(const object::ELFObjectFileBase &Obj) { - using namespace object; - LLVM_DEBUG(dbgs() << "parseELFDeps: Detected ELF object\n";); - if (const auto *ELF = dyn_cast<ELF32LEObjectFile>(&Obj)) - return parseELF(ELF->getELFFile()); - else if (const auto *ELF = dyn_cast<ELF32BEObjectFile>(&Obj)) - return parseELF(ELF->getELFFile()); - else if (const auto *ELF = dyn_cast<ELF64LEObjectFile>(&Obj)) - return parseELF(ELF->getELFFile()); - else if (const auto *ELF = dyn_cast<ELF64BEObjectFile>(&Obj)) - return parseELF(ELF->getELFFile()); - - LLVM_DEBUG(dbgs() << "parseELFDeps: Unknown ELF format\n";); - return createStringError(std::errc::not_supported, "Unknown ELF format"); -} - -Expected<LibraryDepsInfo> LibraryScanner::extractDeps(StringRef FilePath) { - LLVM_DEBUG(dbgs() << "extractDeps: Attempting to open file " << FilePath - << "\n";); - - ObjectFileLoader ObjLoader(FilePath); - auto ObjOrErr = ObjLoader.getObjectFile(); - if (!ObjOrErr) { - LLVM_DEBUG(dbgs() << "extractDeps: Failed to open " << FilePath << "\n";); - return ObjOrErr.takeError(); - } - - object::ObjectFile *Obj = &ObjOrErr.get(); - - if (auto *elfObj = dyn_cast<object::ELFObjectFileBase>(Obj)) { - LLVM_DEBUG(dbgs() << "extractDeps: File " << FilePath - << " is an ELF object\n";); - - return parseELFDeps(*elfObj); - } - - if (auto *macho = dyn_cast<object::MachOObjectFile>(Obj)) { - LLVM_DEBUG(dbgs() << "extractDeps: File " << FilePath - << " is a Mach-O object\n";); - return parseMachODeps(*macho); - } - - if (Obj->isCOFF()) { - // TODO: COFF support - return LibraryDepsInfo(); - } - - LLVM_DEBUG(dbgs() << "extractDeps: Unsupported binary format for file " - << FilePath << "\n";); - return createStringError(inconvertibleErrorCode(), - "Unsupported binary format: %s", - FilePath.str().c_str()); -} - -std::optional<std::string> LibraryScanner::shouldScan(StringRef FilePath) { - std::error_code EC; - - LLVM_DEBUG(dbgs() << "[shouldScan] Checking: " << FilePath << "\n";); - - // [1] Check file existence early - if (!sys::fs::exists(FilePath)) { - LLVM_DEBUG(dbgs() << " -> Skipped: file does not exist.\n";); - - return std::nullopt; - } - - // [2] Resolve to canonical path - auto CanonicalPathOpt = ScanHelper.resolve(FilePath, EC); - if (EC || !CanonicalPathOpt) { - LLVM_DEBUG(dbgs() << " -> Skipped: failed to resolve path (EC=" - << EC.message() << ").\n";); - - return std::nullopt; - } - - const std::string &CanonicalPath = *CanonicalPathOpt; - LLVM_DEBUG(dbgs() << " -> Canonical path: " << CanonicalPath << "\n"); - - // [3] Check if it's a directory — skip directories - if (sys::fs::is_directory(CanonicalPath)) { - LLVM_DEBUG(dbgs() << " -> Skipped: path is a directory.\n";); - - return std::nullopt; - } - - // [4] Skip if it's not a shared library. - if (!DylibPathValidator::isSharedLibrary(CanonicalPath)) { - LLVM_DEBUG(dbgs() << " -> Skipped: not a shared library.\n";); - return std::nullopt; - } - - // [5] Skip if we've already seen this path (via cache) - if (ScanHelper.hasSeenOrMark(CanonicalPath)) { - LLVM_DEBUG(dbgs() << " -> Skipped: already seen.\n";); - - return std::nullopt; - } - - // [6] Already tracked in LibraryManager? - if (LibMgr.hasLibrary(CanonicalPath)) { - LLVM_DEBUG(dbgs() << " -> Skipped: already tracked by LibraryManager.\n";); - - return std::nullopt; - } - - // [7] Run user-defined hook (default: always true) - if (!ShouldScanCall(CanonicalPath)) { - LLVM_DEBUG(dbgs() << " -> Skipped: user-defined hook rejected.\n";); - - return std::nullopt; - } - - LLVM_DEBUG(dbgs() << " -> Accepted: ready to scan " << CanonicalPath - << "\n";); - return CanonicalPath; -} - -void LibraryScanner::handleLibrary(StringRef FilePath, PathType K, int level) { - LLVM_DEBUG(dbgs() << "LibraryScanner::handleLibrary: Scanning: " << FilePath - << ", level=" << level << "\n";); - auto CanonPathOpt = shouldScan(FilePath); - if (!CanonPathOpt) { - LLVM_DEBUG(dbgs() << " Skipped (shouldScan returned false): " << FilePath - << "\n";); - - return; - } - const std::string CanonicalPath = *CanonPathOpt; - - auto DepsOrErr = extractDeps(CanonicalPath); - if (!DepsOrErr) { - LLVM_DEBUG(dbgs() << " Failed to extract deps for: " << CanonicalPath - << "\n";); - handleError(DepsOrErr.takeError()); - return; - } - - LibraryDepsInfo &Deps = *DepsOrErr; - - LLVM_DEBUG({ - dbgs() << " Found deps : \n"; - for (const auto &dep : Deps.deps) - dbgs() << " : " << dep << "\n"; - dbgs() << " Found @rpath : " << Deps.rpath.size() << "\n"; - for (const auto &r : Deps.rpath) - dbgs() << " : " << r << "\n"; - dbgs() << " Found @runpath : \n"; - for (const auto &r : Deps.runPath) - dbgs() << " : " << r << "\n"; - }); - - if (Deps.isPIE && level == 0) { - LLVM_DEBUG(dbgs() << " Skipped PIE executable at top level: " - << CanonicalPath << "\n";); - - return; - } - - bool Added = LibMgr.addLibrary(CanonicalPath, K); - if (!Added) { - LLVM_DEBUG(dbgs() << " Already added: " << CanonicalPath << "\n";); - return; - } - - // Heuristic 1: No RPATH/RUNPATH, skip deps - if (Deps.rpath.empty() && Deps.runPath.empty()) { - LLVM_DEBUG( - dbgs() << "LibraryScanner::handleLibrary: Skipping deps (Heuristic1): " - << CanonicalPath << "\n";); - return; - } - - // Heuristic 2: All RPATH and RUNPATH already tracked - auto allTracked = [&](const auto &Paths) { - LLVM_DEBUG(dbgs() << " Checking : " << Paths.size() << "\n";); - return std::all_of(Paths.begin(), Paths.end(), [&](StringRef P) { - LLVM_DEBUG(dbgs() << " Checking isTrackedBasePath : " << P << "\n";); - return ScanHelper.isTrackedBasePath( - DylibResolver::resolvelinkerFlag(P, CanonicalPath)); - }); - }; - - if (allTracked(Deps.rpath) && allTracked(Deps.runPath)) { - LLVM_DEBUG( - dbgs() << "LibraryScanner::handleLibrary: Skipping deps (Heuristic2): " - << CanonicalPath << "\n";); - return; - } - - DylibPathValidator Validator(ScanHelper.getPathResolver()); - DylibResolver Resolver(Validator); - Resolver.configure(CanonicalPath, - {{Deps.rpath, SearchPathType::RPath}, - {ScanHelper.getSearchPaths(), SearchPathType::UsrOrSys}, - {Deps.runPath, SearchPathType::RunPath}}); - for (StringRef Dep : Deps.deps) { - LLVM_DEBUG(dbgs() << " Resolving dep: " << Dep << "\n";); - auto DepFullOpt = Resolver.resolve(Dep); - if (!DepFullOpt) { - LLVM_DEBUG(dbgs() << " Failed to resolve dep: " << Dep << "\n";); - - continue; - } - LLVM_DEBUG(dbgs() << " Resolved dep to: " << *DepFullOpt << "\n";); - - handleLibrary(*DepFullOpt, K, level + 1); - } -} - -void LibraryScanner::scanBaseDir(std::shared_ptr<LibrarySearchPath> SP) { - if (!sys::fs::is_directory(SP->BasePath) || SP->BasePath.empty()) { - LLVM_DEBUG( - dbgs() << "LibraryScanner::scanBaseDir: Invalid or empty basePath: " - << SP->BasePath << "\n";); - return; - } - - LLVM_DEBUG(dbgs() << "LibraryScanner::scanBaseDir: Scanning directory: " - << SP->BasePath << "\n";); - std::error_code EC; - - SP->State.store(ScanState::Scanning); - - for (sys::fs::directory_iterator It(SP->BasePath, EC), end; It != end && !EC; - It.increment(EC)) { - auto Entry = *It; - if (!Entry.status()) - continue; - - auto Status = *Entry.status(); - if (sys::fs::is_regular_file(Status) || sys::fs::is_symlink_file(Status)) { - LLVM_DEBUG(dbgs() << " Found file: " << Entry.path() << "\n";); - // async support ? - handleLibrary(Entry.path(), SP->Kind); - } - } - - SP->State.store(ScanState::Scanned); -} - -void LibraryScanner::scanNext(PathType K, size_t BatchSize) { - LLVM_DEBUG(dbgs() << "LibraryScanner::scanNext: Scanning next batch of size " - << BatchSize << " for kind " - << (K == PathType::User ? "User" : "System") << "\n";); - - auto SearchPaths = ScanHelper.getNextBatch(K, BatchSize); - for (auto &SP : SearchPaths) { - LLVM_DEBUG(dbgs() << " Scanning unit with basePath: " << SP->BasePath - << "\n";); - - scanBaseDir(SP); - } -} - -} // end namespace llvm::orc diff --git a/llvm/lib/Support/SpecialCaseList.cpp b/llvm/lib/Support/SpecialCaseList.cpp index f74e52a..c27f627 100644 --- a/llvm/lib/Support/SpecialCaseList.cpp +++ b/llvm/lib/Support/SpecialCaseList.cpp @@ -89,14 +89,32 @@ void SpecialCaseList::GlobMatcher::preprocess(bool BySize) { return A.Name.size() < B.Name.size(); }); } + + for (const auto &G : reverse(Globs)) { + StringRef Prefix = G.Pattern.prefix(); + + auto &V = PrefixToGlob.emplace(Prefix).first->second; + V.emplace_back(&G); + } } void SpecialCaseList::GlobMatcher::match( StringRef Query, llvm::function_ref<void(StringRef Rule, unsigned LineNo)> Cb) const { - for (const auto &G : reverse(Globs)) - if (G.Pattern.match(Query)) - return Cb(G.Name, G.LineNo); + if (!PrefixToGlob.empty()) { + for (const auto &[_, V] : PrefixToGlob.find_prefixes(Query)) { + for (const auto *G : V) { + if (G->Pattern.match(Query)) { + Cb(G->Name, G->LineNo); + // As soon as we find a match in the vector, we can break for this + // vector, since the globs are already sorted by priority within the + // prefix group. However, we continue searching other prefix groups in + // the map, as they may contain a better match overall. + break; + } + } + } + } } SpecialCaseList::Matcher::Matcher(bool UseGlobs, bool RemoveDotSlash) diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp index d5117da..457e540 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp @@ -5151,7 +5151,15 @@ void AArch64InstrInfo::copyPhysReg(MachineBasicBlock &MBB, // GPR32 zeroing if (AArch64::GPR32spRegClass.contains(DestReg) && SrcReg == AArch64::WZR) { - if (Subtarget.hasZeroCycleZeroingGPR32()) { + if (Subtarget.hasZeroCycleZeroingGPR64() && + !Subtarget.hasZeroCycleZeroingGPR32()) { + MCRegister DestRegX = RI.getMatchingSuperReg(DestReg, AArch64::sub_32, + &AArch64::GPR64spRegClass); + assert(DestRegX.isValid() && "Destination super-reg not valid"); + BuildMI(MBB, I, DL, get(AArch64::MOVZXi), DestRegX) + .addImm(0) + .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, 0)); + } else if (Subtarget.hasZeroCycleZeroingGPR32()) { BuildMI(MBB, I, DL, get(AArch64::MOVZWi), DestReg) .addImm(0) .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, 0)); diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 53be167..10d4cd5 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -6546,23 +6546,25 @@ def KCFI_CHECK_ARM : PseudoInst<(outs), (ins GPR:$ptr, i32imm:$type), NoItinerary, []>, Sched<[]>, Requires<[IsARM]> { - let Size = 28; // 7 instructions (bic, ldr, 4x eor, beq, udf) + let Size = 40; // worst-case 10 instructions @ 4 bytes each + // (push, bic, ldr, 4x eor, pop, beq, udf) } def KCFI_CHECK_Thumb2 : PseudoInst<(outs), (ins GPR:$ptr, i32imm:$type), NoItinerary, []>, Sched<[]>, Requires<[IsThumb2]> { - let Size = - 32; // worst-case 9 instructions (push, bic, ldr, 4x eor, pop, beq.w, udf) + let Size = 34; // worst-case (push.w[2], bic[4], ldr[4], 4x eor[16], pop.w[2], + // beq.w[4], udf[2]) } def KCFI_CHECK_Thumb1 : PseudoInst<(outs), (ins GPR:$ptr, i32imm:$type), NoItinerary, []>, Sched<[]>, Requires<[IsThumb1Only]> { - let Size = 50; // worst-case 25 instructions (pushes, bic helper, type - // building, cmp, pops) + let Size = 38; // worst-case 19 instructions @ 2 bytes each + // (2x push, 3x bic-helper, subs+ldr, 13x type-building, cmp, + // 2x pop, beq, bkpt) } //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/DirectX/DXILPrepare.cpp b/llvm/lib/Target/DirectX/DXILPrepare.cpp index 42e90f0..d6fa65f 100644 --- a/llvm/lib/Target/DirectX/DXILPrepare.cpp +++ b/llvm/lib/Target/DirectX/DXILPrepare.cpp @@ -6,7 +6,7 @@ // //===----------------------------------------------------------------------===// /// -/// \file This file contains pases and utilities to convert a modern LLVM +/// \file This file contains passes and utilities to convert a modern LLVM /// module into a module compatible with the LLVM 3.7-based DirectX Intermediate /// Language (DXIL). //===----------------------------------------------------------------------===// @@ -16,7 +16,6 @@ #include "DirectX.h" #include "DirectXIRPasses/PointerTypeAnalysis.h" #include "llvm/ADT/STLExtras.h" -#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringSet.h" #include "llvm/Analysis/DXILMetadataAnalysis.h" #include "llvm/Analysis/DXILResource.h" @@ -27,7 +26,6 @@ #include "llvm/IR/Module.h" #include "llvm/InitializePasses.h" #include "llvm/Pass.h" -#include "llvm/Support/Compiler.h" #include "llvm/Support/VersionTuple.h" #define DEBUG_TYPE "dxil-prepare" @@ -116,31 +114,6 @@ static void removeStringFunctionAttributes(Function &F, F.removeRetAttrs(DeadAttrs); } -static void cleanModuleFlags(Module &M) { - NamedMDNode *MDFlags = M.getModuleFlagsMetadata(); - if (!MDFlags) - return; - - SmallVector<llvm::Module::ModuleFlagEntry> FlagEntries; - M.getModuleFlagsMetadata(FlagEntries); - bool Updated = false; - for (auto &Flag : FlagEntries) { - // llvm 3.7 only supports behavior up to AppendUnique. - if (Flag.Behavior <= Module::ModFlagBehavior::AppendUnique) - continue; - Flag.Behavior = Module::ModFlagBehavior::Warning; - Updated = true; - } - - if (!Updated) - return; - - MDFlags->eraseFromParent(); - - for (auto &Flag : FlagEntries) - M.addModuleFlag(Flag.Behavior, Flag.Key->getString(), Flag.Val); -} - class DXILPrepareModule : public ModulePass { static Value *maybeGenerateBitcast(IRBuilder<> &Builder, @@ -202,15 +175,6 @@ class DXILPrepareModule : public ModulePass { Builder.getPtrTy(PtrTy->getAddressSpace()))); } - static std::array<unsigned, 6> getCompatibleInstructionMDs(llvm::Module &M) { - return {M.getMDKindID("dx.nonuniform"), - M.getMDKindID("dx.controlflow.hints"), - M.getMDKindID("dx.precise"), - llvm::LLVMContext::MD_range, - llvm::LLVMContext::MD_alias_scope, - llvm::LLVMContext::MD_noalias}; - } - public: bool runOnModule(Module &M) override { PointerTypeMap PointerTypes = PointerTypeAnalysis::run(M); @@ -224,10 +188,7 @@ public: const dxil::ModuleMetadataInfo MetadataInfo = getAnalysis<DXILMetadataAnalysisWrapperPass>().getModuleMetadata(); VersionTuple ValVer = MetadataInfo.ValidatorVersion; - bool SkipValidation = ValVer.getMajor() == 0 && ValVer.getMinor() == 0; - - // construct allowlist of valid metadata node kinds - std::array<unsigned, 6> DXILCompatibleMDs = getCompatibleInstructionMDs(M); + bool AllowExperimental = ValVer.getMajor() == 0 && ValVer.getMinor() == 0; for (auto &F : M.functions()) { F.removeFnAttrs(AttrMask); @@ -235,7 +196,7 @@ public: // Only remove string attributes if we are not skipping validation. // This will reserve the experimental attributes when validation version // is 0.0 for experiment mode. - removeStringFunctionAttributes(F, SkipValidation); + removeStringFunctionAttributes(F, AllowExperimental); for (size_t Idx = 0, End = F.arg_size(); Idx < End; ++Idx) F.removeParamAttrs(Idx, AttrMask); @@ -243,11 +204,17 @@ public: IRBuilder<> Builder(&BB); for (auto &I : make_early_inc_range(BB)) { - I.dropUnknownNonDebugMetadata(DXILCompatibleMDs); + if (auto *CB = dyn_cast<CallBase>(&I)) { + CB->removeFnAttrs(AttrMask); + CB->removeRetAttrs(AttrMask); + for (size_t Idx = 0, End = CB->arg_size(); Idx < End; ++Idx) + CB->removeParamAttrs(Idx, AttrMask); + continue; + } // Emtting NoOp bitcast instructions allows the ValueEnumerator to be // unmodified as it reserves instruction IDs during contruction. - if (auto LI = dyn_cast<LoadInst>(&I)) { + if (auto *LI = dyn_cast<LoadInst>(&I)) { if (Value *NoOpBitcast = maybeGenerateBitcast( Builder, PointerTypes, I, LI->getPointerOperand(), LI->getType())) { @@ -257,7 +224,7 @@ public: } continue; } - if (auto SI = dyn_cast<StoreInst>(&I)) { + if (auto *SI = dyn_cast<StoreInst>(&I)) { if (Value *NoOpBitcast = maybeGenerateBitcast( Builder, PointerTypes, I, SI->getPointerOperand(), SI->getValueOperand()->getType())) { @@ -268,39 +235,16 @@ public: } continue; } - if (auto GEP = dyn_cast<GetElementPtrInst>(&I)) { + if (auto *GEP = dyn_cast<GetElementPtrInst>(&I)) { if (Value *NoOpBitcast = maybeGenerateBitcast( Builder, PointerTypes, I, GEP->getPointerOperand(), GEP->getSourceElementType())) GEP->setOperand(0, NoOpBitcast); continue; } - if (auto *CB = dyn_cast<CallBase>(&I)) { - CB->removeFnAttrs(AttrMask); - CB->removeRetAttrs(AttrMask); - for (size_t Idx = 0, End = CB->arg_size(); Idx < End; ++Idx) - CB->removeParamAttrs(Idx, AttrMask); - continue; - } } } } - // Remove flags not for DXIL. - cleanModuleFlags(M); - - // dx.rootsignatures will have been parsed from its metadata form as its - // binary form as part of the RootSignatureAnalysisWrapper, so safely - // remove it as it is not recognized in DXIL - if (NamedMDNode *RootSignature = M.getNamedMetadata("dx.rootsignatures")) - RootSignature->eraseFromParent(); - - // llvm.errno.tbaa was recently added but is not supported in LLVM 3.7 and - // causes all tests using the DXIL Validator to fail. - // - // This is a temporary fix and should be replaced with a whitelist once - // we have determined all metadata that the DXIL Validator allows - if (NamedMDNode *ErrNo = M.getNamedMetadata("llvm.errno.tbaa")) - ErrNo->eraseFromParent(); return true; } @@ -308,11 +252,11 @@ public: DXILPrepareModule() : ModulePass(ID) {} void getAnalysisUsage(AnalysisUsage &AU) const override { AU.addRequired<DXILMetadataAnalysisWrapperPass>(); - AU.addRequired<RootSignatureAnalysisWrapper>(); - AU.addPreserved<RootSignatureAnalysisWrapper>(); - AU.addPreserved<ShaderFlagsAnalysisWrapper>(); + AU.addPreserved<DXILMetadataAnalysisWrapperPass>(); AU.addPreserved<DXILResourceWrapperPass>(); + AU.addPreserved<RootSignatureAnalysisWrapper>(); + AU.addPreserved<ShaderFlagsAnalysisWrapper>(); } static char ID; // Pass identification. }; @@ -323,7 +267,6 @@ char DXILPrepareModule::ID = 0; INITIALIZE_PASS_BEGIN(DXILPrepareModule, DEBUG_TYPE, "DXIL Prepare Module", false, false) INITIALIZE_PASS_DEPENDENCY(DXILMetadataAnalysisWrapperPass) -INITIALIZE_PASS_DEPENDENCY(RootSignatureAnalysisWrapper) INITIALIZE_PASS_END(DXILPrepareModule, DEBUG_TYPE, "DXIL Prepare Module", false, false) diff --git a/llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp b/llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp index 9eebcc9..1e4797b 100644 --- a/llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp +++ b/llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp @@ -7,8 +7,10 @@ //===----------------------------------------------------------------------===// #include "DXILTranslateMetadata.h" +#include "DXILRootSignature.h" #include "DXILShaderFlags.h" #include "DirectX.h" +#include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/Twine.h" #include "llvm/Analysis/DXILMetadataAnalysis.h" @@ -204,9 +206,9 @@ getEntryPropAsMetadata(const EntryProperties &EP, uint64_t EntryShaderFlags, return MDNode::get(Ctx, MDVals); } -MDTuple *constructEntryMetadata(const Function *EntryFn, MDTuple *Signatures, - MDNode *Resources, MDTuple *Properties, - LLVMContext &Ctx) { +static MDTuple *constructEntryMetadata(const Function *EntryFn, + MDTuple *Signatures, MDNode *Resources, + MDTuple *Properties, LLVMContext &Ctx) { // Each entry point metadata record specifies: // * reference to the entry point function global symbol // * unmangled name @@ -290,42 +292,82 @@ static MDTuple *emitTopLevelLibraryNode(Module &M, MDNode *RMD, return constructEntryMetadata(nullptr, nullptr, RMD, Properties, Ctx); } -// TODO: We might need to refactor this to be more generic, -// in case we need more metadata to be replaced. -static void translateBranchMetadata(Module &M) { - for (Function &F : M) { - for (BasicBlock &BB : F) { - Instruction *BBTerminatorInst = BB.getTerminator(); +static void translateBranchMetadata(Module &M, Instruction *BBTerminatorInst) { + MDNode *HlslControlFlowMD = + BBTerminatorInst->getMetadata("hlsl.controlflow.hint"); + + if (!HlslControlFlowMD) + return; - MDNode *HlslControlFlowMD = - BBTerminatorInst->getMetadata("hlsl.controlflow.hint"); + assert(HlslControlFlowMD->getNumOperands() == 2 && + "invalid operands for hlsl.controlflow.hint"); - if (!HlslControlFlowMD) - continue; + MDBuilder MDHelper(M.getContext()); - assert(HlslControlFlowMD->getNumOperands() == 2 && - "invalid operands for hlsl.controlflow.hint"); + llvm::Metadata *HintsStr = MDHelper.createString("dx.controlflow.hints"); + llvm::Metadata *HintsValue = MDHelper.createConstant( + mdconst::extract<ConstantInt>(HlslControlFlowMD->getOperand(1))); - MDBuilder MDHelper(M.getContext()); - ConstantInt *Op1 = - mdconst::extract<ConstantInt>(HlslControlFlowMD->getOperand(1)); + MDNode *MDNode = llvm::MDNode::get(M.getContext(), {HintsStr, HintsValue}); - SmallVector<llvm::Metadata *, 2> Vals( - ArrayRef<Metadata *>{MDHelper.createString("dx.controlflow.hints"), - MDHelper.createConstant(Op1)}); + BBTerminatorInst->setMetadata("dx.controlflow.hints", MDNode); + BBTerminatorInst->setMetadata("hlsl.controlflow.hint", nullptr); +} + +static std::array<unsigned, 6> getCompatibleInstructionMDs(llvm::Module &M) { + return { + M.getMDKindID("dx.nonuniform"), M.getMDKindID("dx.controlflow.hints"), + M.getMDKindID("dx.precise"), llvm::LLVMContext::MD_range, + llvm::LLVMContext::MD_alias_scope, llvm::LLVMContext::MD_noalias}; +} - MDNode *MDNode = llvm::MDNode::get(M.getContext(), Vals); +static void translateInstructionMetadata(Module &M) { + // construct allowlist of valid metadata node kinds + std::array<unsigned, 6> DXILCompatibleMDs = getCompatibleInstructionMDs(M); - BBTerminatorInst->setMetadata("dx.controlflow.hints", MDNode); - BBTerminatorInst->setMetadata("hlsl.controlflow.hint", nullptr); + for (Function &F : M) { + for (BasicBlock &BB : F) { + // This needs to be done first so that "hlsl.controlflow.hints" isn't + // removed in the whitelist below + if (auto *I = BB.getTerminator()) + translateBranchMetadata(M, I); + + for (auto &I : make_early_inc_range(BB)) { + I.dropUnknownNonDebugMetadata(DXILCompatibleMDs); + } } } } -static void translateMetadata(Module &M, DXILResourceMap &DRM, - DXILResourceTypeMap &DRTM, - const ModuleShaderFlags &ShaderFlags, - const ModuleMetadataInfo &MMDI) { +static void cleanModuleFlags(Module &M) { + NamedMDNode *MDFlags = M.getModuleFlagsMetadata(); + if (!MDFlags) + return; + + SmallVector<llvm::Module::ModuleFlagEntry> FlagEntries; + M.getModuleFlagsMetadata(FlagEntries); + bool Updated = false; + for (auto &Flag : FlagEntries) { + // llvm 3.7 only supports behavior up to AppendUnique. + if (Flag.Behavior <= Module::ModFlagBehavior::AppendUnique) + continue; + Flag.Behavior = Module::ModFlagBehavior::Warning; + Updated = true; + } + + if (!Updated) + return; + + MDFlags->eraseFromParent(); + + for (auto &Flag : FlagEntries) + M.addModuleFlag(Flag.Behavior, Flag.Key->getString(), Flag.Val); +} + +static void translateGlobalMetadata(Module &M, DXILResourceMap &DRM, + DXILResourceTypeMap &DRTM, + const ModuleShaderFlags &ShaderFlags, + const ModuleMetadataInfo &MMDI) { LLVMContext &Ctx = M.getContext(); IRBuilder<> IRB(Ctx); SmallVector<MDNode *> EntryFnMDNodes; @@ -381,6 +423,22 @@ static void translateMetadata(Module &M, DXILResourceMap &DRM, M.getOrInsertNamedMetadata("dx.entryPoints"); for (auto *Entry : EntryFnMDNodes) EntryPointsNamedMD->addOperand(Entry); + + cleanModuleFlags(M); + + // dx.rootsignatures will have been parsed from its metadata form as its + // binary form as part of the RootSignatureAnalysisWrapper, so safely + // remove it as it is not recognized in DXIL + if (NamedMDNode *RootSignature = M.getNamedMetadata("dx.rootsignatures")) + RootSignature->eraseFromParent(); + + // llvm.errno.tbaa was recently added but is not supported in LLVM 3.7 and + // causes all tests using the DXIL Validator to fail. + // + // This is a temporary fix and should be replaced with a allowlist once + // we have determined all metadata that the DXIL Validator allows + if (NamedMDNode *ErrNo = M.getNamedMetadata("llvm.errno.tbaa")) + ErrNo->eraseFromParent(); } PreservedAnalyses DXILTranslateMetadata::run(Module &M, @@ -390,8 +448,8 @@ PreservedAnalyses DXILTranslateMetadata::run(Module &M, const ModuleShaderFlags &ShaderFlags = MAM.getResult<ShaderFlagsAnalysis>(M); const dxil::ModuleMetadataInfo MMDI = MAM.getResult<DXILMetadataAnalysis>(M); - translateMetadata(M, DRM, DRTM, ShaderFlags, MMDI); - translateBranchMetadata(M); + translateGlobalMetadata(M, DRM, DRTM, ShaderFlags, MMDI); + translateInstructionMetadata(M); return PreservedAnalyses::all(); } @@ -409,10 +467,13 @@ public: AU.addRequired<DXILResourceWrapperPass>(); AU.addRequired<ShaderFlagsAnalysisWrapper>(); AU.addRequired<DXILMetadataAnalysisWrapperPass>(); - AU.addPreserved<DXILResourceWrapperPass>(); + AU.addRequired<RootSignatureAnalysisWrapper>(); + AU.addPreserved<DXILMetadataAnalysisWrapperPass>(); - AU.addPreserved<ShaderFlagsAnalysisWrapper>(); AU.addPreserved<DXILResourceBindingWrapperPass>(); + AU.addPreserved<DXILResourceWrapperPass>(); + AU.addPreserved<RootSignatureAnalysisWrapper>(); + AU.addPreserved<ShaderFlagsAnalysisWrapper>(); } bool runOnModule(Module &M) override { @@ -425,8 +486,8 @@ public: dxil::ModuleMetadataInfo MMDI = getAnalysis<DXILMetadataAnalysisWrapperPass>().getModuleMetadata(); - translateMetadata(M, DRM, DRTM, ShaderFlags, MMDI); - translateBranchMetadata(M); + translateGlobalMetadata(M, DRM, DRTM, ShaderFlags, MMDI); + translateInstructionMetadata(M); return true; } }; @@ -443,6 +504,7 @@ INITIALIZE_PASS_BEGIN(DXILTranslateMetadataLegacy, "dxil-translate-metadata", "DXIL Translate Metadata", false, false) INITIALIZE_PASS_DEPENDENCY(DXILResourceWrapperPass) INITIALIZE_PASS_DEPENDENCY(ShaderFlagsAnalysisWrapper) +INITIALIZE_PASS_DEPENDENCY(RootSignatureAnalysisWrapper) INITIALIZE_PASS_DEPENDENCY(DXILMetadataAnalysisWrapperPass) INITIALIZE_PASS_END(DXILTranslateMetadataLegacy, "dxil-translate-metadata", "DXIL Translate Metadata", false, false) diff --git a/llvm/lib/Target/DirectX/DXILTranslateMetadata.h b/llvm/lib/Target/DirectX/DXILTranslateMetadata.h index f3f5eb1..4c1ffac 100644 --- a/llvm/lib/Target/DirectX/DXILTranslateMetadata.h +++ b/llvm/lib/Target/DirectX/DXILTranslateMetadata.h @@ -13,7 +13,8 @@ namespace llvm { -/// A pass that transforms DXIL Intrinsics that don't have DXIL opCodes +/// A pass that transforms LLVM Metadata in the module to it's DXIL equivalent, +/// then emits all recognized DXIL Metadata class DXILTranslateMetadata : public PassInfoMixin<DXILTranslateMetadata> { public: PreservedAnalyses run(Module &M, ModuleAnalysisManager &); diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td index 9e6b7f0..2754d78 100644 --- a/llvm/lib/Target/RISCV/RISCVFeatures.td +++ b/llvm/lib/Target/RISCV/RISCVFeatures.td @@ -1124,7 +1124,8 @@ def HasStdExtZbkbOrP "'Base P' (Packed-SIMD)">; def HasStdExtZbbOrZbkbOrP - : Predicate<"Subtarget->HasStdExtZbbOrZbkb()|| Subtarget->hasStdExtP()">, + : Predicate<"Subtarget->hasStdExtZbb() || Subtarget->hasStdExtZbkb() || " + "Subtarget->hasStdExtP()">, AssemblerPredicate<(any_of FeatureStdExtZbb, FeatureStdExtZbkb, FeatureStdExtP), "'Zbb' (Basic Bit-Manipulation) or " "'Zbkb' (Bitmanip instructions for Cryptography) or " diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index 219e3f2..1c930ac 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -318,8 +318,9 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM, setOperationAction(ISD::EH_DWARF_CFA, MVT::i32, Custom); - if (!Subtarget.hasStdExtZbb() && !Subtarget.hasVendorXTHeadBb() && - !Subtarget.hasVendorXqcibm() && !Subtarget.hasVendorXAndesPerf() && + if (!Subtarget.hasStdExtZbb() && !Subtarget.hasStdExtP() && + !Subtarget.hasVendorXTHeadBb() && !Subtarget.hasVendorXqcibm() && + !Subtarget.hasVendorXAndesPerf() && !(Subtarget.hasVendorXCValu() && !Subtarget.is64Bit())) setOperationAction(ISD::SIGN_EXTEND_INREG, {MVT::i8, MVT::i16}, Expand); @@ -392,7 +393,7 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM, setOperationAction(ISD::BITREVERSE, MVT::i8, Custom); } - if (Subtarget.hasStdExtZbb() || + if (Subtarget.hasStdExtZbb() || Subtarget.hasStdExtP() || (Subtarget.hasVendorXCValu() && !Subtarget.is64Bit())) { setOperationAction({ISD::SMIN, ISD::SMAX, ISD::UMIN, ISD::UMAX}, XLenVT, Legal); @@ -403,6 +404,9 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM, setOperationAction({ISD::CTTZ, ISD::CTTZ_ZERO_UNDEF}, MVT::i32, Custom); } else { setOperationAction(ISD::CTTZ, XLenVT, Expand); + // If have a CLZW, but not CTZW, custom promote i32. + if (Subtarget.hasStdExtP() && Subtarget.is64Bit()) + setOperationAction({ISD::CTTZ, ISD::CTTZ_ZERO_UNDEF}, MVT::i32, Custom); } if (!Subtarget.hasCPOPLike()) { @@ -419,13 +423,15 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM, // We need the custom lowering to make sure that the resulting sequence // for the 32bit case is efficient on 64bit targets. // Use default promotion for i32 without Zbb. - if (Subtarget.is64Bit() && Subtarget.hasStdExtZbb()) + if (Subtarget.is64Bit() && + (Subtarget.hasStdExtZbb() || Subtarget.hasStdExtP())) setOperationAction({ISD::CTLZ, ISD::CTLZ_ZERO_UNDEF}, MVT::i32, Custom); } else { setOperationAction(ISD::CTLZ, XLenVT, Expand); } - if (Subtarget.hasVendorXCValu() && !Subtarget.is64Bit()) { + if (Subtarget.hasStdExtP() || + (Subtarget.hasVendorXCValu() && !Subtarget.is64Bit())) { setOperationAction(ISD::ABS, XLenVT, Legal); } else if (Subtarget.hasShortForwardBranchOpt()) { // We can use PseudoCCSUB to implement ABS. @@ -14669,6 +14675,25 @@ void RISCVTargetLowering::ReplaceNodeResults(SDNode *N, DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(0)); bool IsCTZ = N->getOpcode() == ISD::CTTZ || N->getOpcode() == ISD::CTTZ_ZERO_UNDEF; + + // Without Zbb, lower as 32 - clzw(~X & (X-1)) + if (IsCTZ && !Subtarget.hasStdExtZbb()) { + assert(Subtarget.hasStdExtP()); + + NewOp0 = DAG.getFreeze(NewOp0); + SDValue Not = DAG.getNOT(DL, NewOp0, MVT::i64); + SDValue Minus1 = DAG.getNode(ISD::SUB, DL, MVT::i64, NewOp0, + DAG.getConstant(1, DL, MVT::i64)); + SDValue And = DAG.getNode(ISD::AND, DL, MVT::i64, Not, Minus1); + SDValue CLZW = DAG.getNode(RISCVISD::CLZW, DL, MVT::i64, And); + SDValue Sub = DAG.getNode(ISD::SUB, DL, MVT::i64, + DAG.getConstant(32, DL, MVT::i64), CLZW); + SDValue Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, MVT::i64, Sub, + DAG.getValueType(MVT::i32)); + Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Res)); + return; + } + unsigned Opc = IsCTZ ? RISCVISD::CTZW : RISCVISD::CLZW; SDValue Res = DAG.getNode(Opc, DL, MVT::i64, NewOp0); Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Res)); diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoP.td b/llvm/lib/Target/RISCV/RISCVInstrInfoP.td index 7d8a919..cc085bb 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoP.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoP.td @@ -1455,3 +1455,11 @@ let Predicates = [HasStdExtP, IsRV32] in { def PMAXU_DW : RVPPairBinaryExchanged_rr<0b1111, 0b01, "pmaxu.dw">; def PMAXU_DB : RVPPairBinaryExchanged_rr<0b1111, 0b10, "pmaxu.db">; } // Predicates = [HasStdExtP, IsRV32] + + +//===----------------------------------------------------------------------===// +// Codegen patterns +//===----------------------------------------------------------------------===// + +let Predicates = [HasStdExtP] in +def : PatGpr<abs, ABS>; diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZb.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZb.td index 6b9a75f..5429c2a 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoZb.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZb.td @@ -599,14 +599,20 @@ def : PatGpr<riscv_zip, ZIP_RV32, i32>; def : PatGpr<riscv_unzip, UNZIP_RV32, i32>; } // Predicates = [HasStdExtZbkb, IsRV32] -let Predicates = [HasStdExtZbb] in { +let Predicates = [HasStdExtZbbOrP] in { def : PatGpr<ctlz, CLZ>; +} + +let Predicates = [HasStdExtZbb] in { def : PatGpr<cttz, CTZ>; def : PatGpr<ctpop, CPOP>; } // Predicates = [HasStdExtZbb] -let Predicates = [HasStdExtZbb, IsRV64] in { +let Predicates = [HasStdExtZbbOrP, IsRV64] in { def : PatGpr<riscv_clzw, CLZW>; +} + +let Predicates = [HasStdExtZbb, IsRV64] in { def : PatGpr<riscv_ctzw, CTZW>; def : Pat<(i64 (ctpop (i64 (zexti32 (i64 GPR:$rs1))))), (CPOPW GPR:$rs1)>; @@ -614,22 +620,22 @@ def : Pat<(i64 (riscv_negw_max GPR:$rs1)), (MAX GPR:$rs1, (XLenVT (SUBW (XLenVT X0), GPR:$rs1)))>; } // Predicates = [HasStdExtZbb, IsRV64] -let Predicates = [HasStdExtZbb] in { +let Predicates = [HasStdExtZbbOrP] in { def : Pat<(XLenVT (sext_inreg GPR:$rs1, i8)), (SEXT_B GPR:$rs1)>; def : Pat<(XLenVT (sext_inreg GPR:$rs1, i16)), (SEXT_H GPR:$rs1)>; } // Predicates = [HasStdExtZbb] -let Predicates = [HasStdExtZbb] in { +let Predicates = [HasStdExtZbbOrP] in { def : PatGprGpr<smin, MIN>; def : PatGprGpr<smax, MAX>; def : PatGprGpr<umin, MINU>; def : PatGprGpr<umax, MAXU>; } // Predicates = [HasStdExtZbb] -let Predicates = [HasStdExtZbbOrZbkb, IsRV32] in +let Predicates = [HasStdExtZbbOrZbkbOrP, IsRV32] in def : PatGpr<bswap, REV8_RV32, i32>; -let Predicates = [HasStdExtZbbOrZbkb, IsRV64] in +let Predicates = [HasStdExtZbbOrZbkbOrP, IsRV64] in def : PatGpr<bswap, REV8_RV64, i64>; let Predicates = [HasStdExtZbkb] in { diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.h b/llvm/lib/Target/RISCV/RISCVSubtarget.h index 334db4b..4b4fc8f 100644 --- a/llvm/lib/Target/RISCV/RISCVSubtarget.h +++ b/llvm/lib/Target/RISCV/RISCVSubtarget.h @@ -187,7 +187,7 @@ public: } bool hasCLZLike() const { - return HasStdExtZbb || HasVendorXTHeadBb || + return HasStdExtZbb || HasStdExtP || HasVendorXTHeadBb || (HasVendorXCVbitmanip && !IsRV64); } bool hasCTZLike() const { @@ -197,7 +197,7 @@ public: return HasStdExtZbb || (HasVendorXCVbitmanip && !IsRV64); } bool hasREV8Like() const { - return HasStdExtZbb || HasStdExtZbkb || HasVendorXTHeadBb; + return HasStdExtZbb || HasStdExtZbkb || HasStdExtP || HasVendorXTHeadBb; } bool hasBEXTILike() const { return HasStdExtZbs || HasVendorXTHeadBs; } diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h index 6261fad..706ab2b 100644 --- a/llvm/lib/Target/X86/X86.h +++ b/llvm/lib/Target/X86/X86.h @@ -160,6 +160,14 @@ FunctionPass *createX86PartialReductionPass(); /// // Analyzes and emits pseudos to support Win x64 Unwind V2. FunctionPass *createX86WinEHUnwindV2Pass(); +/// The pass transforms load/store <256 x i32> to AMX load/store intrinsics +/// or split the data to two <128 x i32>. +FunctionPass *createX86LowerAMXTypePass(); + +/// The pass transforms amx intrinsics to scalar operation if the function has +/// optnone attribute or it is O0. +FunctionPass *createX86LowerAMXIntrinsicsPass(); + InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM, const X86Subtarget &, const X86RegisterBankInfo &); diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp index 62073ec..4393f6e 100644 --- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -4721,9 +4721,6 @@ bool X86DAGToDAGISel::tryVPTERNLOG(SDNode *N) { if (!(Subtarget->hasVLX() || NVT.is512BitVector())) return false; - SDValue N0 = N->getOperand(0); - SDValue N1 = N->getOperand(1); - auto getFoldableLogicOp = [](SDValue Op) { // Peek through single use bitcast. if (Op.getOpcode() == ISD::BITCAST && Op.hasOneUse()) @@ -4740,13 +4737,47 @@ bool X86DAGToDAGISel::tryVPTERNLOG(SDNode *N) { return SDValue(); }; - SDValue A, FoldableOp; - if ((FoldableOp = getFoldableLogicOp(N1))) { - A = N0; - } else if ((FoldableOp = getFoldableLogicOp(N0))) { - A = N1; - } else - return false; + SDValue N0, N1, A, FoldableOp; + + // Identify and (optionally) peel an outer NOT that wraps a pure logic tree + auto tryPeelOuterNotWrappingLogic = [&](SDNode *Op) { + if (Op->getOpcode() == ISD::XOR && Op->hasOneUse() && + ISD::isBuildVectorAllOnes(Op->getOperand(1).getNode())) { + SDValue InnerOp = Op->getOperand(0); + + if (!getFoldableLogicOp(InnerOp)) + return SDValue(); + + N0 = InnerOp.getOperand(0); + N1 = InnerOp.getOperand(1); + if ((FoldableOp = getFoldableLogicOp(N1))) { + A = N0; + return InnerOp; + } + if ((FoldableOp = getFoldableLogicOp(N0))) { + A = N1; + return InnerOp; + } + } + return SDValue(); + }; + + bool PeeledOuterNot = false; + SDNode *OriN = N; + if (SDValue InnerOp = tryPeelOuterNotWrappingLogic(N)) { + PeeledOuterNot = true; + N = InnerOp.getNode(); + } else { + N0 = N->getOperand(0); + N1 = N->getOperand(1); + + if ((FoldableOp = getFoldableLogicOp(N1))) + A = N0; + else if ((FoldableOp = getFoldableLogicOp(N0))) + A = N1; + else + return false; + } SDValue B = FoldableOp.getOperand(0); SDValue C = FoldableOp.getOperand(1); @@ -4798,7 +4829,10 @@ bool X86DAGToDAGISel::tryVPTERNLOG(SDNode *N) { case ISD::XOR: Imm ^= TernlogMagicA; break; } - return matchVPTERNLOG(N, ParentA, ParentB, ParentC, A, B, C, Imm); + if (PeeledOuterNot) + Imm = ~Imm; + + return matchVPTERNLOG(OriN, ParentA, ParentB, ParentC, A, B, C, Imm); } /// If the high bits of an 'and' operand are known zero, try setting the diff --git a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp index b6cbecb..10b03bb 100644 --- a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp +++ b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp @@ -226,6 +226,7 @@ static const Align kMinOriginAlignment = Align(4); static const Align kShadowTLSAlignment = Align(8); // These constants must be kept in sync with the ones in msan.h. +// TODO: increase size to match SVE/SVE2/SME/SME2 limits static const unsigned kParamTLSSize = 800; static const unsigned kRetvalTLSSize = 800; @@ -1544,6 +1545,22 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> { } } + static bool isAArch64SVCount(Type *Ty) { + if (TargetExtType *TTy = dyn_cast<TargetExtType>(Ty)) + return TTy->getName() == "aarch64.svcount"; + return false; + } + + // This is intended to match the "AArch64 Predicate-as-Counter Type" (aka + // 'target("aarch64.svcount")', but not e.g., <vscale x 4 x i32>. + static bool isScalableNonVectorType(Type *Ty) { + if (!isAArch64SVCount(Ty)) + LLVM_DEBUG(dbgs() << "isScalableNonVectorType: Unexpected type " << *Ty + << "\n"); + + return Ty->isScalableTy() && !isa<VectorType>(Ty); + } + void materializeChecks() { #ifndef NDEBUG // For assert below. @@ -1672,6 +1689,12 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> { LLVM_DEBUG(dbgs() << "getShadowTy: " << *ST << " ===> " << *Res << "\n"); return Res; } + if (isScalableNonVectorType(OrigTy)) { + LLVM_DEBUG(dbgs() << "getShadowTy: Scalable non-vector type: " << *OrigTy + << "\n"); + return OrigTy; + } + uint32_t TypeSize = DL.getTypeSizeInBits(OrigTy); return IntegerType::get(*MS.C, TypeSize); } @@ -2185,8 +2208,14 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> { << *OrigIns << "\n"); return; } -#ifndef NDEBUG + Type *ShadowTy = Shadow->getType(); + if (isScalableNonVectorType(ShadowTy)) { + LLVM_DEBUG(dbgs() << "Skipping check of scalable non-vector " << *Shadow + << " before " << *OrigIns << "\n"); + return; + } +#ifndef NDEBUG assert((isa<IntegerType>(ShadowTy) || isa<VectorType>(ShadowTy) || isa<StructType>(ShadowTy) || isa<ArrayType>(ShadowTy)) && "Can only insert checks for integer, vector, and aggregate shadow " @@ -6972,6 +7001,15 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> { // an extra "select". This results in much more compact IR. // Sa = select Sb, poisoned, (select b, Sc, Sd) Sa1 = getPoisonedShadow(getShadowTy(I.getType())); + } else if (isScalableNonVectorType(I.getType())) { + // This is intended to handle target("aarch64.svcount"), which can't be + // handled in the else branch because of incompatibility with CreateXor + // ("The supported LLVM operations on this type are limited to load, + // store, phi, select and alloca instructions"). + + // TODO: this currently underapproximates. Use Arm SVE EOR in the else + // branch as needed instead. + Sa1 = getCleanShadow(getShadowTy(I.getType())); } else { // Sa = select Sb, [ (c^d) | Sc | Sd ], [ b ? Sc : Sd ] // If Sb (condition is poisoned), look for bits in c and d that are equal diff --git a/llvm/lib/Transforms/Vectorize/VPlan.h b/llvm/lib/Transforms/Vectorize/VPlan.h index a1ad2db..2591df8 100644 --- a/llvm/lib/Transforms/Vectorize/VPlan.h +++ b/llvm/lib/Transforms/Vectorize/VPlan.h @@ -4172,11 +4172,6 @@ class VPlan { /// definitions are VPValues that hold a pointer to their underlying IR. SmallVector<VPValue *, 16> VPLiveIns; - /// Mapping from SCEVs to the VPValues representing their expansions. - /// NOTE: This mapping is temporary and will be removed once all users have - /// been modeled in VPlan directly. - DenseMap<const SCEV *, VPValue *> SCEVToExpansion; - /// Blocks allocated and owned by the VPlan. They will be deleted once the /// VPlan is destroyed. SmallVector<VPBlockBase *> CreatedBlocks; @@ -4424,15 +4419,6 @@ public: LLVM_DUMP_METHOD void dump() const; #endif - VPValue *getSCEVExpansion(const SCEV *S) const { - return SCEVToExpansion.lookup(S); - } - - void addSCEVExpansion(const SCEV *S, VPValue *V) { - assert(!SCEVToExpansion.contains(S) && "SCEV already expanded"); - SCEVToExpansion[S] = V; - } - /// Clone the current VPlan, update all VPValues of the new VPlan and cloned /// recipes to refer to the clones, and return it. VPlan *duplicate(); diff --git a/llvm/lib/Transforms/Vectorize/VPlanUtils.cpp b/llvm/lib/Transforms/Vectorize/VPlanUtils.cpp index 06c3d75..fe66f13 100644 --- a/llvm/lib/Transforms/Vectorize/VPlanUtils.cpp +++ b/llvm/lib/Transforms/Vectorize/VPlanUtils.cpp @@ -32,8 +32,6 @@ bool vputils::onlyScalarValuesUsed(const VPValue *Def) { } VPValue *vputils::getOrCreateVPValueForSCEVExpr(VPlan &Plan, const SCEV *Expr) { - if (auto *Expanded = Plan.getSCEVExpansion(Expr)) - return Expanded; VPValue *Expanded = nullptr; if (auto *E = dyn_cast<SCEVConstant>(Expr)) Expanded = Plan.getOrAddLiveIn(E->getValue()); @@ -50,7 +48,6 @@ VPValue *vputils::getOrCreateVPValueForSCEVExpr(VPlan &Plan, const SCEV *Expr) { Plan.getEntry()->appendRecipe(Expanded->getDefiningRecipe()); } } - Plan.addSCEVExpansion(Expr, Expanded); return Expanded; } diff --git a/llvm/test/CodeGen/AArch64/arm64-copy-phys-zero-reg.mir b/llvm/test/CodeGen/AArch64/arm64-copy-phys-zero-reg.mir index f34d3ed..6b2a31b 100644 --- a/llvm/test/CodeGen/AArch64/arm64-copy-phys-zero-reg.mir +++ b/llvm/test/CodeGen/AArch64/arm64-copy-phys-zero-reg.mir @@ -35,7 +35,7 @@ body: | ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-LABEL: name: f0 ; CHECK-NOZCZ-GPR32-ZCZ-GPR64: liveins: $x0, $lr ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: {{ $}} - ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: $w0 = ORRWrr $wzr, $wzr + ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: $x0 = MOVZXi 0, 0 ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0 ; ; CHECK-ZCZ-GPR32-ZCZ-GPR64-LABEL: name: f0 diff --git a/llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing-gpr.ll b/llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing-gpr.ll index dc64306..0f284aa 100644 --- a/llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing-gpr.ll +++ b/llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing-gpr.ll @@ -1,41 +1,44 @@ -; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s -check-prefixes=ALL,NOZCZ-GPR +; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s -check-prefixes=ALL,NOZCZ-GPR32-NOZCZ-GPR64 ; RUN: llc < %s -mtriple=aarch64-linux-gnu -mattr=+zcz-gpr32 | FileCheck %s -check-prefixes=ALL,ZCZ-GPR32 -; RUN: llc < %s -mtriple=aarch64-linux-gnu -mattr=+zcz-gpr64 | FileCheck %s -check-prefixes=ALL,ZCZ-GPR64 -; RUN: llc < %s -mtriple=arm64-apple-macosx -mcpu=generic | FileCheck %s -check-prefixes=ALL,NOZCZ-GPR +; RUN: llc < %s -mtriple=aarch64-linux-gnu -mattr=+zcz-gpr64 | FileCheck %s -check-prefixes=ALL,NOZCZ-GPR32-ZCZ-GPR64 +; RUN: llc < %s -mtriple=arm64-apple-macosx -mcpu=generic | FileCheck %s -check-prefixes=ALL,NOZCZ-GPR32-NOZCZ-GPR64 ; RUN: llc < %s -mtriple=arm64-apple-ios -mcpu=cyclone | FileCheck %s -check-prefixes=ALL,ZCZ-GPR32,ZCZ-GPR64 ; RUN: llc < %s -mtriple=arm64-apple-macosx -mcpu=apple-m1 | FileCheck %s -check-prefixes=ALL,ZCZ-GPR32,ZCZ-GPR64 -; RUN: llc < %s -mtriple=aarch64-linux-gnu -mcpu=exynos-m3 | FileCheck %s -check-prefixes=ALL,NOZCZ-GPR +; RUN: llc < %s -mtriple=aarch64-linux-gnu -mcpu=exynos-m3 | FileCheck %s -check-prefixes=ALL,NOZCZ-GPR32-NOZCZ-GPR64 ; RUN: llc < %s -mtriple=aarch64-linux-gnu -mcpu=kryo | FileCheck %s -check-prefixes=ALL,ZCZ-GPR32,ZCZ-GPR64 ; RUN: llc < %s -mtriple=aarch64-linux-gnu -mcpu=falkor | FileCheck %s -check-prefixes=ALL,ZCZ-GPR32,ZCZ-GPR64 define i8 @ti8() { entry: ; ALL-LABEL: ti8: -; NOZCZ-GPR: mov w0, wzr +; NOZCZ-GPR32-NOZCZ-GPR64: mov w0, wzr ; ZCZ-GPR32: mov w0, #0 +; NOZCZ-GPR32-ZCZ-GPR64: mov x0, #0 ret i8 0 } define i16 @ti16() { entry: ; ALL-LABEL: ti16: -; NOZCZ-GPR: mov w0, wzr +; NOZCZ-GPR32-NOZCZ-GPR64: mov w0, wzr ; ZCZ-GPR32: mov w0, #0 +; NOZCZ-GPR32-ZCZ-GPR64: mov x0, #0 ret i16 0 } define i32 @ti32() { entry: ; ALL-LABEL: ti32: -; NOZCZ-GPR: mov w0, wzr +; NOZCZ-GPR32-NOZCZ-GPR64: mov w0, wzr ; ZCZ-GPR32: mov w0, #0 +; NOZCZ-GPR32-ZCZ-GPR64: mov x0, #0 ret i32 0 } define i64 @ti64() { entry: ; ALL-LABEL: ti64: -; NOZCZ-GPR: mov x0, xzr +; NOZCZ-GPR32-NOZCZ-GPR64 mov x0, xzr ; ZCZ-GPR64: mov x0, #0 ret i64 0 } diff --git a/llvm/test/CodeGen/DirectX/legalize-module-flags.ll b/llvm/test/CodeGen/DirectX/legalize-module-flags.ll index 6c29dea..044bd91 100644 --- a/llvm/test/CodeGen/DirectX/legalize-module-flags.ll +++ b/llvm/test/CodeGen/DirectX/legalize-module-flags.ll @@ -1,4 +1,4 @@ -; RUN: opt -S -dxil-prepare -mtriple=dxil-unknown-shadermodel6.0-compute %s | FileCheck %s +; RUN: opt -S -dxil-translate-metadata -mtriple=dxil-unknown-shadermodel6.0-compute %s | FileCheck %s ; Make sure behavior flag > 6 is fixed. ; CHECK: !{i32 2, !"frame-pointer", i32 2} diff --git a/llvm/test/CodeGen/DirectX/legalize-module-flags2.ll b/llvm/test/CodeGen/DirectX/legalize-module-flags2.ll index 244ec8d..b8a60a8 100644 --- a/llvm/test/CodeGen/DirectX/legalize-module-flags2.ll +++ b/llvm/test/CodeGen/DirectX/legalize-module-flags2.ll @@ -1,4 +1,4 @@ -; RUN: opt -S -dxil-prepare -mtriple=dxil-unknown-shadermodel6.0-library %s | FileCheck %s +; RUN: opt -S -dxil-translate-metadata -mtriple=dxil-unknown-shadermodel6.0-library %s | FileCheck %s ; CHECK: define void @main() ; Make sure behavior flag > 6 is fixed. diff --git a/llvm/test/CodeGen/DirectX/llc-pipeline.ll b/llvm/test/CodeGen/DirectX/llc-pipeline.ll index 13c2539..d265826 100644 --- a/llvm/test/CodeGen/DirectX/llc-pipeline.ll +++ b/llvm/test/CodeGen/DirectX/llc-pipeline.ll @@ -40,8 +40,8 @@ ; CHECK-NEXT: DXIL Resources Analysis ; CHECK-NEXT: DXIL Module Metadata analysis ; CHECK-NEXT: DXIL Shader Flag Analysis -; CHECK-NEXT: DXIL Translate Metadata ; CHECK-NEXT: DXIL Root Signature Analysis +; CHECK-NEXT: DXIL Translate Metadata ; CHECK-NEXT: DXIL Post Optimization Validation ; CHECK-NEXT: DXIL Op Lowering ; CHECK-NEXT: DXIL Prepare Module diff --git a/llvm/test/CodeGen/DirectX/metadata-stripping.ll b/llvm/test/CodeGen/DirectX/metadata-stripping.ll index eb939ba..531ab6c 100644 --- a/llvm/test/CodeGen/DirectX/metadata-stripping.ll +++ b/llvm/test/CodeGen/DirectX/metadata-stripping.ll @@ -1,4 +1,4 @@ -; RUN: opt -S --dxil-prepare %s | FileCheck %s +; RUN: opt -S --dxil-translate-metadata %s | FileCheck %s ; Test that only metadata nodes that are valid in DXIL are allowed through diff --git a/llvm/test/CodeGen/DirectX/strip-llvm-errno-tbaa.ll b/llvm/test/CodeGen/DirectX/strip-llvm-errno-tbaa.ll index 9190d03..2c4140d 100644 --- a/llvm/test/CodeGen/DirectX/strip-llvm-errno-tbaa.ll +++ b/llvm/test/CodeGen/DirectX/strip-llvm-errno-tbaa.ll @@ -1,6 +1,6 @@ -; RUN: opt -S -dxil-prepare < %s | FileCheck %s +; RUN: opt -S -dxil-translate-metadata < %s | FileCheck %s -; Ensures that dxil-prepare will remove the llvm.errno.tbaa metadata +; Ensures that dxil-translate-metadata will remove the llvm.errno.tbaa metadata target triple = "dxil-unknown-shadermodel6.0-compute" @@ -10,7 +10,6 @@ entry: } ; CHECK-NOT: !llvm.errno.tbaa -; CHECK-NOT: {{^!}} !llvm.errno.tbaa = !{!0} diff --git a/llvm/test/CodeGen/DirectX/strip-rootsignatures.ll b/llvm/test/CodeGen/DirectX/strip-rootsignatures.ll index 3ac617a..daf20bf 100644 --- a/llvm/test/CodeGen/DirectX/strip-rootsignatures.ll +++ b/llvm/test/CodeGen/DirectX/strip-rootsignatures.ll @@ -1,6 +1,6 @@ -; RUN: opt -S -dxil-prepare < %s | FileCheck %s +; RUN: opt -S -dxil-translate-metadata < %s | FileCheck %s -; Ensures that dxil-prepare will remove the dx.rootsignatures metadata +; Ensures that dxil-translate-metadata will remove the dx.rootsignatures metadata target triple = "dxil-unknown-shadermodel6.0-compute" @@ -10,7 +10,6 @@ entry: } ; CHECK-NOT: !dx.rootsignatures -; CHECK-NOT: {{^!}} !dx.rootsignatures = !{!2} ; list of function/root signature pairs !2 = !{ ptr @main, !3, i32 2 } ; function, root signature diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/br1.ll b/llvm/test/CodeGen/Mips/Fast-ISel/br1.ll index b5bdf84..9630dab 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/br1.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/br1.ll @@ -31,4 +31,4 @@ if.end: ; preds = %entry, %if.then } -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/loadstore2.ll b/llvm/test/CodeGen/Mips/Fast-ISel/loadstore2.ll index a5c1cec0..d3d2e8b 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/loadstore2.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/loadstore2.ll @@ -80,6 +80,6 @@ entry: ret void } -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll b/llvm/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll index bc6f2c5..e685465 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll @@ -17,5 +17,5 @@ entry: } -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/logopm.ll b/llvm/test/CodeGen/Mips/Fast-ISel/logopm.ll index 90db1fd..f3b902b 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/logopm.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/logopm.ll @@ -590,8 +590,8 @@ entry: ret void } -attributes #0 = { noinline nounwind "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { noinline nounwind "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } attributes #2 = { nounwind } !llvm.module.flags = !{!0} diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll b/llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll index d1a0574..eca0d16 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll @@ -51,4 +51,4 @@ entry: ret void } -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll b/llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll index ee174dd..33b4ef8 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll @@ -63,6 +63,6 @@ entry: ret void } -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/beqzc.ll b/llvm/test/CodeGen/Mips/beqzc.ll index 28f3f8c..42eb392 100644 --- a/llvm/test/CodeGen/Mips/beqzc.ll +++ b/llvm/test/CodeGen/Mips/beqzc.ll @@ -14,7 +14,7 @@ entry: ret i32 0 } -attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } +attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } diff --git a/llvm/test/CodeGen/Mips/beqzc1.ll b/llvm/test/CodeGen/Mips/beqzc1.ll index 915f34e..01bb5f1 100644 --- a/llvm/test/CodeGen/Mips/beqzc1.ll +++ b/llvm/test/CodeGen/Mips/beqzc1.ll @@ -19,6 +19,6 @@ if.end: ; preds = %if.then, %entry ret i32 0 } -attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } +attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } diff --git a/llvm/test/CodeGen/Mips/brsize3.ll b/llvm/test/CodeGen/Mips/brsize3.ll index 1aea201..20aab184 100644 --- a/llvm/test/CodeGen/Mips/brsize3.ll +++ b/llvm/test/CodeGen/Mips/brsize3.ll @@ -33,7 +33,7 @@ x: ; preds = %x, %entry } -attributes #0 = { noreturn nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } +attributes #0 = { noreturn nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } attributes #1 = { nounwind } !1 = !{i32 45} diff --git a/llvm/test/CodeGen/Mips/brsize3a.ll b/llvm/test/CodeGen/Mips/brsize3a.ll index de866f2..b1ebbd8 100644 --- a/llvm/test/CodeGen/Mips/brsize3a.ll +++ b/llvm/test/CodeGen/Mips/brsize3a.ll @@ -20,7 +20,7 @@ x: ; preds = %x, %entry } -attributes #0 = { noreturn nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } +attributes #0 = { noreturn nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } attributes #1 = { nounwind } !1 = !{i32 45} diff --git a/llvm/test/CodeGen/Mips/ci2.ll b/llvm/test/CodeGen/Mips/ci2.ll index a949729..4901d8d 100644 --- a/llvm/test/CodeGen/Mips/ci2.ll +++ b/llvm/test/CodeGen/Mips/ci2.ll @@ -33,7 +33,7 @@ if.end: ; preds = %if.else, %if.then ; constisle .4byte 305419896 # 0x12345678 } -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } attributes #1 = { nounwind } !1 = !{i32 103} diff --git a/llvm/test/CodeGen/Mips/cmplarge.ll b/llvm/test/CodeGen/Mips/cmplarge.ll index db7f37a..bfb6080 100644 --- a/llvm/test/CodeGen/Mips/cmplarge.ll +++ b/llvm/test/CodeGen/Mips/cmplarge.ll @@ -33,6 +33,6 @@ for.end: ; preds = %for.body, %entry ; cmp16: .end getSubImagesLuma declare i32 @iClip3(...) #1 -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } attributes #2 = { nounwind } diff --git a/llvm/test/CodeGen/Mips/const1.ll b/llvm/test/CodeGen/Mips/const1.ll index 750912d..7915d66 100644 --- a/llvm/test/CodeGen/Mips/const1.ll +++ b/llvm/test/CodeGen/Mips/const1.ll @@ -28,7 +28,7 @@ entry: ; CHECK: .4byte 262991277 } -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } !llvm.ident = !{!0} diff --git a/llvm/test/CodeGen/Mips/const4a.ll b/llvm/test/CodeGen/Mips/const4a.ll index 245abbf..e88ffd3 100644 --- a/llvm/test/CodeGen/Mips/const4a.ll +++ b/llvm/test/CodeGen/Mips/const4a.ll @@ -172,8 +172,8 @@ declare void @goo(...) #1 declare void @hoo(...) #1 -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } -attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } +attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } !llvm.ident = !{!0} diff --git a/llvm/test/CodeGen/Mips/const6.ll b/llvm/test/CodeGen/Mips/const6.ll index f40eeef..480a958 100644 --- a/llvm/test/CodeGen/Mips/const6.ll +++ b/llvm/test/CodeGen/Mips/const6.ll @@ -154,8 +154,8 @@ entry: declare void @hoo(...) #1 -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } -attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } +attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } !llvm.ident = !{!0} diff --git a/llvm/test/CodeGen/Mips/const6a.ll b/llvm/test/CodeGen/Mips/const6a.ll index 720edd3a..eb62e27 100644 --- a/llvm/test/CodeGen/Mips/const6a.ll +++ b/llvm/test/CodeGen/Mips/const6a.ll @@ -23,7 +23,7 @@ entry: ret void } -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } attributes #1 = { nounwind } !1 = !{i32 121} diff --git a/llvm/test/CodeGen/Mips/ctlz.ll b/llvm/test/CodeGen/Mips/ctlz.ll index 3cc1569..49eb36f 100644 --- a/llvm/test/CodeGen/Mips/ctlz.ll +++ b/llvm/test/CodeGen/Mips/ctlz.ll @@ -22,6 +22,6 @@ declare i32 @llvm.ctlz.i32(i32, i1) #1 -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } attributes #1 = { nounwind readnone } diff --git a/llvm/test/CodeGen/Mips/delay-slot-fill-forward.ll b/llvm/test/CodeGen/Mips/delay-slot-fill-forward.ll index 7c41641..43fd36b 100644 --- a/llvm/test/CodeGen/Mips/delay-slot-fill-forward.ll +++ b/llvm/test/CodeGen/Mips/delay-slot-fill-forward.ll @@ -161,7 +161,7 @@ if.end461: ; preds = %if.end436, %for.bod ret void } -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="mips32r2" "target-features"="+mips32r2,+nooddspreg,+fpxx" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="mips32r2" "target-features"="+mips32r2,+nooddspreg,+fpxx" "use-soft-float"="false" } attributes #1 = { nounwind } !llvm.ident = !{!0} diff --git a/llvm/test/CodeGen/Mips/f16abs.ll b/llvm/test/CodeGen/Mips/f16abs.ll index 23bf402..242d8ff 100644 --- a/llvm/test/CodeGen/Mips/f16abs.ll +++ b/llvm/test/CodeGen/Mips/f16abs.ll @@ -29,8 +29,8 @@ declare double @fabs(double) #1 declare float @fabsf(float) #1 -attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } -attributes #1 = { nounwind optsize readnone "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } +attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } +attributes #1 = { nounwind optsize readnone "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } attributes #2 = { nounwind optsize readnone } diff --git a/llvm/test/CodeGen/Mips/fp16instrinsmc.ll b/llvm/test/CodeGen/Mips/fp16instrinsmc.ll index 6c29c08..1582605 100644 --- a/llvm/test/CodeGen/Mips/fp16instrinsmc.ll +++ b/llvm/test/CodeGen/Mips/fp16instrinsmc.ll @@ -385,7 +385,7 @@ entry: ; Function Attrs: nounwind declare double @exp2(double) #0 -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind readnone "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } +attributes #1 = { nounwind readnone "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } attributes #2 = { nounwind readnone } attributes #3 = { nounwind } diff --git a/llvm/test/CodeGen/Mips/fpneeded.ll b/llvm/test/CodeGen/Mips/fpneeded.ll index cc82f81..babfcad 100644 --- a/llvm/test/CodeGen/Mips/fpneeded.ll +++ b/llvm/test/CodeGen/Mips/fpneeded.ll @@ -131,7 +131,7 @@ entry: ; 32: .set reorder ; 32: .end foo3 -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } define void @vv() #0 { entry: diff --git a/llvm/test/CodeGen/Mips/fpnotneeded.ll b/llvm/test/CodeGen/Mips/fpnotneeded.ll index 761ef30..2b98f7e 100644 --- a/llvm/test/CodeGen/Mips/fpnotneeded.ll +++ b/llvm/test/CodeGen/Mips/fpnotneeded.ll @@ -61,7 +61,7 @@ entry: ; cisle: .end foo -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } define float @fv() #0 { diff --git a/llvm/test/CodeGen/Mips/hf16call32.ll b/llvm/test/CodeGen/Mips/hf16call32.ll index e187b76..33353b6 100644 --- a/llvm/test/CodeGen/Mips/hf16call32.ll +++ b/llvm/test/CodeGen/Mips/hf16call32.ll @@ -1026,5 +1026,5 @@ declare { double, double } @dc_sf(float) #1 ; stel: jr $18 ; stel: .end __call_stub_fp_dc_sf -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/hf16call32_body.ll b/llvm/test/CodeGen/Mips/hf16call32_body.ll index 3bcb6f6..2eea4c3 100644 --- a/llvm/test/CodeGen/Mips/hf16call32_body.ll +++ b/llvm/test/CodeGen/Mips/hf16call32_body.ll @@ -303,4 +303,4 @@ entry: ; stel: $__fn_local_sf_df_df = sf_df_df ; stel: .end __fn_stub_sf_df_df -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/hfptrcall.ll b/llvm/test/CodeGen/Mips/hfptrcall.ll index 920c694..2babc67 100644 --- a/llvm/test/CodeGen/Mips/hfptrcall.ll +++ b/llvm/test/CodeGen/Mips/hfptrcall.ll @@ -118,8 +118,8 @@ entry: declare i32 @printf(ptr, ...) #1 -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/l3mc.ll b/llvm/test/CodeGen/Mips/l3mc.ll index 440da3a..dc68eaf 100644 --- a/llvm/test/CodeGen/Mips/l3mc.ll +++ b/llvm/test/CodeGen/Mips/l3mc.ll @@ -99,7 +99,7 @@ entry: ret void } -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } ; __call_stub_fp___fixunsdfsi: __call_stub_fp___fixunsdfsi: ; __call_stub_fp___floatdidf: __call_stub_fp___floatdidf: diff --git a/llvm/test/CodeGen/Mips/lcb2.ll b/llvm/test/CodeGen/Mips/lcb2.ll index 036de38..79f4b43 100644 --- a/llvm/test/CodeGen/Mips/lcb2.ll +++ b/llvm/test/CodeGen/Mips/lcb2.ll @@ -115,7 +115,7 @@ if.end: ; preds = %if.then, %entry ; lcb: .end btz ; lcbn: .end btz -attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } attributes #1 = { nounwind } !llvm.ident = !{!0} diff --git a/llvm/test/CodeGen/Mips/lcb3c.ll b/llvm/test/CodeGen/Mips/lcb3c.ll index 40912f3..dd88924 100644 --- a/llvm/test/CodeGen/Mips/lcb3c.ll +++ b/llvm/test/CodeGen/Mips/lcb3c.ll @@ -51,7 +51,7 @@ if.end: ; preds = %if.else, %if.then ; lcb: jal $BB1_2 # branch ; lcb: $BB1_1: # %if.then -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } attributes #1 = { nounwind } diff --git a/llvm/test/CodeGen/Mips/lcb4a.ll b/llvm/test/CodeGen/Mips/lcb4a.ll index a0258b1..ad843bb 100644 --- a/llvm/test/CodeGen/Mips/lcb4a.ll +++ b/llvm/test/CodeGen/Mips/lcb4a.ll @@ -55,7 +55,7 @@ if.end: ; preds = %if.else, %if.then ; ci: nop ; ci: $BB1_1: # %if.else -attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } attributes #1 = { nounwind } diff --git a/llvm/test/CodeGen/Mips/lcb5.ll b/llvm/test/CodeGen/Mips/lcb5.ll index 22baeba..0d479ff 100644 --- a/llvm/test/CodeGen/Mips/lcb5.ll +++ b/llvm/test/CodeGen/Mips/lcb5.ll @@ -216,7 +216,7 @@ if.end: ; preds = %if.then, %entry ; ci: .p2align 2 ; ci: .end z4 -attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } attributes #1 = { nounwind } diff --git a/llvm/test/CodeGen/Mips/mbrsize4a.ll b/llvm/test/CodeGen/Mips/mbrsize4a.ll index b8d2e2d..e6c620a 100644 --- a/llvm/test/CodeGen/Mips/mbrsize4a.ll +++ b/llvm/test/CodeGen/Mips/mbrsize4a.ll @@ -30,8 +30,8 @@ declare i32 @foo(...) #1 declare i32 @printf(ptr, ...) #1 -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } +attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } attributes #2 = { nounwind } !1 = !{i32 68} diff --git a/llvm/test/CodeGen/Mips/micromips-attr.ll b/llvm/test/CodeGen/Mips/micromips-attr.ll index 8e70cc6..1915f3b 100644 --- a/llvm/test/CodeGen/Mips/micromips-attr.ll +++ b/llvm/test/CodeGen/Mips/micromips-attr.ll @@ -24,7 +24,7 @@ attributes #0 = { "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" - "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" + "stack-protector-buffer-size"="8" "use-soft-float"="false" } @@ -34,6 +34,6 @@ attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" - "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" + "stack-protector-buffer-size"="8" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/mips16-hf-attr-2.ll b/llvm/test/CodeGen/Mips/mips16-hf-attr-2.ll index 80294b5..eaa39e9 100644 --- a/llvm/test/CodeGen/Mips/mips16-hf-attr-2.ll +++ b/llvm/test/CodeGen/Mips/mips16-hf-attr-2.ll @@ -28,18 +28,18 @@ attributes #0 = { "less-precise-fpmad"="false" "frame-pointer"="all" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" - "unsafe-fp-math"="false" "use-soft-float"="false" + "use-soft-float"="false" } attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" - "unsafe-fp-math"="false" "use-soft-float"="true" + "use-soft-float"="true" } attributes #2 = { "less-precise-fpmad"="false" "frame-pointer"="all" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" - "unsafe-fp-math"="false" "use-soft-float"="true" + "use-soft-float"="true" } diff --git a/llvm/test/CodeGen/Mips/mips16-hf-attr.ll b/llvm/test/CodeGen/Mips/mips16-hf-attr.ll index c8af712..cafa2d5 100644 --- a/llvm/test/CodeGen/Mips/mips16-hf-attr.ll +++ b/llvm/test/CodeGen/Mips/mips16-hf-attr.ll @@ -28,18 +28,18 @@ attributes #0 = { "less-precise-fpmad"="false" "frame-pointer"="all" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" - "unsafe-fp-math"="false" "use-soft-float"="false" + "use-soft-float"="false" } attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" - "unsafe-fp-math"="false" "use-soft-float"="true" + "use-soft-float"="true" } attributes #2 = { "less-precise-fpmad"="false" "frame-pointer"="all" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" - "unsafe-fp-math"="false" "use-soft-float"="true" + "use-soft-float"="true" } diff --git a/llvm/test/CodeGen/Mips/mips16_32_1.ll b/llvm/test/CodeGen/Mips/mips16_32_1.ll index 0d02022..963fb58 100644 --- a/llvm/test/CodeGen/Mips/mips16_32_1.ll +++ b/llvm/test/CodeGen/Mips/mips16_32_1.ll @@ -10,4 +10,4 @@ entry: ; CHECK: .ent foo ; CHECK: jrc $ra ; CHECK: .end foo -attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/mips16_32_10.ll b/llvm/test/CodeGen/Mips/mips16_32_10.ll index 86378ff..e0d6859 100644 --- a/llvm/test/CodeGen/Mips/mips16_32_10.ll +++ b/llvm/test/CodeGen/Mips/mips16_32_10.ll @@ -53,6 +53,6 @@ entry: -attributes #0 = { nounwind "less-precise-fpmad"="false" "nomips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #2 = { nounwind "less-precise-fpmad"="false" "nomips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "nomips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } +attributes #2 = { nounwind "less-precise-fpmad"="false" "nomips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/mips16_32_3.ll b/llvm/test/CodeGen/Mips/mips16_32_3.ll index ee33abc..dc2fe29 100644 --- a/llvm/test/CodeGen/Mips/mips16_32_3.ll +++ b/llvm/test/CodeGen/Mips/mips16_32_3.ll @@ -62,6 +62,6 @@ entry: ; 32: .set reorder ; 32: .end main -attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #2 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "use-soft-float"="false" } +attributes #2 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/mips16_32_4.ll b/llvm/test/CodeGen/Mips/mips16_32_4.ll index da926342..2fed74d 100644 --- a/llvm/test/CodeGen/Mips/mips16_32_4.ll +++ b/llvm/test/CodeGen/Mips/mips16_32_4.ll @@ -56,6 +56,6 @@ entry: ; 32: .end main -attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #2 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "use-soft-float"="false" } +attributes #2 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/mips16_32_5.ll b/llvm/test/CodeGen/Mips/mips16_32_5.ll index 6692460..2bbe778 100644 --- a/llvm/test/CodeGen/Mips/mips16_32_5.ll +++ b/llvm/test/CodeGen/Mips/mips16_32_5.ll @@ -73,6 +73,6 @@ entry: -attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #2 = { nounwind "less-precise-fpmad"="false" "nomips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "use-soft-float"="false" } +attributes #2 = { nounwind "less-precise-fpmad"="false" "nomips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/mips16_32_6.ll b/llvm/test/CodeGen/Mips/mips16_32_6.ll index 5a464a2..0503b3f 100644 --- a/llvm/test/CodeGen/Mips/mips16_32_6.ll +++ b/llvm/test/CodeGen/Mips/mips16_32_6.ll @@ -80,6 +80,6 @@ entry: -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #2 = { nounwind "less-precise-fpmad"="false" "nomips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "use-soft-float"="false" } +attributes #2 = { nounwind "less-precise-fpmad"="false" "nomips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/mips16_32_7.ll b/llvm/test/CodeGen/Mips/mips16_32_7.ll index 236f791..2b2dd8b 100644 --- a/llvm/test/CodeGen/Mips/mips16_32_7.ll +++ b/llvm/test/CodeGen/Mips/mips16_32_7.ll @@ -68,6 +68,6 @@ entry: -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #2 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "use-soft-float"="false" } +attributes #2 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/mips16_32_8.ll b/llvm/test/CodeGen/Mips/mips16_32_8.ll index 5c0cd32..1aff91c 100644 --- a/llvm/test/CodeGen/Mips/mips16_32_8.ll +++ b/llvm/test/CodeGen/Mips/mips16_32_8.ll @@ -67,7 +67,7 @@ entry: ; 32: .set reorder ; 32: .end main -attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #2 = { "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #3 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "use-soft-float"="false" } +attributes #2 = { "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } +attributes #3 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/mips16_32_9.ll b/llvm/test/CodeGen/Mips/mips16_32_9.ll index 609f054..82d7727 100644 --- a/llvm/test/CodeGen/Mips/mips16_32_9.ll +++ b/llvm/test/CodeGen/Mips/mips16_32_9.ll @@ -44,6 +44,6 @@ entry: -attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #2 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } +attributes #2 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/nomips16.ll b/llvm/test/CodeGen/Mips/nomips16.ll index 62564f9..6b51eb9 100644 --- a/llvm/test/CodeGen/Mips/nomips16.ll +++ b/llvm/test/CodeGen/Mips/nomips16.ll @@ -33,6 +33,6 @@ entry: ; CHECK: .end nofoo -attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "stack-protector-buffer-size"="8" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/pbqp-reserved-physreg.ll b/llvm/test/CodeGen/Mips/pbqp-reserved-physreg.ll index 63a730c..a8eab07 100644 --- a/llvm/test/CodeGen/Mips/pbqp-reserved-physreg.ll +++ b/llvm/test/CodeGen/Mips/pbqp-reserved-physreg.ll @@ -31,5 +31,5 @@ bb35: ; preds = %bb unreachable } -attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/powif64_16.ll b/llvm/test/CodeGen/Mips/powif64_16.ll index 3443b62..914ef94 100644 --- a/llvm/test/CodeGen/Mips/powif64_16.ll +++ b/llvm/test/CodeGen/Mips/powif64_16.ll @@ -17,7 +17,7 @@ define double @foo_pow_f64(double %y, i32 %p) { ret double %1 } -attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } +attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } attributes #1 = { nounwind readonly } !0 = !{!"double", !1} diff --git a/llvm/test/CodeGen/Mips/s2rem.ll b/llvm/test/CodeGen/Mips/s2rem.ll index fdf06ce..5d324cb 100644 --- a/llvm/test/CodeGen/Mips/s2rem.ll +++ b/llvm/test/CodeGen/Mips/s2rem.ll @@ -86,7 +86,7 @@ entry: declare void @vf(float) #1 -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } +attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/sel1c.ll b/llvm/test/CodeGen/Mips/sel1c.ll index 071f988..2aaf56d 100644 --- a/llvm/test/CodeGen/Mips/sel1c.ll +++ b/llvm/test/CodeGen/Mips/sel1c.ll @@ -16,6 +16,6 @@ entry: ; cond-b-short: bteqz $BB0_{{[0-9]+}} # 16 bit inst } -attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } +attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } diff --git a/llvm/test/CodeGen/Mips/sel2c.ll b/llvm/test/CodeGen/Mips/sel2c.ll index 0c3b957..44de4ac9 100644 --- a/llvm/test/CodeGen/Mips/sel2c.ll +++ b/llvm/test/CodeGen/Mips/sel2c.ll @@ -16,6 +16,6 @@ entry: ret void } -attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } +attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } diff --git a/llvm/test/CodeGen/Mips/simplebr.ll b/llvm/test/CodeGen/Mips/simplebr.ll index cfe547f..ae09d85 100644 --- a/llvm/test/CodeGen/Mips/simplebr.ll +++ b/llvm/test/CodeGen/Mips/simplebr.ll @@ -31,7 +31,7 @@ declare void @goo(...) #1 declare void @hoo(...) #1 -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } -attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } +attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="true" } diff --git a/llvm/test/CodeGen/Mips/sr1.ll b/llvm/test/CodeGen/Mips/sr1.ll index c6fa9fc..6c42d45 100644 --- a/llvm/test/CodeGen/Mips/sr1.ll +++ b/llvm/test/CodeGen/Mips/sr1.ll @@ -50,7 +50,7 @@ entry: declare float @xf() #1 -attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } +attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/tnaked.ll b/llvm/test/CodeGen/Mips/tnaked.ll index ac54f2f..287c009 100644 --- a/llvm/test/CodeGen/Mips/tnaked.ll +++ b/llvm/test/CodeGen/Mips/tnaked.ll @@ -25,5 +25,5 @@ entry: ; CHECK: .fmask 0x00000000,0 ; CHECK: addiu $sp, $sp, -8 -attributes #0 = { naked noinline nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { naked noinline nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/RISCV/rv32p.ll b/llvm/test/CodeGen/RISCV/rv32p.ll new file mode 100644 index 0000000..4eee880a --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rv32p.ll @@ -0,0 +1,709 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+experimental-p -verify-machineinstrs < %s \ +; RUN: | FileCheck %s + +declare i32 @llvm.ctlz.i32(i32, i1) + +define i32 @ctlz_i32(i32 %a) nounwind { +; CHECK-LABEL: ctlz_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: clz a0, a0 +; CHECK-NEXT: ret + %1 = call i32 @llvm.ctlz.i32(i32 %a, i1 false) + ret i32 %1 +} + +declare i64 @llvm.ctlz.i64(i64, i1) + +define i64 @ctlz_i64(i64 %a) nounwind { +; CHECK-LABEL: ctlz_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: bnez a1, .LBB1_2 +; CHECK-NEXT: # %bb.1: +; CHECK-NEXT: clz a0, a0 +; CHECK-NEXT: addi a0, a0, 32 +; CHECK-NEXT: li a1, 0 +; CHECK-NEXT: ret +; CHECK-NEXT: .LBB1_2: +; CHECK-NEXT: clz a0, a1 +; CHECK-NEXT: li a1, 0 +; CHECK-NEXT: ret + %1 = call i64 @llvm.ctlz.i64(i64 %a, i1 false) + ret i64 %1 +} + +declare i32 @llvm.cttz.i32(i32, i1) + +define i32 @cttz_i32(i32 %a) nounwind { +; CHECK-LABEL: cttz_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: beqz a0, .LBB2_2 +; CHECK-NEXT: # %bb.1: # %cond.false +; CHECK-NEXT: addi a1, a0, -1 +; CHECK-NEXT: not a0, a0 +; CHECK-NEXT: and a0, a0, a1 +; CHECK-NEXT: clz a0, a0 +; CHECK-NEXT: li a1, 32 +; CHECK-NEXT: sub a0, a1, a0 +; CHECK-NEXT: ret +; CHECK-NEXT: .LBB2_2: +; CHECK-NEXT: li a0, 32 +; CHECK-NEXT: ret + %1 = call i32 @llvm.cttz.i32(i32 %a, i1 false) + ret i32 %1 +} + +declare i64 @llvm.cttz.i64(i64, i1) + +define i64 @cttz_i64(i64 %a) nounwind { +; CHECK-LABEL: cttz_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: or a2, a0, a1 +; CHECK-NEXT: beqz a2, .LBB3_3 +; CHECK-NEXT: # %bb.1: # %cond.false +; CHECK-NEXT: bnez a0, .LBB3_4 +; CHECK-NEXT: # %bb.2: # %cond.false +; CHECK-NEXT: addi a0, a1, -1 +; CHECK-NEXT: not a1, a1 +; CHECK-NEXT: and a0, a1, a0 +; CHECK-NEXT: clz a0, a0 +; CHECK-NEXT: li a1, 64 +; CHECK-NEXT: j .LBB3_5 +; CHECK-NEXT: .LBB3_3: +; CHECK-NEXT: li a1, 0 +; CHECK-NEXT: li a0, 64 +; CHECK-NEXT: ret +; CHECK-NEXT: .LBB3_4: +; CHECK-NEXT: addi a1, a0, -1 +; CHECK-NEXT: not a0, a0 +; CHECK-NEXT: and a0, a0, a1 +; CHECK-NEXT: clz a0, a0 +; CHECK-NEXT: li a1, 32 +; CHECK-NEXT: .LBB3_5: # %cond.false +; CHECK-NEXT: sub a0, a1, a0 +; CHECK-NEXT: li a1, 0 +; CHECK-NEXT: ret + %1 = call i64 @llvm.cttz.i64(i64 %a, i1 false) + ret i64 %1 +} + +define i32 @sextb_i32(i32 %a) nounwind { +; CHECK-LABEL: sextb_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: sext.b a0, a0 +; CHECK-NEXT: ret + %shl = shl i32 %a, 24 + %shr = ashr exact i32 %shl, 24 + ret i32 %shr +} + +define i64 @sextb_i64(i64 %a) nounwind { +; CHECK-LABEL: sextb_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: sext.b a0, a0 +; CHECK-NEXT: srai a1, a0, 31 +; CHECK-NEXT: ret + %shl = shl i64 %a, 56 + %shr = ashr exact i64 %shl, 56 + ret i64 %shr +} + +define i32 @sexth_i32(i32 %a) nounwind { +; CHECK-LABEL: sexth_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: sext.h a0, a0 +; CHECK-NEXT: ret + %shl = shl i32 %a, 16 + %shr = ashr exact i32 %shl, 16 + ret i32 %shr +} + +define i64 @sexth_i64(i64 %a) nounwind { +; CHECK-LABEL: sexth_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: sext.h a0, a0 +; CHECK-NEXT: srai a1, a0, 31 +; CHECK-NEXT: ret + %shl = shl i64 %a, 48 + %shr = ashr exact i64 %shl, 48 + ret i64 %shr +} + +define i32 @min_i32(i32 %a, i32 %b) nounwind { +; CHECK-LABEL: min_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: min a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp slt i32 %a, %b + %cond = select i1 %cmp, i32 %a, i32 %b + ret i32 %cond +} + +; As we are not matching directly i64 code patterns on RV32 some i64 patterns +; don't have yet any matching bit manipulation instructions on RV32. +; This test is presented here in case future expansions of the Bitmanip +; extensions introduce instructions suitable for this pattern. + +define i64 @min_i64(i64 %a, i64 %b) nounwind { +; CHECK-LABEL: min_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: beq a1, a3, .LBB9_2 +; CHECK-NEXT: # %bb.1: +; CHECK-NEXT: slt a4, a1, a3 +; CHECK-NEXT: beqz a4, .LBB9_3 +; CHECK-NEXT: j .LBB9_4 +; CHECK-NEXT: .LBB9_2: +; CHECK-NEXT: sltu a4, a0, a2 +; CHECK-NEXT: bnez a4, .LBB9_4 +; CHECK-NEXT: .LBB9_3: +; CHECK-NEXT: mv a0, a2 +; CHECK-NEXT: mv a1, a3 +; CHECK-NEXT: .LBB9_4: +; CHECK-NEXT: ret + %cmp = icmp slt i64 %a, %b + %cond = select i1 %cmp, i64 %a, i64 %b + ret i64 %cond +} + +define i32 @max_i32(i32 %a, i32 %b) nounwind { +; CHECK-LABEL: max_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: max a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp sgt i32 %a, %b + %cond = select i1 %cmp, i32 %a, i32 %b + ret i32 %cond +} + +; As we are not matching directly i64 code patterns on RV32 some i64 patterns +; don't have yet any matching bit manipulation instructions on RV32. +; This test is presented here in case future expansions of the Bitmanip +; extensions introduce instructions suitable for this pattern. + +define i64 @max_i64(i64 %a, i64 %b) nounwind { +; CHECK-LABEL: max_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: beq a1, a3, .LBB11_2 +; CHECK-NEXT: # %bb.1: +; CHECK-NEXT: slt a4, a3, a1 +; CHECK-NEXT: beqz a4, .LBB11_3 +; CHECK-NEXT: j .LBB11_4 +; CHECK-NEXT: .LBB11_2: +; CHECK-NEXT: sltu a4, a2, a0 +; CHECK-NEXT: bnez a4, .LBB11_4 +; CHECK-NEXT: .LBB11_3: +; CHECK-NEXT: mv a0, a2 +; CHECK-NEXT: mv a1, a3 +; CHECK-NEXT: .LBB11_4: +; CHECK-NEXT: ret + %cmp = icmp sgt i64 %a, %b + %cond = select i1 %cmp, i64 %a, i64 %b + ret i64 %cond +} + +define i32 @minu_i32(i32 %a, i32 %b) nounwind { +; CHECK-LABEL: minu_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: minu a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp ult i32 %a, %b + %cond = select i1 %cmp, i32 %a, i32 %b + ret i32 %cond +} + +; As we are not matching directly i64 code patterns on RV32 some i64 patterns +; don't have yet any matching bit manipulation instructions on RV32. +; This test is presented here in case future expansions of the Bitmanip +; extensions introduce instructions suitable for this pattern. + +define i64 @minu_i64(i64 %a, i64 %b) nounwind { +; CHECK-LABEL: minu_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: beq a1, a3, .LBB13_2 +; CHECK-NEXT: # %bb.1: +; CHECK-NEXT: sltu a4, a1, a3 +; CHECK-NEXT: beqz a4, .LBB13_3 +; CHECK-NEXT: j .LBB13_4 +; CHECK-NEXT: .LBB13_2: +; CHECK-NEXT: sltu a4, a0, a2 +; CHECK-NEXT: bnez a4, .LBB13_4 +; CHECK-NEXT: .LBB13_3: +; CHECK-NEXT: mv a0, a2 +; CHECK-NEXT: mv a1, a3 +; CHECK-NEXT: .LBB13_4: +; CHECK-NEXT: ret + %cmp = icmp ult i64 %a, %b + %cond = select i1 %cmp, i64 %a, i64 %b + ret i64 %cond +} + +define i32 @maxu_i32(i32 %a, i32 %b) nounwind { +; CHECK-LABEL: maxu_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: maxu a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp ugt i32 %a, %b + %cond = select i1 %cmp, i32 %a, i32 %b + ret i32 %cond +} + +; As we are not matching directly i64 code patterns on RV32 some i64 patterns +; don't have yet any matching bit manipulation instructions on RV32. +; This test is presented here in case future expansions of the Bitmanip +; extensions introduce instructions suitable for this pattern. + +define i64 @maxu_i64(i64 %a, i64 %b) nounwind { +; CHECK-LABEL: maxu_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: beq a1, a3, .LBB15_2 +; CHECK-NEXT: # %bb.1: +; CHECK-NEXT: sltu a4, a3, a1 +; CHECK-NEXT: beqz a4, .LBB15_3 +; CHECK-NEXT: j .LBB15_4 +; CHECK-NEXT: .LBB15_2: +; CHECK-NEXT: sltu a4, a2, a0 +; CHECK-NEXT: bnez a4, .LBB15_4 +; CHECK-NEXT: .LBB15_3: +; CHECK-NEXT: mv a0, a2 +; CHECK-NEXT: mv a1, a3 +; CHECK-NEXT: .LBB15_4: +; CHECK-NEXT: ret + %cmp = icmp ugt i64 %a, %b + %cond = select i1 %cmp, i64 %a, i64 %b + ret i64 %cond +} + +declare i32 @llvm.abs.i32(i32, i1 immarg) + +define i32 @abs_i32(i32 %x) { +; CHECK-LABEL: abs_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: abs a0, a0 +; CHECK-NEXT: ret + %abs = tail call i32 @llvm.abs.i32(i32 %x, i1 true) + ret i32 %abs +} + +declare i64 @llvm.abs.i64(i64, i1 immarg) + +define i64 @abs_i64(i64 %x) { +; CHECK-LABEL: abs_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: bgez a1, .LBB17_2 +; CHECK-NEXT: # %bb.1: +; CHECK-NEXT: snez a2, a0 +; CHECK-NEXT: neg a0, a0 +; CHECK-NEXT: neg a1, a1 +; CHECK-NEXT: sub a1, a1, a2 +; CHECK-NEXT: .LBB17_2: +; CHECK-NEXT: ret + %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true) + ret i64 %abs +} + +define i32 @zexth_i32(i32 %a) nounwind { +; CHECK-LABEL: zexth_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: slli a0, a0, 16 +; CHECK-NEXT: srli a0, a0, 16 +; CHECK-NEXT: ret + %and = and i32 %a, 65535 + ret i32 %and +} + +define i64 @zexth_i64(i64 %a) nounwind { +; CHECK-LABEL: zexth_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: slli a0, a0, 16 +; CHECK-NEXT: srli a0, a0, 16 +; CHECK-NEXT: li a1, 0 +; CHECK-NEXT: ret + %and = and i64 %a, 65535 + ret i64 %and +} + +declare i32 @llvm.bswap.i32(i32) + +define i32 @bswap_i32(i32 %a) nounwind { +; CHECK-LABEL: bswap_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: rev8 a0, a0 +; CHECK-NEXT: ret + %1 = tail call i32 @llvm.bswap.i32(i32 %a) + ret i32 %1 +} + +declare i64 @llvm.bswap.i64(i64) + +define i64 @bswap_i64(i64 %a) { +; CHECK-LABEL: bswap_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: rev8 a2, a1 +; CHECK-NEXT: rev8 a1, a0 +; CHECK-NEXT: mv a0, a2 +; CHECK-NEXT: ret + %1 = call i64 @llvm.bswap.i64(i64 %a) + ret i64 %1 +} + +define i32 @srai_slli(i16 signext %0) { +; CHECK-LABEL: srai_slli: +; CHECK: # %bb.0: +; CHECK-NEXT: slli a0, a0, 25 +; CHECK-NEXT: srai a0, a0, 31 +; CHECK-NEXT: ret + %2 = shl i16 %0, 9 + %sext = ashr i16 %2, 15 + %3 = sext i16 %sext to i32 + ret i32 %3 +} + +define i32 @srai_slli2(i16 signext %0) { +; CHECK-LABEL: srai_slli2: +; CHECK: # %bb.0: +; CHECK-NEXT: slli a0, a0, 25 +; CHECK-NEXT: srai a0, a0, 30 +; CHECK-NEXT: ret + %2 = shl i16 %0, 9 + %sext = ashr i16 %2, 14 + %3 = sext i16 %sext to i32 + ret i32 %3 +} +define i8 @sub_if_uge_i8(i8 %x, i8 %y) { +; CHECK-LABEL: sub_if_uge_i8: +; CHECK: # %bb.0: +; CHECK-NEXT: zext.b a2, a0 +; CHECK-NEXT: sub a0, a0, a1 +; CHECK-NEXT: zext.b a0, a0 +; CHECK-NEXT: minu a0, a2, a0 +; CHECK-NEXT: ret + %cmp = icmp ult i8 %x, %y + %select = select i1 %cmp, i8 0, i8 %y + %sub = sub nuw i8 %x, %select + ret i8 %sub +} + +define i16 @sub_if_uge_i16(i16 %x, i16 %y) { +; CHECK-LABEL: sub_if_uge_i16: +; CHECK: # %bb.0: +; CHECK-NEXT: lui a2, 16 +; CHECK-NEXT: sub a1, a0, a1 +; CHECK-NEXT: addi a2, a2, -1 +; CHECK-NEXT: and a0, a0, a2 +; CHECK-NEXT: and a1, a1, a2 +; CHECK-NEXT: minu a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp ult i16 %x, %y + %select = select i1 %cmp, i16 0, i16 %y + %sub = sub nuw i16 %x, %select + ret i16 %sub +} + +define i32 @sub_if_uge_i32(i32 %x, i32 %y) { +; CHECK-LABEL: sub_if_uge_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: sub a1, a0, a1 +; CHECK-NEXT: minu a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp ult i32 %x, %y + %select = select i1 %cmp, i32 0, i32 %y + %sub = sub nuw i32 %x, %select + ret i32 %sub +} + +define i64 @sub_if_uge_i64(i64 %x, i64 %y) { +; CHECK-LABEL: sub_if_uge_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: beq a1, a3, .LBB27_2 +; CHECK-NEXT: # %bb.1: +; CHECK-NEXT: sltu a4, a1, a3 +; CHECK-NEXT: j .LBB27_3 +; CHECK-NEXT: .LBB27_2: +; CHECK-NEXT: sltu a4, a0, a2 +; CHECK-NEXT: .LBB27_3: +; CHECK-NEXT: addi a4, a4, -1 +; CHECK-NEXT: and a3, a4, a3 +; CHECK-NEXT: and a2, a4, a2 +; CHECK-NEXT: sltu a4, a0, a2 +; CHECK-NEXT: sub a1, a1, a3 +; CHECK-NEXT: sub a1, a1, a4 +; CHECK-NEXT: sub a0, a0, a2 +; CHECK-NEXT: ret + %cmp = icmp ult i64 %x, %y + %select = select i1 %cmp, i64 0, i64 %y + %sub = sub nuw i64 %x, %select + ret i64 %sub +} + +define i128 @sub_if_uge_i128(i128 %x, i128 %y) { +; CHECK-LABEL: sub_if_uge_i128: +; CHECK: # %bb.0: +; CHECK-NEXT: lw a3, 4(a1) +; CHECK-NEXT: lw a4, 8(a1) +; CHECK-NEXT: lw a5, 12(a1) +; CHECK-NEXT: lw a6, 4(a2) +; CHECK-NEXT: lw t0, 12(a2) +; CHECK-NEXT: lw a7, 8(a2) +; CHECK-NEXT: beq a5, t0, .LBB28_2 +; CHECK-NEXT: # %bb.1: +; CHECK-NEXT: sltu t1, a5, t0 +; CHECK-NEXT: j .LBB28_3 +; CHECK-NEXT: .LBB28_2: +; CHECK-NEXT: sltu t1, a4, a7 +; CHECK-NEXT: .LBB28_3: +; CHECK-NEXT: lw a1, 0(a1) +; CHECK-NEXT: lw a2, 0(a2) +; CHECK-NEXT: beq a3, a6, .LBB28_5 +; CHECK-NEXT: # %bb.4: +; CHECK-NEXT: sltu t2, a3, a6 +; CHECK-NEXT: j .LBB28_6 +; CHECK-NEXT: .LBB28_5: +; CHECK-NEXT: sltu t2, a1, a2 +; CHECK-NEXT: .LBB28_6: +; CHECK-NEXT: xor t3, a5, t0 +; CHECK-NEXT: xor t4, a4, a7 +; CHECK-NEXT: or t3, t4, t3 +; CHECK-NEXT: beqz t3, .LBB28_8 +; CHECK-NEXT: # %bb.7: +; CHECK-NEXT: mv t2, t1 +; CHECK-NEXT: .LBB28_8: +; CHECK-NEXT: addi t3, t2, -1 +; CHECK-NEXT: and t2, t3, t0 +; CHECK-NEXT: and t0, t3, a2 +; CHECK-NEXT: and t1, t3, a6 +; CHECK-NEXT: sltu a2, a1, t0 +; CHECK-NEXT: and a7, t3, a7 +; CHECK-NEXT: mv a6, a2 +; CHECK-NEXT: beq a3, t1, .LBB28_10 +; CHECK-NEXT: # %bb.9: +; CHECK-NEXT: sltu a6, a3, t1 +; CHECK-NEXT: .LBB28_10: +; CHECK-NEXT: sub t3, a4, a7 +; CHECK-NEXT: sltu a4, a4, a7 +; CHECK-NEXT: sub a5, a5, t2 +; CHECK-NEXT: sub a3, a3, t1 +; CHECK-NEXT: sub a1, a1, t0 +; CHECK-NEXT: sltu a7, t3, a6 +; CHECK-NEXT: sub a5, a5, a4 +; CHECK-NEXT: sub a4, t3, a6 +; CHECK-NEXT: sub a3, a3, a2 +; CHECK-NEXT: sub a2, a5, a7 +; CHECK-NEXT: sw a1, 0(a0) +; CHECK-NEXT: sw a3, 4(a0) +; CHECK-NEXT: sw a4, 8(a0) +; CHECK-NEXT: sw a2, 12(a0) +; CHECK-NEXT: ret + %cmp = icmp ult i128 %x, %y + %select = select i1 %cmp, i128 0, i128 %y + %sub = sub nuw i128 %x, %select + ret i128 %sub +} + +define i32 @sub_if_uge_multiuse_select_i32(i32 %x, i32 %y) { +; CHECK-LABEL: sub_if_uge_multiuse_select_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: sltu a2, a0, a1 +; CHECK-NEXT: addi a2, a2, -1 +; CHECK-NEXT: and a1, a2, a1 +; CHECK-NEXT: sub a0, a0, a1 +; CHECK-NEXT: sll a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp ult i32 %x, %y + %select = select i1 %cmp, i32 0, i32 %y + %sub = sub nuw i32 %x, %select + %shl = shl i32 %sub, %select + ret i32 %shl +} + +define i32 @sub_if_uge_multiuse_cmp_i32(i32 %x, i32 %y) { +; CHECK-LABEL: sub_if_uge_multiuse_cmp_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: sub a2, a0, a1 +; CHECK-NEXT: minu a2, a0, a2 +; CHECK-NEXT: bltu a0, a1, .LBB30_2 +; CHECK-NEXT: # %bb.1: +; CHECK-NEXT: li a0, 4 +; CHECK-NEXT: sll a0, a2, a0 +; CHECK-NEXT: ret +; CHECK-NEXT: .LBB30_2: +; CHECK-NEXT: li a0, 2 +; CHECK-NEXT: sll a0, a2, a0 +; CHECK-NEXT: ret + %cmp = icmp ult i32 %x, %y + %select = select i1 %cmp, i32 0, i32 %y + %sub = sub nuw i32 %x, %select + %select2 = select i1 %cmp, i32 2, i32 4 + %shl = shl i32 %sub, %select2 + ret i32 %shl +} + +define i32 @sub_if_uge_multiuse_cmp_store_i32(i32 %x, i32 %y, ptr %z) { +; CHECK-LABEL: sub_if_uge_multiuse_cmp_store_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: sltu a3, a0, a1 +; CHECK-NEXT: sub a1, a0, a1 +; CHECK-NEXT: xori a3, a3, 1 +; CHECK-NEXT: minu a0, a0, a1 +; CHECK-NEXT: sw a3, 0(a2) +; CHECK-NEXT: ret + %cmp = icmp uge i32 %x, %y + %conv = zext i1 %cmp to i32 + store i32 %conv, ptr %z, align 4 + %select = select i1 %cmp, i32 %y, i32 0 + %sub = sub nuw i32 %x, %select + ret i32 %sub +} + +define i8 @sub_if_uge_C_i8(i8 zeroext %x) { +; CHECK-LABEL: sub_if_uge_C_i8: +; CHECK: # %bb.0: +; CHECK-NEXT: addi a1, a0, -13 +; CHECK-NEXT: zext.b a1, a1 +; CHECK-NEXT: minu a0, a1, a0 +; CHECK-NEXT: ret + %cmp = icmp ugt i8 %x, 12 + %sub = add i8 %x, -13 + %conv4 = select i1 %cmp, i8 %sub, i8 %x + ret i8 %conv4 +} + +define i16 @sub_if_uge_C_i16(i16 zeroext %x) { +; CHECK-LABEL: sub_if_uge_C_i16: +; CHECK: # %bb.0: +; CHECK-NEXT: addi a1, a0, -251 +; CHECK-NEXT: slli a1, a1, 16 +; CHECK-NEXT: srli a1, a1, 16 +; CHECK-NEXT: minu a0, a1, a0 +; CHECK-NEXT: ret + %cmp = icmp ugt i16 %x, 250 + %sub = add i16 %x, -251 + %conv4 = select i1 %cmp, i16 %sub, i16 %x + ret i16 %conv4 +} + +define i32 @sub_if_uge_C_i32(i32 signext %x) { +; CHECK-LABEL: sub_if_uge_C_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: lui a1, 1048560 +; CHECK-NEXT: addi a1, a1, 15 +; CHECK-NEXT: add a1, a0, a1 +; CHECK-NEXT: minu a0, a1, a0 +; CHECK-NEXT: ret + %cmp = icmp ugt i32 %x, 65520 + %sub = add i32 %x, -65521 + %cond = select i1 %cmp, i32 %sub, i32 %x + ret i32 %cond +} + +define i64 @sub_if_uge_C_i64(i64 %x) { +; CHECK-LABEL: sub_if_uge_C_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: li a2, 1 +; CHECK-NEXT: beq a1, a2, .LBB35_2 +; CHECK-NEXT: # %bb.1: +; CHECK-NEXT: sltiu a2, a1, 2 +; CHECK-NEXT: xori a2, a2, 1 +; CHECK-NEXT: j .LBB35_3 +; CHECK-NEXT: .LBB35_2: +; CHECK-NEXT: lui a2, 172127 +; CHECK-NEXT: addi a2, a2, 511 +; CHECK-NEXT: sltu a2, a2, a0 +; CHECK-NEXT: .LBB35_3: +; CHECK-NEXT: neg a2, a2 +; CHECK-NEXT: andi a3, a2, -2 +; CHECK-NEXT: add a1, a1, a3 +; CHECK-NEXT: lui a3, 876449 +; CHECK-NEXT: addi a3, a3, -512 +; CHECK-NEXT: and a2, a2, a3 +; CHECK-NEXT: add a2, a0, a2 +; CHECK-NEXT: sltu a0, a2, a0 +; CHECK-NEXT: add a1, a1, a0 +; CHECK-NEXT: mv a0, a2 +; CHECK-NEXT: ret + %cmp = icmp ugt i64 %x, 4999999999 + %sub = add i64 %x, -5000000000 + %cond = select i1 %cmp, i64 %sub, i64 %x + ret i64 %cond +} + +define i32 @sub_if_uge_C_multiuse_cmp_i32(i32 signext %x, ptr %z) { +; CHECK-LABEL: sub_if_uge_C_multiuse_cmp_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: lui a2, 16 +; CHECK-NEXT: lui a3, 1048560 +; CHECK-NEXT: addi a2, a2, -16 +; CHECK-NEXT: addi a3, a3, 15 +; CHECK-NEXT: sltu a2, a2, a0 +; CHECK-NEXT: add a3, a0, a3 +; CHECK-NEXT: minu a0, a3, a0 +; CHECK-NEXT: sw a2, 0(a1) +; CHECK-NEXT: ret + %cmp = icmp ugt i32 %x, 65520 + %conv = zext i1 %cmp to i32 + store i32 %conv, ptr %z, align 4 + %sub = add i32 %x, -65521 + %cond = select i1 %cmp, i32 %sub, i32 %x + ret i32 %cond +} + +define i32 @sub_if_uge_C_multiuse_sub_i32(i32 signext %x, ptr %z) { +; CHECK-LABEL: sub_if_uge_C_multiuse_sub_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: lui a2, 1048560 +; CHECK-NEXT: addi a2, a2, 15 +; CHECK-NEXT: add a2, a0, a2 +; CHECK-NEXT: minu a0, a2, a0 +; CHECK-NEXT: sw a2, 0(a1) +; CHECK-NEXT: ret + %sub = add i32 %x, -65521 + store i32 %sub, ptr %z, align 4 + %cmp = icmp ugt i32 %x, 65520 + %cond = select i1 %cmp, i32 %sub, i32 %x + ret i32 %cond +} + +define i32 @sub_if_uge_C_swapped_i32(i32 %x) { +; CHECK-LABEL: sub_if_uge_C_swapped_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: lui a1, 1048560 +; CHECK-NEXT: addi a1, a1, 15 +; CHECK-NEXT: add a1, a0, a1 +; CHECK-NEXT: minu a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp ult i32 %x, 65521 + %sub = add i32 %x, -65521 + %cond = select i1 %cmp, i32 %x, i32 %sub + ret i32 %cond +} + +define i7 @sub_if_uge_C_nsw_i7(i7 %a) { +; CHECK-LABEL: sub_if_uge_C_nsw_i7: +; CHECK: # %bb.0: +; CHECK-NEXT: ori a0, a0, 51 +; CHECK-NEXT: andi a1, a0, 127 +; CHECK-NEXT: addi a0, a0, 17 +; CHECK-NEXT: andi a0, a0, 92 +; CHECK-NEXT: minu a0, a0, a1 +; CHECK-NEXT: ret + %x = or i7 %a, 51 + %c = icmp ugt i7 %x, -18 + %add = add nsw i7 %x, 17 + %s = select i1 %c, i7 %add, i7 %x + ret i7 %s +} + +define i7 @sub_if_uge_C_swapped_nsw_i7(i7 %a) { +; CHECK-LABEL: sub_if_uge_C_swapped_nsw_i7: +; CHECK: # %bb.0: +; CHECK-NEXT: ori a0, a0, 51 +; CHECK-NEXT: andi a1, a0, 127 +; CHECK-NEXT: addi a0, a0, 17 +; CHECK-NEXT: andi a0, a0, 92 +; CHECK-NEXT: minu a0, a1, a0 +; CHECK-NEXT: ret + %x = or i7 %a, 51 + %c = icmp ult i7 %x, -17 + %add = add nsw i7 %x, 17 + %s = select i1 %c, i7 %x, i7 %add + ret i7 %s +} diff --git a/llvm/test/CodeGen/RISCV/rv64p.ll b/llvm/test/CodeGen/RISCV/rv64p.ll new file mode 100644 index 0000000..cb07f94 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rv64p.ll @@ -0,0 +1,677 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv64 -mattr=+experimental-p -verify-machineinstrs < %s \ +; RUN: | FileCheck %s + +declare i32 @llvm.ctlz.i32(i32, i1) + +define signext i32 @ctlz_i32(i32 signext %a) nounwind { +; CHECK-LABEL: ctlz_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: clzw a0, a0 +; CHECK-NEXT: ret + %1 = call i32 @llvm.ctlz.i32(i32 %a, i1 false) + ret i32 %1 +} + +define signext i32 @log2_i32(i32 signext %a) nounwind { +; CHECK-LABEL: log2_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: clzw a0, a0 +; CHECK-NEXT: li a1, 31 +; CHECK-NEXT: sub a0, a1, a0 +; CHECK-NEXT: ret + %1 = call i32 @llvm.ctlz.i32(i32 %a, i1 false) + %2 = sub i32 31, %1 + ret i32 %2 +} + +define signext i32 @log2_ceil_i32(i32 signext %a) nounwind { +; CHECK-LABEL: log2_ceil_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: addi a0, a0, -1 +; CHECK-NEXT: clzw a0, a0 +; CHECK-NEXT: li a1, 32 +; CHECK-NEXT: sub a0, a1, a0 +; CHECK-NEXT: ret + %1 = sub i32 %a, 1 + %2 = call i32 @llvm.ctlz.i32(i32 %1, i1 false) + %3 = sub i32 32, %2 + ret i32 %3 +} + +define signext i32 @findLastSet_i32(i32 signext %a) nounwind { +; CHECK-LABEL: findLastSet_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: clzw a1, a0 +; CHECK-NEXT: snez a0, a0 +; CHECK-NEXT: xori a1, a1, 31 +; CHECK-NEXT: addi a0, a0, -1 +; CHECK-NEXT: or a0, a0, a1 +; CHECK-NEXT: ret + %1 = call i32 @llvm.ctlz.i32(i32 %a, i1 true) + %2 = xor i32 31, %1 + %3 = icmp eq i32 %a, 0 + %4 = select i1 %3, i32 -1, i32 %2 + ret i32 %4 +} + +define i32 @ctlz_lshr_i32(i32 signext %a) { +; CHECK-LABEL: ctlz_lshr_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: srliw a0, a0, 1 +; CHECK-NEXT: clzw a0, a0 +; CHECK-NEXT: ret + %1 = lshr i32 %a, 1 + %2 = call i32 @llvm.ctlz.i32(i32 %1, i1 false) + ret i32 %2 +} + +declare i64 @llvm.ctlz.i64(i64, i1) + +define i64 @ctlz_i64(i64 %a) nounwind { +; CHECK-LABEL: ctlz_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: clz a0, a0 +; CHECK-NEXT: ret + %1 = call i64 @llvm.ctlz.i64(i64 %a, i1 false) + ret i64 %1 +} + +declare i32 @llvm.cttz.i32(i32, i1) + +define signext i32 @cttz_i32(i32 signext %a) nounwind { +; CHECK-LABEL: cttz_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: beqz a0, .LBB6_2 +; CHECK-NEXT: # %bb.1: # %cond.false +; CHECK-NEXT: addi a1, a0, -1 +; CHECK-NEXT: not a0, a0 +; CHECK-NEXT: and a0, a0, a1 +; CHECK-NEXT: clzw a0, a0 +; CHECK-NEXT: li a1, 32 +; CHECK-NEXT: sub a0, a1, a0 +; CHECK-NEXT: ret +; CHECK-NEXT: .LBB6_2: +; CHECK-NEXT: li a0, 32 +; CHECK-NEXT: ret + %1 = call i32 @llvm.cttz.i32(i32 %a, i1 false) + ret i32 %1 +} + +define signext i32 @cttz_zero_undef_i32(i32 signext %a) nounwind { +; CHECK-LABEL: cttz_zero_undef_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: addi a1, a0, -1 +; CHECK-NEXT: not a0, a0 +; CHECK-NEXT: and a0, a0, a1 +; CHECK-NEXT: clzw a0, a0 +; CHECK-NEXT: li a1, 32 +; CHECK-NEXT: sub a0, a1, a0 +; CHECK-NEXT: ret + %1 = call i32 @llvm.cttz.i32(i32 %a, i1 true) + ret i32 %1 +} + +define signext i32 @findFirstSet_i32(i32 signext %a) nounwind { +; CHECK-LABEL: findFirstSet_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: addi a1, a0, -1 +; CHECK-NEXT: not a2, a0 +; CHECK-NEXT: and a1, a2, a1 +; CHECK-NEXT: li a2, 32 +; CHECK-NEXT: snez a0, a0 +; CHECK-NEXT: clzw a1, a1 +; CHECK-NEXT: sub a2, a2, a1 +; CHECK-NEXT: addi a0, a0, -1 +; CHECK-NEXT: or a0, a0, a2 +; CHECK-NEXT: ret + %1 = call i32 @llvm.cttz.i32(i32 %a, i1 true) + %2 = icmp eq i32 %a, 0 + %3 = select i1 %2, i32 -1, i32 %1 + ret i32 %3 +} + +define signext i32 @ffs_i32(i32 signext %a) nounwind { +; CHECK-LABEL: ffs_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: addi a1, a0, -1 +; CHECK-NEXT: not a2, a0 +; CHECK-NEXT: and a1, a2, a1 +; CHECK-NEXT: li a2, 33 +; CHECK-NEXT: seqz a0, a0 +; CHECK-NEXT: clzw a1, a1 +; CHECK-NEXT: sub a2, a2, a1 +; CHECK-NEXT: addi a0, a0, -1 +; CHECK-NEXT: and a0, a0, a2 +; CHECK-NEXT: ret + %1 = call i32 @llvm.cttz.i32(i32 %a, i1 true) + %2 = add i32 %1, 1 + %3 = icmp eq i32 %a, 0 + %4 = select i1 %3, i32 0, i32 %2 + ret i32 %4 +} + +declare i64 @llvm.cttz.i64(i64, i1) + +define i64 @cttz_i64(i64 %a) nounwind { +; CHECK-LABEL: cttz_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: beqz a0, .LBB10_2 +; CHECK-NEXT: # %bb.1: # %cond.false +; CHECK-NEXT: addi a1, a0, -1 +; CHECK-NEXT: not a0, a0 +; CHECK-NEXT: and a0, a0, a1 +; CHECK-NEXT: clz a0, a0 +; CHECK-NEXT: li a1, 64 +; CHECK-NEXT: sub a0, a1, a0 +; CHECK-NEXT: ret +; CHECK-NEXT: .LBB10_2: +; CHECK-NEXT: li a0, 64 +; CHECK-NEXT: ret + %1 = call i64 @llvm.cttz.i64(i64 %a, i1 false) + ret i64 %1 +} + +define signext i32 @sextb_i32(i32 signext %a) nounwind { +; CHECK-LABEL: sextb_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: sext.b a0, a0 +; CHECK-NEXT: ret + %shl = shl i32 %a, 24 + %shr = ashr exact i32 %shl, 24 + ret i32 %shr +} + +define i64 @sextb_i64(i64 %a) nounwind { +; CHECK-LABEL: sextb_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: sext.b a0, a0 +; CHECK-NEXT: ret + %shl = shl i64 %a, 56 + %shr = ashr exact i64 %shl, 56 + ret i64 %shr +} + +define signext i32 @sexth_i32(i32 signext %a) nounwind { +; CHECK-LABEL: sexth_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: sext.h a0, a0 +; CHECK-NEXT: ret + %shl = shl i32 %a, 16 + %shr = ashr exact i32 %shl, 16 + ret i32 %shr +} + +define i64 @sexth_i64(i64 %a) nounwind { +; CHECK-LABEL: sexth_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: sext.h a0, a0 +; CHECK-NEXT: ret + %shl = shl i64 %a, 48 + %shr = ashr exact i64 %shl, 48 + ret i64 %shr +} + +define signext i32 @min_i32(i32 signext %a, i32 signext %b) nounwind { +; CHECK-LABEL: min_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: min a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp slt i32 %a, %b + %cond = select i1 %cmp, i32 %a, i32 %b + ret i32 %cond +} + +define i64 @min_i64(i64 %a, i64 %b) nounwind { +; CHECK-LABEL: min_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: min a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp slt i64 %a, %b + %cond = select i1 %cmp, i64 %a, i64 %b + ret i64 %cond +} + +define signext i32 @max_i32(i32 signext %a, i32 signext %b) nounwind { +; CHECK-LABEL: max_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: max a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp sgt i32 %a, %b + %cond = select i1 %cmp, i32 %a, i32 %b + ret i32 %cond +} + +define i64 @max_i64(i64 %a, i64 %b) nounwind { +; CHECK-LABEL: max_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: max a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp sgt i64 %a, %b + %cond = select i1 %cmp, i64 %a, i64 %b + ret i64 %cond +} + +define signext i32 @minu_i32(i32 signext %a, i32 signext %b) nounwind { +; CHECK-LABEL: minu_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: minu a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp ult i32 %a, %b + %cond = select i1 %cmp, i32 %a, i32 %b + ret i32 %cond +} + +define i64 @minu_i64(i64 %a, i64 %b) nounwind { +; CHECK-LABEL: minu_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: minu a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp ult i64 %a, %b + %cond = select i1 %cmp, i64 %a, i64 %b + ret i64 %cond +} + +define signext i32 @maxu_i32(i32 signext %a, i32 signext %b) nounwind { +; CHECK-LABEL: maxu_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: maxu a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp ugt i32 %a, %b + %cond = select i1 %cmp, i32 %a, i32 %b + ret i32 %cond +} + +define i64 @maxu_i64(i64 %a, i64 %b) nounwind { +; CHECK-LABEL: maxu_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: maxu a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp ugt i64 %a, %b + %cond = select i1 %cmp, i64 %a, i64 %b + ret i64 %cond +} + +declare i32 @llvm.abs.i32(i32, i1 immarg) + +define i32 @abs_i32(i32 %x) { +; CHECK-LABEL: abs_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: sext.w a0, a0 +; CHECK-NEXT: abs a0, a0 +; CHECK-NEXT: ret + %abs = tail call i32 @llvm.abs.i32(i32 %x, i1 true) + ret i32 %abs +} + +define signext i32 @abs_i32_sext(i32 signext %x) { +; CHECK-LABEL: abs_i32_sext: +; CHECK: # %bb.0: +; CHECK-NEXT: abs a0, a0 +; CHECK-NEXT: sext.w a0, a0 +; CHECK-NEXT: ret + %abs = tail call i32 @llvm.abs.i32(i32 %x, i1 true) + ret i32 %abs +} + +declare i64 @llvm.abs.i64(i64, i1 immarg) + +define i64 @abs_i64(i64 %x) { +; CHECK-LABEL: abs_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: abs a0, a0 +; CHECK-NEXT: ret + %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true) + ret i64 %abs +} + +declare i32 @llvm.bswap.i32(i32) + +define signext i32 @bswap_i32(i32 signext %a) nounwind { +; CHECK-LABEL: bswap_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: rev8 a0, a0 +; CHECK-NEXT: srai a0, a0, 32 +; CHECK-NEXT: ret + %1 = tail call i32 @llvm.bswap.i32(i32 %a) + ret i32 %1 +} + +; Similar to bswap_i32 but the result is not sign extended. +define void @bswap_i32_nosext(i32 signext %a, ptr %x) nounwind { +; CHECK-LABEL: bswap_i32_nosext: +; CHECK: # %bb.0: +; CHECK-NEXT: rev8 a0, a0 +; CHECK-NEXT: srli a0, a0, 32 +; CHECK-NEXT: sw a0, 0(a1) +; CHECK-NEXT: ret + %1 = tail call i32 @llvm.bswap.i32(i32 %a) + store i32 %1, ptr %x + ret void +} + +declare i64 @llvm.bswap.i64(i64) + +define i64 @bswap_i64(i64 %a) { +; CHECK-LABEL: bswap_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: rev8 a0, a0 +; CHECK-NEXT: ret + %1 = call i64 @llvm.bswap.i64(i64 %a) + ret i64 %1 +} + +define i64 @srai_slli(i16 signext %0) { +; CHECK-LABEL: srai_slli: +; CHECK: # %bb.0: +; CHECK-NEXT: slli a0, a0, 57 +; CHECK-NEXT: srai a0, a0, 63 +; CHECK-NEXT: ret + %2 = shl i16 %0, 9 + %sext = ashr i16 %2, 15 + %3 = sext i16 %sext to i64 + ret i64 %3 +} + +define i64 @srai_slli2(i16 signext %0) { +; CHECK-LABEL: srai_slli2: +; CHECK: # %bb.0: +; CHECK-NEXT: slli a0, a0, 57 +; CHECK-NEXT: srai a0, a0, 62 +; CHECK-NEXT: ret + %2 = shl i16 %0, 9 + %sext = ashr i16 %2, 14 + %3 = sext i16 %sext to i64 + ret i64 %3 +} + +define signext i32 @func0000000000000001(i32 signext %0, i8 signext %1) #0 { +; CHECK-LABEL: func0000000000000001: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: slli a1, a1, 59 +; CHECK-NEXT: srai a1, a1, 63 +; CHECK-NEXT: addw a0, a1, a0 +; CHECK-NEXT: ret +entry: + %2 = shl i8 %1, 3 + %3 = ashr i8 %2, 7 + %4 = sext i8 %3 to i32 + %5 = add nsw i32 %4, %0 + ret i32 %5 +} + +define i8 @sub_if_uge_i8(i8 %x, i8 %y) { +; CHECK-LABEL: sub_if_uge_i8: +; CHECK: # %bb.0: +; CHECK-NEXT: zext.b a2, a0 +; CHECK-NEXT: sub a0, a0, a1 +; CHECK-NEXT: zext.b a0, a0 +; CHECK-NEXT: minu a0, a2, a0 +; CHECK-NEXT: ret + %cmp = icmp ult i8 %x, %y + %select = select i1 %cmp, i8 0, i8 %y + %sub = sub nuw i8 %x, %select + ret i8 %sub +} + +define i16 @sub_if_uge_i16(i16 %x, i16 %y) { +; CHECK-LABEL: sub_if_uge_i16: +; CHECK: # %bb.0: +; CHECK-NEXT: lui a2, 16 +; CHECK-NEXT: sub a1, a0, a1 +; CHECK-NEXT: addi a2, a2, -1 +; CHECK-NEXT: and a0, a0, a2 +; CHECK-NEXT: and a1, a1, a2 +; CHECK-NEXT: minu a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp ult i16 %x, %y + %select = select i1 %cmp, i16 0, i16 %y + %sub = sub nuw i16 %x, %select + ret i16 %sub +} + +define i32 @sub_if_uge_i32(i32 %x, i32 %y) { +; CHECK-LABEL: sub_if_uge_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: sext.w a2, a0 +; CHECK-NEXT: subw a0, a0, a1 +; CHECK-NEXT: minu a0, a2, a0 +; CHECK-NEXT: ret + %cmp = icmp ult i32 %x, %y + %select = select i1 %cmp, i32 0, i32 %y + %sub = sub nuw i32 %x, %select + ret i32 %sub +} + +define i64 @sub_if_uge_i64(i64 %x, i64 %y) { +; CHECK-LABEL: sub_if_uge_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: sub a1, a0, a1 +; CHECK-NEXT: minu a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp ult i64 %x, %y + %select = select i1 %cmp, i64 0, i64 %y + %sub = sub nuw i64 %x, %select + ret i64 %sub +} + +define i128 @sub_if_uge_i128(i128 %x, i128 %y) { +; CHECK-LABEL: sub_if_uge_i128: +; CHECK: # %bb.0: +; CHECK-NEXT: beq a1, a3, .LBB36_2 +; CHECK-NEXT: # %bb.1: +; CHECK-NEXT: sltu a4, a1, a3 +; CHECK-NEXT: j .LBB36_3 +; CHECK-NEXT: .LBB36_2: +; CHECK-NEXT: sltu a4, a0, a2 +; CHECK-NEXT: .LBB36_3: +; CHECK-NEXT: addi a4, a4, -1 +; CHECK-NEXT: and a3, a4, a3 +; CHECK-NEXT: and a2, a4, a2 +; CHECK-NEXT: sltu a4, a0, a2 +; CHECK-NEXT: sub a1, a1, a3 +; CHECK-NEXT: sub a1, a1, a4 +; CHECK-NEXT: sub a0, a0, a2 +; CHECK-NEXT: ret + %cmp = icmp ult i128 %x, %y + %select = select i1 %cmp, i128 0, i128 %y + %sub = sub nuw i128 %x, %select + ret i128 %sub +} + +define i32 @sub_if_uge_multiuse_select_i32(i32 %x, i32 %y) { +; CHECK-LABEL: sub_if_uge_multiuse_select_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: sext.w a2, a1 +; CHECK-NEXT: sext.w a3, a0 +; CHECK-NEXT: sltu a2, a3, a2 +; CHECK-NEXT: addi a2, a2, -1 +; CHECK-NEXT: and a1, a2, a1 +; CHECK-NEXT: sub a0, a0, a1 +; CHECK-NEXT: sllw a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp ult i32 %x, %y + %select = select i1 %cmp, i32 0, i32 %y + %sub = sub nuw i32 %x, %select + %shl = shl i32 %sub, %select + ret i32 %shl +} + +define i32 @sub_if_uge_multiuse_cmp_i32(i32 %x, i32 %y) { +; CHECK-LABEL: sub_if_uge_multiuse_cmp_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: sext.w a2, a1 +; CHECK-NEXT: sext.w a3, a0 +; CHECK-NEXT: subw a0, a0, a1 +; CHECK-NEXT: minu a0, a3, a0 +; CHECK-NEXT: bltu a3, a2, .LBB38_2 +; CHECK-NEXT: # %bb.1: +; CHECK-NEXT: li a1, 4 +; CHECK-NEXT: sllw a0, a0, a1 +; CHECK-NEXT: ret +; CHECK-NEXT: .LBB38_2: +; CHECK-NEXT: li a1, 2 +; CHECK-NEXT: sllw a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp ult i32 %x, %y + %select = select i1 %cmp, i32 0, i32 %y + %sub = sub nuw i32 %x, %select + %select2 = select i1 %cmp, i32 2, i32 4 + %shl = shl i32 %sub, %select2 + ret i32 %shl +} + +define i32 @sub_if_uge_multiuse_cmp_store_i32(i32 signext %x, i32 signext %y, ptr %z) { +; CHECK-LABEL: sub_if_uge_multiuse_cmp_store_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: sltu a3, a0, a1 +; CHECK-NEXT: subw a1, a0, a1 +; CHECK-NEXT: xori a3, a3, 1 +; CHECK-NEXT: minu a0, a0, a1 +; CHECK-NEXT: sw a3, 0(a2) +; CHECK-NEXT: ret + %cmp = icmp uge i32 %x, %y + %conv = zext i1 %cmp to i32 + store i32 %conv, ptr %z, align 4 + %select = select i1 %cmp, i32 %y, i32 0 + %sub = sub nuw i32 %x, %select + ret i32 %sub +} + +define i8 @sub_if_uge_C_i8(i8 zeroext %x) { +; CHECK-LABEL: sub_if_uge_C_i8: +; CHECK: # %bb.0: +; CHECK-NEXT: addi a1, a0, -13 +; CHECK-NEXT: zext.b a1, a1 +; CHECK-NEXT: minu a0, a1, a0 +; CHECK-NEXT: ret + %cmp = icmp ugt i8 %x, 12 + %sub = add i8 %x, -13 + %conv4 = select i1 %cmp, i8 %sub, i8 %x + ret i8 %conv4 +} + +define i16 @sub_if_uge_C_i16(i16 zeroext %x) { +; CHECK-LABEL: sub_if_uge_C_i16: +; CHECK: # %bb.0: +; CHECK-NEXT: addi a1, a0, -251 +; CHECK-NEXT: slli a1, a1, 48 +; CHECK-NEXT: srli a1, a1, 48 +; CHECK-NEXT: minu a0, a1, a0 +; CHECK-NEXT: ret + %cmp = icmp ugt i16 %x, 250 + %sub = add i16 %x, -251 + %conv4 = select i1 %cmp, i16 %sub, i16 %x + ret i16 %conv4 +} + +define i32 @sub_if_uge_C_i32(i32 signext %x) { +; CHECK-LABEL: sub_if_uge_C_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: lui a1, 1048560 +; CHECK-NEXT: addi a1, a1, 15 +; CHECK-NEXT: addw a1, a0, a1 +; CHECK-NEXT: minu a0, a1, a0 +; CHECK-NEXT: ret + %cmp = icmp ugt i32 %x, 65520 + %sub = add i32 %x, -65521 + %cond = select i1 %cmp, i32 %sub, i32 %x + ret i32 %cond +} + +define i64 @sub_if_uge_C_i64(i64 %x) { +; CHECK-LABEL: sub_if_uge_C_i64: +; CHECK: # %bb.0: +; CHECK-NEXT: lui a1, 1046192 +; CHECK-NEXT: addi a1, a1, -761 +; CHECK-NEXT: slli a1, a1, 9 +; CHECK-NEXT: add a1, a0, a1 +; CHECK-NEXT: minu a0, a1, a0 +; CHECK-NEXT: ret + %cmp = icmp ugt i64 %x, 4999999999 + %sub = add i64 %x, -5000000000 + %cond = select i1 %cmp, i64 %sub, i64 %x + ret i64 %cond +} + +define i32 @sub_if_uge_C_multiuse_cmp_i32(i32 signext %x, ptr %z) { +; CHECK-LABEL: sub_if_uge_C_multiuse_cmp_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: lui a2, 16 +; CHECK-NEXT: lui a3, 1048560 +; CHECK-NEXT: addi a2, a2, -16 +; CHECK-NEXT: addi a3, a3, 15 +; CHECK-NEXT: sltu a2, a2, a0 +; CHECK-NEXT: addw a3, a0, a3 +; CHECK-NEXT: minu a0, a3, a0 +; CHECK-NEXT: sw a2, 0(a1) +; CHECK-NEXT: ret + %cmp = icmp ugt i32 %x, 65520 + %conv = zext i1 %cmp to i32 + store i32 %conv, ptr %z, align 4 + %sub = add i32 %x, -65521 + %cond = select i1 %cmp, i32 %sub, i32 %x + ret i32 %cond +} + +define i32 @sub_if_uge_C_multiuse_sub_i32(i32 signext %x, ptr %z) { +; CHECK-LABEL: sub_if_uge_C_multiuse_sub_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: lui a2, 1048560 +; CHECK-NEXT: addi a2, a2, 15 +; CHECK-NEXT: addw a2, a0, a2 +; CHECK-NEXT: minu a0, a2, a0 +; CHECK-NEXT: sw a2, 0(a1) +; CHECK-NEXT: ret + %sub = add i32 %x, -65521 + store i32 %sub, ptr %z, align 4 + %cmp = icmp ugt i32 %x, 65520 + %cond = select i1 %cmp, i32 %sub, i32 %x + ret i32 %cond +} + +define i32 @sub_if_uge_C_swapped_i32(i32 signext %x) { +; CHECK-LABEL: sub_if_uge_C_swapped_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: lui a1, 1048560 +; CHECK-NEXT: addi a1, a1, 15 +; CHECK-NEXT: addw a1, a0, a1 +; CHECK-NEXT: minu a0, a0, a1 +; CHECK-NEXT: ret + %cmp = icmp ult i32 %x, 65521 + %sub = add i32 %x, -65521 + %cond = select i1 %cmp, i32 %x, i32 %sub + ret i32 %cond +} + +define i7 @sub_if_uge_C_nsw_i7(i7 %a) { +; CHECK-LABEL: sub_if_uge_C_nsw_i7: +; CHECK: # %bb.0: +; CHECK-NEXT: ori a0, a0, 51 +; CHECK-NEXT: andi a1, a0, 127 +; CHECK-NEXT: addi a0, a0, 17 +; CHECK-NEXT: andi a0, a0, 92 +; CHECK-NEXT: minu a0, a0, a1 +; CHECK-NEXT: ret + %x = or i7 %a, 51 + %c = icmp ugt i7 %x, -18 + %add = add nsw i7 %x, 17 + %s = select i1 %c, i7 %add, i7 %x + ret i7 %s +} + +define i7 @sub_if_uge_C_swapped_nsw_i7(i7 %a) { +; CHECK-LABEL: sub_if_uge_C_swapped_nsw_i7: +; CHECK: # %bb.0: +; CHECK-NEXT: ori a0, a0, 51 +; CHECK-NEXT: andi a1, a0, 127 +; CHECK-NEXT: addi a0, a0, 17 +; CHECK-NEXT: andi a0, a0, 92 +; CHECK-NEXT: minu a0, a1, a0 +; CHECK-NEXT: ret + %x = or i7 %a, 51 + %c = icmp ult i7 %x, -17 + %add = add nsw i7 %x, 17 + %s = select i1 %c, i7 %x, i7 %add + ret i7 %s +} diff --git a/llvm/test/CodeGen/X86/issue163738.ll b/llvm/test/CodeGen/X86/issue163738.ll new file mode 100644 index 0000000..61fe043 --- /dev/null +++ b/llvm/test/CodeGen/X86/issue163738.ll @@ -0,0 +1,13 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 +; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK + +define <8 x i64> @foo(<8 x i64> %a, <8 x i64> %b, <8 x i64> %c) { +; CHECK-LABEL: foo: +; CHECK: # %bb.0: +; CHECK-NEXT: vpternlogq {{.*#+}} zmm0 = ~(zmm0 | zmm2 | zmm1) +; CHECK-NEXT: retq + %and.demorgan = or <8 x i64> %b, %a + %and3.demorgan = or <8 x i64> %and.demorgan, %c + %and3 = xor <8 x i64> %and3.demorgan, splat (i64 -1) + ret <8 x i64> %and3 +} diff --git a/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount-mini.ll b/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount-mini.ll index 1c869bd..e7491e9 100644 --- a/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount-mini.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount-mini.ll @@ -1,14 +1,16 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -passes=msan -mattr=+sme -o - %s - -; XFAIL: * +; RUN: opt -S -passes=msan -mattr=+sme -o - %s | FileCheck %s ; Forked from llvm/test/CodeGen/AArch64/sme-aarch64-svcount.ll -; Manually minimized to show MSan leads to a compiler crash target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target triple = "aarch64--linux-android9001" define target("aarch64.svcount") @test_return_arg1(target("aarch64.svcount") %arg0, target("aarch64.svcount") %arg1) nounwind { +; CHECK-LABEL: @test_return_arg1( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: store target("aarch64.svcount") zeroinitializer, ptr @__msan_retval_tls, align 8 +; CHECK-NEXT: ret target("aarch64.svcount") [[ARG1:%.*]] +; ret target("aarch64.svcount") %arg1 } diff --git a/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount.ll b/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount.ll index 00cf3204..e1ea9e6 100644 --- a/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount.ll @@ -1,7 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -passes=msan -mattr=+sme -o - %s - -; XFAIL: * +; RUN: opt -S -passes=msan -mattr=+sme -o - %s | FileCheck %s ; Forked from llvm/test/CodeGen/AArch64/sme-aarch64-svcount.ll @@ -12,16 +10,49 @@ target triple = "aarch64--linux-android9001" ; Test simple loads, stores and return. ; define target("aarch64.svcount") @test_load(ptr %ptr) nounwind { +; CHECK-LABEL: @test_load( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[RES:%.*]] = load target("aarch64.svcount"), ptr [[PTR:%.*]], align 2 +; CHECK-NEXT: store target("aarch64.svcount") zeroinitializer, ptr @__msan_retval_tls, align 8 +; CHECK-NEXT: ret target("aarch64.svcount") [[RES]] +; %res = load target("aarch64.svcount"), ptr %ptr ret target("aarch64.svcount") %res } define void @test_store(ptr %ptr, target("aarch64.svcount") %val) nounwind { +; CHECK-LABEL: @test_store( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PTR:%.*]] to i64 +; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 193514046488576 +; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr +; CHECK-NEXT: store target("aarch64.svcount") zeroinitializer, ptr [[TMP3]], align 2 +; CHECK-NEXT: store target("aarch64.svcount") [[VAL:%.*]], ptr [[PTR]], align 2 +; CHECK-NEXT: ret void +; store target("aarch64.svcount") %val, ptr %ptr ret void } define target("aarch64.svcount") @test_alloca_store_reload(target("aarch64.svcount") %val) nounwind { +; CHECK-LABEL: @test_alloca_store_reload( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[PTR:%.*]] = alloca target("aarch64.svcount"), align 1 +; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64() +; CHECK-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 2 +; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[PTR]] to i64 +; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP3]], 193514046488576 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP5]], i8 0, i64 [[TMP2]], i1 false) +; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR]] to i64 +; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 193514046488576 +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr +; CHECK-NEXT: store target("aarch64.svcount") zeroinitializer, ptr [[TMP8]], align 2 +; CHECK-NEXT: store target("aarch64.svcount") [[VAL:%.*]], ptr [[PTR]], align 2 +; CHECK-NEXT: [[RES:%.*]] = load target("aarch64.svcount"), ptr [[PTR]], align 2 +; CHECK-NEXT: store target("aarch64.svcount") zeroinitializer, ptr @__msan_retval_tls, align 8 +; CHECK-NEXT: ret target("aarch64.svcount") [[RES]] +; %ptr = alloca target("aarch64.svcount"), align 1 store target("aarch64.svcount") %val, ptr %ptr %res = load target("aarch64.svcount"), ptr %ptr @@ -33,10 +64,20 @@ define target("aarch64.svcount") @test_alloca_store_reload(target("aarch64.svcou ; define target("aarch64.svcount") @test_return_arg1(target("aarch64.svcount") %arg0, target("aarch64.svcount") %arg1) nounwind { +; CHECK-LABEL: @test_return_arg1( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: store target("aarch64.svcount") zeroinitializer, ptr @__msan_retval_tls, align 8 +; CHECK-NEXT: ret target("aarch64.svcount") [[ARG1:%.*]] +; ret target("aarch64.svcount") %arg1 } define target("aarch64.svcount") @test_return_arg4(target("aarch64.svcount") %arg0, target("aarch64.svcount") %arg1, target("aarch64.svcount") %arg2, target("aarch64.svcount") %arg3, target("aarch64.svcount") %arg4) nounwind { +; CHECK-LABEL: @test_return_arg4( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: store target("aarch64.svcount") zeroinitializer, ptr @__msan_retval_tls, align 8 +; CHECK-NEXT: ret target("aarch64.svcount") [[ARG4:%.*]] +; ret target("aarch64.svcount") %arg4 } @@ -46,22 +87,58 @@ define target("aarch64.svcount") @test_return_arg4(target("aarch64.svcount") %ar declare void @take_svcount_1(target("aarch64.svcount") %arg) define void @test_pass_1arg(target("aarch64.svcount") %arg) nounwind { +; CHECK-LABEL: @test_pass_1arg( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: call void @take_svcount_1(target("aarch64.svcount") [[ARG:%.*]]) +; CHECK-NEXT: ret void +; call void @take_svcount_1(target("aarch64.svcount") %arg) ret void } declare void @take_svcount_5(target("aarch64.svcount") %arg0, target("aarch64.svcount") %arg1, target("aarch64.svcount") %arg2, target("aarch64.svcount") %arg3, target("aarch64.svcount") %arg4) define void @test_pass_5args(target("aarch64.svcount") %arg) nounwind { +; CHECK-LABEL: @test_pass_5args( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: call void @take_svcount_5(target("aarch64.svcount") [[ARG:%.*]], target("aarch64.svcount") [[ARG]], target("aarch64.svcount") [[ARG]], target("aarch64.svcount") [[ARG]], target("aarch64.svcount") [[ARG]]) +; CHECK-NEXT: ret void +; call void @take_svcount_5(target("aarch64.svcount") %arg, target("aarch64.svcount") %arg, target("aarch64.svcount") %arg, target("aarch64.svcount") %arg, target("aarch64.svcount") %arg) ret void } define target("aarch64.svcount") @test_sel(target("aarch64.svcount") %x, target("aarch64.svcount") %y, i1 %cmp) sanitize_memory { +; CHECK-LABEL: @test_sel( +; CHECK-NEXT: [[TMP1:%.*]] = load i1, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[CMP:%.*]], target("aarch64.svcount") zeroinitializer, target("aarch64.svcount") zeroinitializer +; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select i1 [[TMP1]], target("aarch64.svcount") zeroinitializer, target("aarch64.svcount") [[TMP2]] +; CHECK-NEXT: [[X_Y:%.*]] = select i1 [[CMP]], target("aarch64.svcount") [[X:%.*]], target("aarch64.svcount") [[Y:%.*]] +; CHECK-NEXT: store target("aarch64.svcount") [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8 +; CHECK-NEXT: ret target("aarch64.svcount") [[X_Y]] +; %x.y = select i1 %cmp, target("aarch64.svcount") %x, target("aarch64.svcount") %y ret target("aarch64.svcount") %x.y } define target("aarch64.svcount") @test_sel_cc(target("aarch64.svcount") %x, target("aarch64.svcount") %y, i32 %k) sanitize_memory { +; CHECK-LABEL: @test_sel_cc( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[K:%.*]], -2147483648 +; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], -1 +; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP2]], [[TMP3]] +; CHECK-NEXT: [[TMP5:%.*]] = or i32 [[TMP2]], [[TMP1]] +; CHECK-NEXT: [[TMP6:%.*]] = icmp ugt i32 [[TMP4]], -2147483606 +; CHECK-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP5]], -2147483606 +; CHECK-NEXT: [[TMP8:%.*]] = xor i1 [[TMP6]], [[TMP7]] +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[K]], 42 +; CHECK-NEXT: [[TMP9:%.*]] = select i1 [[CMP]], target("aarch64.svcount") zeroinitializer, target("aarch64.svcount") zeroinitializer +; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select i1 [[TMP8]], target("aarch64.svcount") zeroinitializer, target("aarch64.svcount") [[TMP9]] +; CHECK-NEXT: [[X_Y:%.*]] = select i1 [[CMP]], target("aarch64.svcount") [[X:%.*]], target("aarch64.svcount") [[Y:%.*]] +; CHECK-NEXT: store target("aarch64.svcount") [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8 +; CHECK-NEXT: ret target("aarch64.svcount") [[X_Y]] +; %cmp = icmp sgt i32 %k, 42 %x.y = select i1 %cmp, target("aarch64.svcount") %x, target("aarch64.svcount") %y ret target("aarch64.svcount") %x.y diff --git a/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add-mini.ll b/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add-mini.ll index 3f43efa..3ae73c5 100644 --- a/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add-mini.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add-mini.ll @@ -1,7 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -passes=msan -mattr=+sme2 -mattr=+sme-i16i64 -mattr=+sme-f64f64 -o - %s - -; XFAIL: * +; RUN: opt -S -passes=msan -mattr=+sme2 -mattr=+sme-i16i64 -mattr=+sme-f64f64 -o - %s | FileCheck %s ; Forked from llvm/test/CodeGen/AArch64/sme2-intrinsics-add.ll ; Manually reduced to show MSan leads to a compiler crash @@ -10,6 +8,19 @@ target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target triple = "aarch64--linux-android9001" define void @multi_vector_add_za_vg1x4_f32_tuple(i64 %stride, ptr %ptr) sanitize_memory { +; CHECK-LABEL: @multi_vector_add_za_vg1x4_f32_tuple( +; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[TMP2:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.ptrue.c8() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1:![0-9]+]] +; CHECK: 3: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5:[0-9]+]] +; CHECK-NEXT: unreachable +; CHECK: 4: +; CHECK-NEXT: [[TMP5:%.*]] = tail call { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.ld1.pn.x4.nxv4f32(target("aarch64.svcount") [[TMP2]], ptr [[PTR:%.*]]) +; CHECK-NEXT: ret void +; %1 = tail call target("aarch64.svcount") @llvm.aarch64.sve.ptrue.c8() %2 = tail call { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.ld1.pn.x4.nxv4f32(target("aarch64.svcount") %1, ptr %ptr) ret void diff --git a/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add.ll b/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add.ll index cd04373..8d00b93 100644 --- a/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add.ll @@ -1,7 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -passes=msan -mattr=+sme2 -mattr=+sme-i16i64 -mattr=+sme-f64f64 -o - %s - -; XFAIL: * +; RUN: opt -S -passes=msan -mattr=+sme2 -mattr=+sme-i16i64 -mattr=+sme-f64f64 -o - %s | FileCheck %s ; Forked from llvm/test/CodeGen/AArch64/sme2-intrinsics-add.ll @@ -9,6 +7,27 @@ target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target triple = "aarch64--linux-android9001" define void @multi_vector_add_write_single_za_vg1x2_i32(i32 %slice, <vscale x 4 x i32> %zn0, <vscale x 4 x i32> %zn1, <vscale x 4 x i32> %zm) sanitize_memory { +; CHECK-LABEL: @multi_vector_add_write_single_za_vg1x2_i32( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1:![0-9]+]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7:[0-9]+]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.single.za.vg1x2.nxv4i32(i32 [[SLICE:%.*]], <vscale x 4 x i32> [[ZN0:%.*]], <vscale x 4 x i32> [[ZN1:%.*]], <vscale x 4 x i32> [[ZM:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.single.za.vg1x2.nxv4i32(i32 [[SLICE_7]], <vscale x 4 x i32> [[ZN0]], <vscale x 4 x i32> [[ZN1]], <vscale x 4 x i32> [[ZM]]) +; CHECK-NEXT: ret void +; call void @llvm.aarch64.sme.add.write.single.za.vg1x2.nxv4i32(i32 %slice, <vscale x 4 x i32> %zn0, <vscale x 4 x i32> %zn1, <vscale x 4 x i32> %zm) @@ -20,6 +39,27 @@ define void @multi_vector_add_write_single_za_vg1x2_i32(i32 %slice, <vscale x 4 } define void @multi_vector_add_write_single_za_vg1x2_i64(i32 %slice, <vscale x 2 x i64> %zn0, <vscale x 2 x i64> %zn1, <vscale x 2 x i64> %zm) sanitize_memory { +; CHECK-LABEL: @multi_vector_add_write_single_za_vg1x2_i64( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.single.za.vg1x2.nxv2i64(i32 [[SLICE:%.*]], <vscale x 2 x i64> [[ZN0:%.*]], <vscale x 2 x i64> [[ZN1:%.*]], <vscale x 2 x i64> [[ZM:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.single.za.vg1x2.nxv2i64(i32 [[SLICE_7]], <vscale x 2 x i64> [[ZN0]], <vscale x 2 x i64> [[ZN1]], <vscale x 2 x i64> [[ZM]]) +; CHECK-NEXT: ret void +; call void @llvm.aarch64.sme.add.write.single.za.vg1x2.nxv2i64(i32 %slice, <vscale x 2 x i64> %zn0, <vscale x 2 x i64> %zn1, <vscale x 2 x i64> %zm) @@ -32,6 +72,27 @@ define void @multi_vector_add_write_single_za_vg1x2_i64(i32 %slice, <vscale x 2 define void @multi_vector_add_write_single_za_vg1x4_i32(i32 %slice, <vscale x 4 x i32> %zn0, <vscale x 4 x i32> %zn1, +; CHECK-LABEL: @multi_vector_add_write_single_za_vg1x4_i32( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.single.za.vg1x4.nxv4i32(i32 [[SLICE:%.*]], <vscale x 4 x i32> [[ZN0:%.*]], <vscale x 4 x i32> [[ZN1:%.*]], <vscale x 4 x i32> [[ZN2:%.*]], <vscale x 4 x i32> [[ZN3:%.*]], <vscale x 4 x i32> [[ZM:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.single.za.vg1x4.nxv4i32(i32 [[SLICE_7]], <vscale x 4 x i32> [[ZN0]], <vscale x 4 x i32> [[ZN1]], <vscale x 4 x i32> [[ZN2]], <vscale x 4 x i32> [[ZN3]], <vscale x 4 x i32> [[ZM]]) +; CHECK-NEXT: ret void +; <vscale x 4 x i32> %zn2, <vscale x 4 x i32> %zn3, <vscale x 4 x i32> %zm) sanitize_memory { call void @llvm.aarch64.sme.add.write.single.za.vg1x4.nxv4i32(i32 %slice, @@ -47,6 +108,27 @@ define void @multi_vector_add_write_single_za_vg1x4_i32(i32 %slice, <vscale x 4 } define void @multi_vector_add_write_single_za_vg1x4_i64(i32 %slice, +; CHECK-LABEL: @multi_vector_add_write_single_za_vg1x4_i64( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.single.za.vg1x4.nxv2i64(i32 [[SLICE:%.*]], <vscale x 2 x i64> [[ZN0:%.*]], <vscale x 2 x i64> [[ZN1:%.*]], <vscale x 2 x i64> [[ZN2:%.*]], <vscale x 2 x i64> [[ZN3:%.*]], <vscale x 2 x i64> [[ZM:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.single.za.vg1x4.nxv2i64(i32 [[SLICE_7]], <vscale x 2 x i64> [[ZN0]], <vscale x 2 x i64> [[ZN1]], <vscale x 2 x i64> [[ZN2]], <vscale x 2 x i64> [[ZN3]], <vscale x 2 x i64> [[ZM]]) +; CHECK-NEXT: ret void +; <vscale x 2 x i64> %zn0, <vscale x 2 x i64> %zn1, <vscale x 2 x i64> %zn2, <vscale x 2 x i64> %zn3, <vscale x 2 x i64> %zm) sanitize_memory { @@ -64,6 +146,27 @@ define void @multi_vector_add_write_single_za_vg1x4_i64(i32 %slice, define void @multi_vector_add_write_za_vg1x2_i32(i32 %slice, <vscale x 4 x i32> %zn0, <vscale x 4 x i32> %zn1, +; CHECK-LABEL: @multi_vector_add_write_za_vg1x2_i32( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.za.vg1x2.nxv4i32(i32 [[SLICE:%.*]], <vscale x 4 x i32> [[ZN0:%.*]], <vscale x 4 x i32> [[ZN1:%.*]], <vscale x 4 x i32> [[ZM1:%.*]], <vscale x 4 x i32> [[ZM2:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.za.vg1x2.nxv4i32(i32 [[SLICE_7]], <vscale x 4 x i32> [[ZN0]], <vscale x 4 x i32> [[ZN1]], <vscale x 4 x i32> [[ZM1]], <vscale x 4 x i32> [[ZM2]]) +; CHECK-NEXT: ret void +; <vscale x 4 x i32> %zm1, <vscale x 4 x i32> %zm2) sanitize_memory { call void @llvm.aarch64.sme.add.write.za.vg1x2.nxv4i32(i32 %slice, <vscale x 4 x i32> %zn0, <vscale x 4 x i32> %zn1, @@ -77,6 +180,27 @@ define void @multi_vector_add_write_za_vg1x2_i32(i32 %slice, <vscale x 4 x i32> define void @multi_vector_add_write_za_vg1x2_i64(i32 %slice, <vscale x 2 x i64> %zn0, <vscale x 2 x i64> %zn1, +; CHECK-LABEL: @multi_vector_add_write_za_vg1x2_i64( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.za.vg1x2.nxv2i64(i32 [[SLICE:%.*]], <vscale x 2 x i64> [[ZN0:%.*]], <vscale x 2 x i64> [[ZN1:%.*]], <vscale x 2 x i64> [[ZM1:%.*]], <vscale x 2 x i64> [[ZM2:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.za.vg1x2.nxv2i64(i32 [[SLICE_7]], <vscale x 2 x i64> [[ZN0]], <vscale x 2 x i64> [[ZN1]], <vscale x 2 x i64> [[ZM1]], <vscale x 2 x i64> [[ZM2]]) +; CHECK-NEXT: ret void +; <vscale x 2 x i64> %zm1, <vscale x 2 x i64> %zm2) sanitize_memory { call void @llvm.aarch64.sme.add.write.za.vg1x2.nxv2i64(i32 %slice, <vscale x 2 x i64> %zn0, <vscale x 2 x i64> %zn1, @@ -91,6 +215,27 @@ define void @multi_vector_add_write_za_vg1x2_i64(i32 %slice, <vscale x 2 x i64> define void @multi_vector_add_write_za_vg1x4_i32(i32 %slice, <vscale x 4 x i32> %zn0, <vscale x 4 x i32> %zn1, +; CHECK-LABEL: @multi_vector_add_write_za_vg1x4_i32( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.za.vg1x4.nxv4i32(i32 [[SLICE:%.*]], <vscale x 4 x i32> [[ZN0:%.*]], <vscale x 4 x i32> [[ZN1:%.*]], <vscale x 4 x i32> [[ZN2:%.*]], <vscale x 4 x i32> [[ZN3:%.*]], <vscale x 4 x i32> [[ZM0:%.*]], <vscale x 4 x i32> [[ZM1:%.*]], <vscale x 4 x i32> [[ZM2:%.*]], <vscale x 4 x i32> [[ZM3:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.za.vg1x4.nxv4i32(i32 [[SLICE_7]], <vscale x 4 x i32> [[ZN0]], <vscale x 4 x i32> [[ZN1]], <vscale x 4 x i32> [[ZN2]], <vscale x 4 x i32> [[ZN3]], <vscale x 4 x i32> [[ZM0]], <vscale x 4 x i32> [[ZM1]], <vscale x 4 x i32> [[ZM2]], <vscale x 4 x i32> [[ZM3]]) +; CHECK-NEXT: ret void +; <vscale x 4 x i32> %zn2, <vscale x 4 x i32> %zn3, <vscale x 4 x i32> %zm0, <vscale x 4 x i32> %zm1, <vscale x 4 x i32> %zm2, <vscale x 4 x i32> %zm3) sanitize_memory { @@ -109,6 +254,27 @@ define void @multi_vector_add_write_za_vg1x4_i32(i32 %slice, <vscale x 4 x i32> } define void @multi_vector_add_write_za_vg1x4_i64(i32 %slice, <vscale x 2 x i64> %zn0, <vscale x 2 x i64> %zn1, +; CHECK-LABEL: @multi_vector_add_write_za_vg1x4_i64( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.za.vg1x4.nxv2i64(i32 [[SLICE:%.*]], <vscale x 2 x i64> [[ZN0:%.*]], <vscale x 2 x i64> [[ZN1:%.*]], <vscale x 2 x i64> [[ZN2:%.*]], <vscale x 2 x i64> [[ZN3:%.*]], <vscale x 2 x i64> [[ZM0:%.*]], <vscale x 2 x i64> [[ZM1:%.*]], <vscale x 2 x i64> [[ZM2:%.*]], <vscale x 2 x i64> [[ZM3:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.write.za.vg1x4.nxv2i64(i32 [[SLICE_7]], <vscale x 2 x i64> [[ZN0]], <vscale x 2 x i64> [[ZN1]], <vscale x 2 x i64> [[ZN2]], <vscale x 2 x i64> [[ZN3]], <vscale x 2 x i64> [[ZM0]], <vscale x 2 x i64> [[ZM1]], <vscale x 2 x i64> [[ZM2]], <vscale x 2 x i64> [[ZM3]]) +; CHECK-NEXT: ret void +; <vscale x 2 x i64> %zn2, <vscale x 2 x i64> %zn3, <vscale x 2 x i64> %zm0, <vscale x 2 x i64> %zm1, <vscale x 2 x i64> %zm2, <vscale x 2 x i64> %zm3) sanitize_memory { @@ -127,6 +293,27 @@ define void @multi_vector_add_write_za_vg1x4_i64(i32 %slice, <vscale x 2 x i64> } define void @multi_vector_add_za_vg1x2_i32(i32 %slice, <vscale x 4 x i32> %zn0, <vscale x 4 x i32> %zn1) sanitize_memory { +; CHECK-LABEL: @multi_vector_add_za_vg1x2_i32( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za32.vg1x2.nxv4i32(i32 [[SLICE:%.*]], <vscale x 4 x i32> [[ZN0:%.*]], <vscale x 4 x i32> [[ZN1:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za32.vg1x2.nxv4i32(i32 [[SLICE_7]], <vscale x 4 x i32> [[ZN0]], <vscale x 4 x i32> [[ZN1]]) +; CHECK-NEXT: ret void +; call void @llvm.aarch64.sme.add.za32.vg1x2.nxv4i32(i32 %slice,<vscale x 4 x i32> %zn0, <vscale x 4 x i32> %zn1) %slice.7 = add i32 %slice, 7 call void @llvm.aarch64.sme.add.za32.vg1x2.nxv4i32(i32 %slice.7, <vscale x 4 x i32> %zn0, <vscale x 4 x i32> %zn1) @@ -134,6 +321,27 @@ define void @multi_vector_add_za_vg1x2_i32(i32 %slice, <vscale x 4 x i32> %zn0, } define void @multi_vector_add_za_vg1x2_i64(i32 %slice, <vscale x 2 x i64> %zn0, <vscale x 2 x i64> %zn1) sanitize_memory { +; CHECK-LABEL: @multi_vector_add_za_vg1x2_i64( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za64.vg1x2.nxv2i64(i32 [[SLICE:%.*]], <vscale x 2 x i64> [[ZN0:%.*]], <vscale x 2 x i64> [[ZN1:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za64.vg1x2.nxv2i64(i32 [[SLICE_7]], <vscale x 2 x i64> [[ZN0]], <vscale x 2 x i64> [[ZN1]]) +; CHECK-NEXT: ret void +; call void @llvm.aarch64.sme.add.za64.vg1x2.nxv2i64(i32 %slice, <vscale x 2 x i64> %zn0, <vscale x 2 x i64> %zn1) %slice.7 = add i32 %slice, 7 call void @llvm.aarch64.sme.add.za64.vg1x2.nxv2i64(i32 %slice.7, <vscale x 2 x i64> %zn0, <vscale x 2 x i64> %zn1) @@ -141,6 +349,27 @@ define void @multi_vector_add_za_vg1x2_i64(i32 %slice, <vscale x 2 x i64> %zn0, } define void @multi_vector_add_za_vg1x2_f32(i32 %slice, <vscale x 4 x float> %zn0, <vscale x 4 x float> %zn1) sanitize_memory { +; CHECK-LABEL: @multi_vector_add_za_vg1x2_f32( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za32.vg1x2.nxv4f32(i32 [[SLICE:%.*]], <vscale x 4 x float> [[ZN0:%.*]], <vscale x 4 x float> [[ZN1:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za32.vg1x2.nxv4f32(i32 [[SLICE_7]], <vscale x 4 x float> [[ZN0]], <vscale x 4 x float> [[ZN1]]) +; CHECK-NEXT: ret void +; call void @llvm.aarch64.sme.add.za32.vg1x2.nxv4f32(i32 %slice, <vscale x 4 x float> %zn0, <vscale x 4 x float> %zn1) %slice.7 = add i32 %slice, 7 @@ -150,6 +379,27 @@ define void @multi_vector_add_za_vg1x2_f32(i32 %slice, <vscale x 4 x float> %zn0 } define void @multi_vector_add_za_vg1x2_f64(i32 %slice, <vscale x 2 x double> %zn0, <vscale x 2 x double> %zn1) sanitize_memory { +; CHECK-LABEL: @multi_vector_add_za_vg1x2_f64( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za64.vg1x2.nxv2f64(i32 [[SLICE:%.*]], <vscale x 2 x double> [[ZN0:%.*]], <vscale x 2 x double> [[ZN1:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za64.vg1x2.nxv2f64(i32 [[SLICE_7]], <vscale x 2 x double> [[ZN0]], <vscale x 2 x double> [[ZN1]]) +; CHECK-NEXT: ret void +; call void @llvm.aarch64.sme.add.za64.vg1x2.nxv2f64(i32 %slice, <vscale x 2 x double> %zn0, <vscale x 2 x double> %zn1) %slice.7 = add i32 %slice, 7 @@ -159,6 +409,36 @@ define void @multi_vector_add_za_vg1x2_f64(i32 %slice, <vscale x 2 x double> %zn } define void @multi_vector_add_za_vg1x2_f64_tuple(i64 %stride, ptr %ptr) sanitize_memory { +; CHECK-LABEL: @multi_vector_add_za_vg1x2_f64_tuple( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8 +; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[TMP2:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.ptrue.c8() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP0]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]] +; CHECK: 3: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 4: +; CHECK-NEXT: [[TMP5:%.*]] = tail call { <vscale x 2 x double>, <vscale x 2 x double> } @llvm.aarch64.sve.ld1.pn.x2.nxv2f64(target("aarch64.svcount") [[TMP2]], ptr [[PTR:%.*]]) +; CHECK-NEXT: [[TMP6:%.*]] = extractvalue { <vscale x 2 x double>, <vscale x 2 x double> } [[TMP5]], 0 +; CHECK-NEXT: [[TMP7:%.*]] = extractvalue { <vscale x 2 x double>, <vscale x 2 x double> } [[TMP5]], 1 +; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP0]], [[TMP1]] +; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i8, ptr [[PTR]], i64 [[STRIDE:%.*]] +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i64 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF1]] +; CHECK: 8: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 9: +; CHECK-NEXT: [[TMP10:%.*]] = tail call { <vscale x 2 x double>, <vscale x 2 x double> } @llvm.aarch64.sve.ld1.pn.x2.nxv2f64(target("aarch64.svcount") [[TMP2]], ptr [[ARRAYIDX2]]) +; CHECK-NEXT: [[TMP11:%.*]] = extractvalue { <vscale x 2 x double>, <vscale x 2 x double> } [[TMP10]], 0 +; CHECK-NEXT: [[TMP12:%.*]] = extractvalue { <vscale x 2 x double>, <vscale x 2 x double> } [[TMP10]], 1 +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za64.vg1x2.nxv2f64(i32 0, <vscale x 2 x double> [[TMP6]], <vscale x 2 x double> [[TMP11]]) +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za64.vg1x2.nxv2f64(i32 0, <vscale x 2 x double> [[TMP7]], <vscale x 2 x double> [[TMP12]]) +; CHECK-NEXT: ret void +; entry: %0 = tail call target("aarch64.svcount") @llvm.aarch64.sve.ptrue.c8() %1 = tail call { <vscale x 2 x double>, <vscale x 2 x double> } @llvm.aarch64.sve.ld1.pn.x2.nxv2f64(target("aarch64.svcount") %0, ptr %ptr) @@ -175,6 +455,27 @@ entry: define void @multi_vector_add_za_vg1x4_i32(i32 %slice, <vscale x 4 x i32> %zn0, <vscale x 4 x i32> %zn1, <vscale x 4 x i32> %zn2, <vscale x 4 x i32> %zn3) sanitize_memory { +; CHECK-LABEL: @multi_vector_add_za_vg1x4_i32( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za32.vg1x4.nxv4i32(i32 [[SLICE:%.*]], <vscale x 4 x i32> [[ZN0:%.*]], <vscale x 4 x i32> [[ZN1:%.*]], <vscale x 4 x i32> [[ZN2:%.*]], <vscale x 4 x i32> [[ZN3:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za32.vg1x4.nxv4i32(i32 [[SLICE_7]], <vscale x 4 x i32> [[ZN0]], <vscale x 4 x i32> [[ZN1]], <vscale x 4 x i32> [[ZN2]], <vscale x 4 x i32> [[ZN3]]) +; CHECK-NEXT: ret void +; call void @llvm.aarch64.sme.add.za32.vg1x4.nxv4i32(i32 %slice, <vscale x 4 x i32> %zn0, <vscale x 4 x i32> %zn1, <vscale x 4 x i32> %zn2, <vscale x 4 x i32> %zn3) @@ -186,6 +487,27 @@ define void @multi_vector_add_za_vg1x4_i32(i32 %slice, <vscale x 4 x i32> %zn0, } define void @multi_vector_add_za_vg1x4_i64(i32 %slice, <vscale x 2 x i64> %zn0, <vscale x 2 x i64> %zn1, <vscale x 2 x i64> %zn2, <vscale x 2 x i64> %zn3) sanitize_memory { +; CHECK-LABEL: @multi_vector_add_za_vg1x4_i64( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za64.vg1x4.nxv2i64(i32 [[SLICE:%.*]], <vscale x 2 x i64> [[ZN0:%.*]], <vscale x 2 x i64> [[ZN1:%.*]], <vscale x 2 x i64> [[ZN2:%.*]], <vscale x 2 x i64> [[ZN3:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za64.vg1x4.nxv2i64(i32 [[SLICE_7]], <vscale x 2 x i64> [[ZN0]], <vscale x 2 x i64> [[ZN1]], <vscale x 2 x i64> [[ZN2]], <vscale x 2 x i64> [[ZN3]]) +; CHECK-NEXT: ret void +; call void @llvm.aarch64.sme.add.za64.vg1x4.nxv2i64(i32 %slice, <vscale x 2 x i64> %zn0, <vscale x 2 x i64> %zn1, <vscale x 2 x i64> %zn2, <vscale x 2 x i64> %zn3) @@ -197,6 +519,27 @@ define void @multi_vector_add_za_vg1x4_i64(i32 %slice, <vscale x 2 x i64> %zn0, } define void @multi_vector_add_za_vg1x4_f32(i32 %slice, <vscale x 4 x float> %zn0, <vscale x 4 x float> %zn1, <vscale x 4 x float> %zn2, <vscale x 4 x float> %zn3) sanitize_memory { +; CHECK-LABEL: @multi_vector_add_za_vg1x4_f32( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za32.vg1x4.nxv4f32(i32 [[SLICE:%.*]], <vscale x 4 x float> [[ZN0:%.*]], <vscale x 4 x float> [[ZN1:%.*]], <vscale x 4 x float> [[ZN2:%.*]], <vscale x 4 x float> [[ZN3:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za32.vg1x4.nxv4f32(i32 [[SLICE_7]], <vscale x 4 x float> [[ZN0]], <vscale x 4 x float> [[ZN1]], <vscale x 4 x float> [[ZN2]], <vscale x 4 x float> [[ZN3]]) +; CHECK-NEXT: ret void +; call void @llvm.aarch64.sme.add.za32.vg1x4.nxv4f32(i32 %slice, <vscale x 4 x float> %zn0, <vscale x 4 x float> %zn1, <vscale x 4 x float> %zn2, <vscale x 4 x float> %zn3) @@ -208,6 +551,73 @@ define void @multi_vector_add_za_vg1x4_f32(i32 %slice, <vscale x 4 x float> %zn0 } define void @multi_vector_add_za_vg1x4_f32_tuple(i64 %stride, ptr %ptr) sanitize_memory { +; CHECK-LABEL: @multi_vector_add_za_vg1x4_f32_tuple( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8 +; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[TMP2:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.ptrue.c8() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP0]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]] +; CHECK: 3: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 4: +; CHECK-NEXT: [[TMP5:%.*]] = tail call { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.ld1.pn.x4.nxv4f32(target("aarch64.svcount") [[TMP2]], ptr [[PTR:%.*]]) +; CHECK-NEXT: [[TMP6:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP5]], 0 +; CHECK-NEXT: [[TMP7:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP5]], 1 +; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP5]], 2 +; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP5]], 3 +; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP0]], [[TMP1]] +; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i8, ptr [[PTR]], i64 [[STRIDE:%.*]] +; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i64 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP3]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF1]] +; CHECK: 10: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 11: +; CHECK-NEXT: [[TMP12:%.*]] = tail call { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.ld1.pn.x4.nxv4f32(target("aarch64.svcount") [[TMP2]], ptr [[ARRAYIDX2]]) +; CHECK-NEXT: [[TMP13:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP12]], 0 +; CHECK-NEXT: [[TMP14:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP12]], 1 +; CHECK-NEXT: [[TMP15:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP12]], 2 +; CHECK-NEXT: [[TMP16:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP12]], 3 +; CHECK-NEXT: [[TMP17:%.*]] = shl i64 [[TMP1]], 1 +; CHECK-NEXT: [[TMP18:%.*]] = or i64 [[TMP17]], 0 +; CHECK-NEXT: [[MUL3:%.*]] = shl i64 [[STRIDE]], 1 +; CHECK-NEXT: [[_MSPROP1:%.*]] = or i64 [[TMP0]], [[TMP18]] +; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i8, ptr [[PTR]], i64 [[MUL3]] +; CHECK-NEXT: [[_MSCMP4:%.*]] = icmp ne i64 [[_MSPROP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP4]], label [[TMP19:%.*]], label [[TMP20:%.*]], !prof [[PROF1]] +; CHECK: 19: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 20: +; CHECK-NEXT: [[TMP21:%.*]] = tail call { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.ld1.pn.x4.nxv4f32(target("aarch64.svcount") [[TMP2]], ptr [[ARRAYIDX4]]) +; CHECK-NEXT: [[TMP22:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP21]], 0 +; CHECK-NEXT: [[TMP23:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP21]], 1 +; CHECK-NEXT: [[TMP24:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP21]], 2 +; CHECK-NEXT: [[TMP25:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP21]], 3 +; CHECK-NEXT: [[MSPROP_MUL_CST:%.*]] = mul i64 [[TMP1]], 1 +; CHECK-NEXT: [[MUL5:%.*]] = mul i64 [[STRIDE]], 3 +; CHECK-NEXT: [[_MSPROP2:%.*]] = or i64 [[TMP0]], [[MSPROP_MUL_CST]] +; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i8, ptr [[PTR]], i64 [[MUL5]] +; CHECK-NEXT: [[_MSCMP5:%.*]] = icmp ne i64 [[_MSPROP2]], 0 +; CHECK-NEXT: br i1 [[_MSCMP5]], label [[TMP26:%.*]], label [[TMP27:%.*]], !prof [[PROF1]] +; CHECK: 26: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 27: +; CHECK-NEXT: [[TMP28:%.*]] = tail call { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.ld1.pn.x4.nxv4f32(target("aarch64.svcount") [[TMP2]], ptr [[ARRAYIDX6]]) +; CHECK-NEXT: [[TMP29:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP28]], 0 +; CHECK-NEXT: [[TMP30:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP28]], 1 +; CHECK-NEXT: [[TMP31:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP28]], 2 +; CHECK-NEXT: [[TMP32:%.*]] = extractvalue { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } [[TMP28]], 3 +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za32.vg1x4.nxv4f32(i32 0, <vscale x 4 x float> [[TMP6]], <vscale x 4 x float> [[TMP13]], <vscale x 4 x float> [[TMP22]], <vscale x 4 x float> [[TMP29]]) +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za32.vg1x4.nxv4f32(i32 0, <vscale x 4 x float> [[TMP7]], <vscale x 4 x float> [[TMP14]], <vscale x 4 x float> [[TMP23]], <vscale x 4 x float> [[TMP30]]) +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za32.vg1x4.nxv4f32(i32 0, <vscale x 4 x float> [[TMP8]], <vscale x 4 x float> [[TMP15]], <vscale x 4 x float> [[TMP24]], <vscale x 4 x float> [[TMP31]]) +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za32.vg1x4.nxv4f32(i32 0, <vscale x 4 x float> [[TMP9]], <vscale x 4 x float> [[TMP16]], <vscale x 4 x float> [[TMP25]], <vscale x 4 x float> [[TMP32]]) +; CHECK-NEXT: ret void +; entry: %0 = tail call target("aarch64.svcount") @llvm.aarch64.sve.ptrue.c8() %1 = tail call { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.ld1.pn.x4.nxv4f32(target("aarch64.svcount") %0, ptr %ptr) @@ -243,6 +653,27 @@ entry: } define void @multi_vector_add_za_vg1x4_f64(i32 %slice, <vscale x 2 x double> %zn0, <vscale x 2 x double> %zn1, <vscale x 2 x double> %zn2, <vscale x 2 x double> %zn3) sanitize_memory { +; CHECK-LABEL: @multi_vector_add_za_vg1x4_f64( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]] +; CHECK: 2: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 3: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za64.vg1x4.nxv2f64(i32 [[SLICE:%.*]], <vscale x 2 x double> [[ZN0:%.*]], <vscale x 2 x double> [[ZN1:%.*]], <vscale x 2 x double> [[ZN2:%.*]], <vscale x 2 x double> [[ZN3:%.*]]) +; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], 0 +; CHECK-NEXT: [[SLICE_7:%.*]] = add i32 [[SLICE]], 7 +; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[_MSPROP]], 0 +; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]] +; CHECK: 4: +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]] +; CHECK-NEXT: unreachable +; CHECK: 5: +; CHECK-NEXT: call void @llvm.aarch64.sme.add.za64.vg1x4.nxv2f64(i32 [[SLICE_7]], <vscale x 2 x double> [[ZN0]], <vscale x 2 x double> [[ZN1]], <vscale x 2 x double> [[ZN2]], <vscale x 2 x double> [[ZN3]]) +; CHECK-NEXT: ret void +; call void @llvm.aarch64.sme.add.za64.vg1x4.nxv2f64(i32 %slice, <vscale x 2 x double> %zn0, <vscale x 2 x double> %zn1, <vscale x 2 x double> %zn2, <vscale x 2 x double> %zn3) @@ -255,6 +686,12 @@ define void @multi_vector_add_za_vg1x4_f64(i32 %slice, <vscale x 2 x double> %zn define { <vscale x 16 x i8>, <vscale x 16 x i8> } @multi_vec_add_single_x2_s8(<vscale x 16 x i8> %unused, <vscale x 16 x i8> %zdn1, <vscale x 16 x i8> %zdn2, <vscale x 16 x i8> %zm) sanitize_memory { +; CHECK-LABEL: @multi_vec_add_single_x2_s8( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[RES:%.*]] = call { <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.add.single.x2.nxv16i8(<vscale x 16 x i8> [[ZDN1:%.*]], <vscale x 16 x i8> [[ZDN2:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) +; CHECK-NEXT: store { <vscale x 16 x i8>, <vscale x 16 x i8> } zeroinitializer, ptr @__msan_retval_tls, align 8 +; CHECK-NEXT: ret { <vscale x 16 x i8>, <vscale x 16 x i8> } [[RES]] +; %res = call { <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.add.single.x2.nxv16i8(<vscale x 16 x i8> %zdn1, <vscale x 16 x i8> %zdn2, <vscale x 16 x i8> %zm) @@ -262,6 +699,12 @@ define { <vscale x 16 x i8>, <vscale x 16 x i8> } @multi_vec_add_single_x2_s8(<v } define { <vscale x 8 x i16>, <vscale x 8 x i16> } @multi_vec_add_single_x2_s16(<vscale x 8 x i16> %unused, <vscale x 8 x i16> %zdn1, <vscale x 8 x i16> %zdn2, <vscale x 8 x i16> %zm) sanitize_memory { +; CHECK-LABEL: @multi_vec_add_single_x2_s16( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[RES:%.*]] = call { <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.aarch64.sve.add.single.x2.nxv8i16(<vscale x 8 x i16> [[ZDN1:%.*]], <vscale x 8 x i16> [[ZDN2:%.*]], <vscale x 8 x i16> [[ZM:%.*]]) +; CHECK-NEXT: store { <vscale x 8 x i16>, <vscale x 8 x i16> } zeroinitializer, ptr @__msan_retval_tls, align 8 +; CHECK-NEXT: ret { <vscale x 8 x i16>, <vscale x 8 x i16> } [[RES]] +; %res = call { <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.aarch64.sve.add.single.x2.nxv8i16(<vscale x 8 x i16> %zdn1, <vscale x 8 x i16> %zdn2, <vscale x 8 x i16> %zm) @@ -269,6 +712,12 @@ define { <vscale x 8 x i16>, <vscale x 8 x i16> } @multi_vec_add_single_x2_s16(< } define { <vscale x 4 x i32>, <vscale x 4 x i32> } @multi_vec_add_single_x2_s32(<vscale x 4 x i32> %unused, <vscale x 4 x i32> %zdn1, <vscale x 4 x i32> %zdn2, <vscale x 4 x i32> %zm) sanitize_memory { +; CHECK-LABEL: @multi_vec_add_single_x2_s32( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[RES:%.*]] = call { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.aarch64.sve.add.single.x2.nxv4i32(<vscale x 4 x i32> [[ZDN1:%.*]], <vscale x 4 x i32> [[ZDN2:%.*]], <vscale x 4 x i32> [[ZM:%.*]]) +; CHECK-NEXT: store { <vscale x 4 x i32>, <vscale x 4 x i32> } zeroinitializer, ptr @__msan_retval_tls, align 8 +; CHECK-NEXT: ret { <vscale x 4 x i32>, <vscale x 4 x i32> } [[RES]] +; %res = call { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.aarch64.sve.add.single.x2.nxv4i32(<vscale x 4 x i32> %zdn1, <vscale x 4 x i32> %zdn2, <vscale x 4 x i32> %zm) @@ -276,6 +725,12 @@ define { <vscale x 4 x i32>, <vscale x 4 x i32> } @multi_vec_add_single_x2_s32(< } define { <vscale x 2 x i64>, <vscale x 2 x i64> } @multi_vec_add_single_x2_s64(<vscale x 2 x i64> %unused, <vscale x 2 x i64> %zdn1, <vscale x 2 x i64> %zdn2, <vscale x 2 x i64> %zm) sanitize_memory { +; CHECK-LABEL: @multi_vec_add_single_x2_s64( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[RES:%.*]] = call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.aarch64.sve.add.single.x2.nxv2i64(<vscale x 2 x i64> [[ZDN1:%.*]], <vscale x 2 x i64> [[ZDN2:%.*]], <vscale x 2 x i64> [[ZM:%.*]]) +; CHECK-NEXT: store { <vscale x 2 x i64>, <vscale x 2 x i64> } zeroinitializer, ptr @__msan_retval_tls, align 8 +; CHECK-NEXT: ret { <vscale x 2 x i64>, <vscale x 2 x i64> } [[RES]] +; %res = call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.aarch64.sve.add.single.x2.nxv2i64(<vscale x 2 x i64> %zdn1, <vscale x 2 x i64> %zdn2, <vscale x 2 x i64> %zm) @@ -284,6 +739,12 @@ define { <vscale x 2 x i64>, <vscale x 2 x i64> } @multi_vec_add_single_x2_s64(< define { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } @multi_vec_add_single_x4_s8(<vscale x 16 x i8> %unused, <vscale x 16 x i8> %zdn1, <vscale x 16 x i8> %zdn2, <vscale x 16 x i8> %zdn3, <vscale x 16 x i8> %zdn4, <vscale x 16 x i8>%zm) sanitize_memory { +; CHECK-LABEL: @multi_vec_add_single_x4_s8( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[RES:%.*]] = call { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.add.single.x4.nxv16i8(<vscale x 16 x i8> [[ZDN1:%.*]], <vscale x 16 x i8> [[ZDN2:%.*]], <vscale x 16 x i8> [[ZDN3:%.*]], <vscale x 16 x i8> [[ZDN4:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) +; CHECK-NEXT: store { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } zeroinitializer, ptr @__msan_retval_tls, align 8 +; CHECK-NEXT: ret { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } [[RES]] +; %res = call { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.add.single.x4.nxv16i8(<vscale x 16 x i8> %zdn1, <vscale x 16 x i8> %zdn2, <vscale x 16 x i8> %zdn3, <vscale x 16 x i8> %zdn4, @@ -292,6 +753,12 @@ define { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 1 } define { <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16> } @multi_vec_add_x4_single_s16(<vscale x 8 x i16> %unused, <vscale x 8 x i16> %zdn1, <vscale x 8 x i16> %zdn2, <vscale x 8 x i16> %zdn3, <vscale x 8 x i16> %zdn4, <vscale x 8 x i16> %zm) sanitize_memory { +; CHECK-LABEL: @multi_vec_add_x4_single_s16( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[RES:%.*]] = call { <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.aarch64.sve.add.single.x4.nxv8i16(<vscale x 8 x i16> [[ZDN1:%.*]], <vscale x 8 x i16> [[ZDN2:%.*]], <vscale x 8 x i16> [[ZDN3:%.*]], <vscale x 8 x i16> [[ZDN4:%.*]], <vscale x 8 x i16> [[ZM:%.*]]) +; CHECK-NEXT: store { <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16> } zeroinitializer, ptr @__msan_retval_tls, align 8 +; CHECK-NEXT: ret { <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16> } [[RES]] +; %res = call { <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.aarch64.sve.add.single.x4.nxv8i16(<vscale x 8 x i16> %zdn1, <vscale x 8 x i16> %zdn2, <vscale x 8 x i16> %zdn3, <vscale x 8 x i16> %zdn4, @@ -300,6 +767,12 @@ define { <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 } define { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } @multi_vec_add_x4_single_s32(<vscale x 4 x i32> %unused, <vscale x 4 x i32> %zdn1, <vscale x 4 x i32> %zdn2, <vscale x 4 x i32> %zdn3, <vscale x 4 x i32> %zdn4, <vscale x 4 x i32> %zm) sanitize_memory { +; CHECK-LABEL: @multi_vec_add_x4_single_s32( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[RES:%.*]] = call { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.aarch64.sve.add.single.x4.nxv4i32(<vscale x 4 x i32> [[ZDN1:%.*]], <vscale x 4 x i32> [[ZDN2:%.*]], <vscale x 4 x i32> [[ZDN3:%.*]], <vscale x 4 x i32> [[ZDN4:%.*]], <vscale x 4 x i32> [[ZM:%.*]]) +; CHECK-NEXT: store { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } zeroinitializer, ptr @__msan_retval_tls, align 8 +; CHECK-NEXT: ret { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[RES]] +; %res = call { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.aarch64.sve.add.single.x4.nxv4i32(<vscale x 4 x i32> %zdn1, <vscale x 4 x i32> %zdn2, <vscale x 4 x i32> %zdn3, <vscale x 4 x i32> %zdn4, @@ -308,6 +781,12 @@ define { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 } define { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } @multi_vec_add_x4_single_s64(<vscale x 2 x i64> %unused, <vscale x 2 x i64> %zdn1, <vscale x 2 x i64> %zdn2, <vscale x 2 x i64> %zdn3, <vscale x 2 x i64> %zdn4, <vscale x 2 x i64> %zm) sanitize_memory { +; CHECK-LABEL: @multi_vec_add_x4_single_s64( +; CHECK-NEXT: call void @llvm.donothing() +; CHECK-NEXT: [[RES:%.*]] = call { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.aarch64.sve.add.single.x4.nxv2i64(<vscale x 2 x i64> [[ZDN1:%.*]], <vscale x 2 x i64> [[ZDN2:%.*]], <vscale x 2 x i64> [[ZDN3:%.*]], <vscale x 2 x i64> [[ZDN4:%.*]], <vscale x 2 x i64> [[ZM:%.*]]) +; CHECK-NEXT: store { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } zeroinitializer, ptr @__msan_retval_tls, align 8 +; CHECK-NEXT: ret { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } [[RES]] +; %res = call { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.aarch64.sve.add.single.x4.nxv2i64(<vscale x 2 x i64> %zdn1, <vscale x 2 x i64> %zdn2, <vscale x 2 x i64> %zdn3, <vscale x 2 x i64> %zdn4, diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll index 63fd184..2570b3b 100644 --- a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll +++ b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll @@ -951,3 +951,41 @@ fallthrough: %v = add i32 %v1, %v2 ret i32 %v } + +; Make sure we don't simplify an incomplete expression tree. +define i8 @pr163453(ptr %p, i1 %cond) { +; CHECK-LABEL: define i8 @pr163453( +; CHECK-SAME: ptr [[P:%.*]], i1 [[COND:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[P_ADDR_0:%.*]] = getelementptr i8, ptr [[P]], i64 1 +; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[P]], align 1 +; CHECK-NEXT: [[INCDEC_PTR11:%.*]] = getelementptr i8, ptr [[P]], i64 2 +; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[COND]], ptr [[P_ADDR_0]], ptr [[INCDEC_PTR11]] +; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr [[SPEC_SELECT]], align 1 +; CHECK-NEXT: ret i8 [[LOAD]] +; +entry: + br label %for.cond + +for.cond: + %p.pn = phi ptr [ %p, %entry ], [ %p.addr.0, %for.inc ] + %p.addr.0 = getelementptr i8, ptr %p.pn, i64 1 + br i1 false, label %exit, label %for.body + +for.body: + %1 = load i8, ptr %p.pn, align 1 + br i1 false, label %for.inc, label %if.else + +if.else: + %incdec.ptr11 = getelementptr i8, ptr %p.pn, i64 2 + %spec.select = select i1 %cond, ptr %p.addr.0, ptr %incdec.ptr11 + br label %exit + +for.inc: + br label %for.cond + +exit: + %p.addr.3 = phi ptr [ %spec.select, %if.else ], [ %p.addr.0, %for.cond ] + %load = load i8, ptr %p.addr.3, align 1 + ret i8 %load +} diff --git a/llvm/unittests/ADT/CMakeLists.txt b/llvm/unittests/ADT/CMakeLists.txt index 848ccba..af503d9 100644 --- a/llvm/unittests/ADT/CMakeLists.txt +++ b/llvm/unittests/ADT/CMakeLists.txt @@ -63,6 +63,7 @@ add_llvm_unittest(ADTTests PointerUnionTest.cpp PostOrderIteratorTest.cpp PriorityWorklistTest.cpp + RadixTreeTest.cpp RangeAdapterTest.cpp RewriteBufferTest.cpp SCCIteratorTest.cpp diff --git a/llvm/unittests/ADT/RadixTreeTest.cpp b/llvm/unittests/ADT/RadixTreeTest.cpp new file mode 100644 index 0000000..b2dd67c --- /dev/null +++ b/llvm/unittests/ADT/RadixTreeTest.cpp @@ -0,0 +1,379 @@ +//===- llvm/unittest/ADT/RadixTreeTest.cpp --------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/RadixTree.h" +#include "llvm/ADT/ArrayRef.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/StringRef.h" +#include "gmock/gmock.h" +#include "gtest/gtest.h" +#include <iterator> +#include <list> +#include <vector> + +using namespace llvm; +namespace { + +using ::testing::ElementsAre; +using ::testing::ElementsAreArray; +using ::testing::Pair; +using ::testing::UnorderedElementsAre; + +// Test with StringRef. + +TEST(RadixTreeTest, Empty) { + RadixTree<StringRef, int> T; + EXPECT_TRUE(T.empty()); + EXPECT_EQ(T.size(), 0u); + + EXPECT_TRUE(T.find_prefixes("").empty()); + EXPECT_TRUE(T.find_prefixes("A").empty()); + + EXPECT_EQ(T.countNodes(), 1u); +} + +TEST(RadixTreeTest, InsertEmpty) { + RadixTree<StringRef, int> T; + auto [It, IsNew] = T.emplace("", 4); + EXPECT_TRUE(!T.empty()); + EXPECT_EQ(T.size(), 1u); + EXPECT_TRUE(IsNew); + const auto &[K, V] = *It; + EXPECT_TRUE(K.empty()); + EXPECT_EQ(4, V); + + EXPECT_THAT(T, ElementsAre(Pair("", 4))); + + EXPECT_THAT(T.find_prefixes(""), ElementsAre(Pair("", 4))); + + EXPECT_THAT(T.find_prefixes("a"), ElementsAre(Pair("", 4))); + + EXPECT_EQ(T.countNodes(), 1u); +} + +TEST(RadixTreeTest, Complex) { + RadixTree<StringRef, int> T; + T.emplace("abcd", 1); + EXPECT_EQ(T.countNodes(), 2u); + T.emplace("abklm", 2); + EXPECT_EQ(T.countNodes(), 4u); + T.emplace("123abklm", 3); + EXPECT_EQ(T.countNodes(), 5u); + T.emplace("123abklm", 4); + EXPECT_EQ(T.countNodes(), 5u); + T.emplace("ab", 5); + EXPECT_EQ(T.countNodes(), 5u); + T.emplace("1234567", 6); + EXPECT_EQ(T.countNodes(), 7u); + T.emplace("123456", 7); + EXPECT_EQ(T.countNodes(), 8u); + T.emplace("123456789", 8); + EXPECT_EQ(T.countNodes(), 9u); + + EXPECT_THAT(T, UnorderedElementsAre(Pair("abcd", 1), Pair("abklm", 2), + Pair("123abklm", 3), Pair("ab", 5), + Pair("1234567", 6), Pair("123456", 7), + Pair("123456789", 8))); + + EXPECT_THAT(T.find_prefixes("1234567890"), + UnorderedElementsAre(Pair("1234567", 6), Pair("123456", 7), + Pair("123456789", 8))); + + EXPECT_THAT(T.find_prefixes("123abklm"), + UnorderedElementsAre(Pair("123abklm", 3))); + + EXPECT_THAT(T.find_prefixes("abcdefg"), + UnorderedElementsAre(Pair("abcd", 1), Pair("ab", 5))); + + EXPECT_EQ(T.countNodes(), 9u); +} + +TEST(RadixTreeTest, ValueWith2Parameters) { + RadixTree<StringRef, std::pair<std::string, int>> T; + T.emplace("abcd", "a", 3); + + EXPECT_THAT(T, UnorderedElementsAre(Pair("abcd", Pair("a", 3)))); +} + +// Test different types, less readable. + +template <typename T> struct TestData { + static const T Data1[]; + static const T Data2[]; +}; + +template <> const char TestData<char>::Data1[] = "abcdedcba"; +template <> const char TestData<char>::Data2[] = "abCDEDCba"; + +template <> const int TestData<int>::Data1[] = {1, 2, 3, 4, 5, 4, 3, 2, 1}; +template <> const int TestData<int>::Data2[] = {1, 2, 4, 8, 16, 8, 4, 2, 1}; + +template <typename T> class RadixTreeTypeTest : public ::testing::Test { +public: + using IteratorType = decltype(adl_begin(std::declval<const T &>())); + using CharType = remove_cvref_t<decltype(*adl_begin(std::declval<T &>()))>; + + T make(const CharType *Data, size_t N) { return T(StringRef(Data, N)); } + + T make1(size_t N) { return make(TestData<CharType>::Data1, N); } + T make2(size_t N) { return make(TestData<CharType>::Data2, N); } +}; + +template <> +iterator_range<StringRef::const_iterator> +RadixTreeTypeTest<iterator_range<StringRef::const_iterator>>::make( + const char *Data, size_t N) { + return StringRef(Data).take_front(N); +} + +template <> +iterator_range<StringRef::const_reverse_iterator> +RadixTreeTypeTest<iterator_range<StringRef::const_reverse_iterator>>::make( + const char *Data, size_t N) { + return reverse(StringRef(Data).take_back(N)); +} + +template <> +ArrayRef<int> RadixTreeTypeTest<ArrayRef<int>>::make(const int *Data, + size_t N) { + return ArrayRef<int>(Data, Data + N); +} + +template <> +std::vector<int> RadixTreeTypeTest<std::vector<int>>::make(const int *Data, + size_t N) { + return std::vector<int>(Data, Data + N); +} + +template <> +std::list<int> RadixTreeTypeTest<std::list<int>>::make(const int *Data, + size_t N) { + return std::list<int>(Data, Data + N); +} + +class TypeNameGenerator { +public: + template <typename T> static std::string GetName(int) { + if (std::is_same_v<T, StringRef>) + return "StringRef"; + if (std::is_same_v<T, std::string>) + return "string"; + if (std::is_same_v<T, iterator_range<StringRef::const_iterator>>) + return "iterator_range"; + if (std::is_same_v<T, iterator_range<StringRef::const_reverse_iterator>>) + return "reverse_iterator_range"; + if (std::is_same_v<T, ArrayRef<int>>) + return "ArrayRef"; + if (std::is_same_v<T, std::vector<int>>) + return "vector"; + if (std::is_same_v<T, std::list<int>>) + return "list"; + return "Unknown"; + } +}; + +using TestTypes = + ::testing::Types<StringRef, std::string, + iterator_range<StringRef::const_iterator>, + iterator_range<StringRef::const_reverse_iterator>, + ArrayRef<int>, std::vector<int>, std::list<int>>; + +TYPED_TEST_SUITE(RadixTreeTypeTest, TestTypes, TypeNameGenerator); + +TYPED_TEST(RadixTreeTypeTest, Helpers) { + for (size_t i = 0; i < 9; ++i) { + auto R1 = this->make1(i); + auto R2 = this->make2(i); + EXPECT_EQ(llvm::range_size(R1), i); + EXPECT_EQ(llvm::range_size(R2), i); + auto [I1, I2] = llvm::mismatch(R1, R2); + // Exactly 2 first elements of Data1 and Data2 must match. + EXPECT_EQ(std::distance(R1.begin(), I1), std::min<int>(2, i)); + } +} + +TYPED_TEST(RadixTreeTypeTest, Empty) { + RadixTree<TypeParam, int> T; + EXPECT_TRUE(T.empty()); + EXPECT_EQ(T.size(), 0u); + + EXPECT_TRUE(T.find_prefixes(this->make1(0)).empty()); + EXPECT_TRUE(T.find_prefixes(this->make2(1)).empty()); + + EXPECT_EQ(T.countNodes(), 1u); +} + +TYPED_TEST(RadixTreeTypeTest, InsertEmpty) { + using TreeType = RadixTree<TypeParam, int>; + TreeType T; + auto [It, IsNew] = T.emplace(this->make1(0), 5); + EXPECT_TRUE(!T.empty()); + EXPECT_EQ(T.size(), 1u); + EXPECT_TRUE(IsNew); + const auto &[K, V] = *It; + EXPECT_TRUE(K.empty()); + EXPECT_EQ(5, V); + + EXPECT_THAT(T.find_prefixes(this->make1(0)), + ElementsAre(Pair(ElementsAre(), 5))); + + EXPECT_THAT(T.find_prefixes(this->make2(1)), + ElementsAre(Pair(ElementsAre(), 5))); + + EXPECT_THAT(T, ElementsAre(Pair(ElementsAre(), 5))); + + EXPECT_EQ(T.countNodes(), 1u); +} + +TYPED_TEST(RadixTreeTypeTest, InsertEmptyTwice) { + using TreeType = RadixTree<TypeParam, int>; + TreeType T; + T.emplace(this->make1(0), 5); + auto [It, IsNew] = T.emplace(this->make1(0), 6); + EXPECT_TRUE(!T.empty()); + EXPECT_EQ(T.size(), 1u); + EXPECT_TRUE(!IsNew); + const auto &[K, V] = *It; + EXPECT_TRUE(K.empty()); + EXPECT_EQ(5, V); + + EXPECT_THAT(T.find_prefixes(this->make1(0)), + ElementsAre(Pair(ElementsAre(), 5))); + + EXPECT_THAT(T.find_prefixes(this->make2(1)), + ElementsAre(Pair(ElementsAre(), 5))); + + EXPECT_THAT(T, ElementsAre(Pair(ElementsAre(), 5))); + + EXPECT_EQ(T.countNodes(), 1u); +} + +TYPED_TEST(RadixTreeTypeTest, InsertOne) { + using TreeType = RadixTree<TypeParam, int>; + TreeType T; + auto [It, IsNew] = T.emplace(this->make1(1), 4); + EXPECT_TRUE(!T.empty()); + EXPECT_EQ(T.size(), 1u); + EXPECT_TRUE(IsNew); + const auto &[K, V] = *It; + EXPECT_THAT(K, ElementsAreArray(this->make1(1))); + EXPECT_EQ(4, V); + + EXPECT_THAT(T, ElementsAre(Pair(ElementsAreArray(this->make1(1)), 4))); + + EXPECT_THAT(T.find_prefixes(this->make1(1)), + ElementsAre(Pair(ElementsAreArray(this->make1(1)), 4))); + + EXPECT_THAT(T.find_prefixes(this->make1(2)), + ElementsAre(Pair(ElementsAreArray(this->make1(1)), 4))); + + EXPECT_EQ(T.countNodes(), 2u); +} + +TYPED_TEST(RadixTreeTypeTest, InsertOneTwice) { + using TreeType = RadixTree<TypeParam, int>; + TreeType T; + T.emplace(this->make1(1), 4); + auto [It, IsNew] = T.emplace(this->make1(1), 4); + EXPECT_TRUE(!T.empty()); + EXPECT_EQ(T.size(), 1u); + EXPECT_TRUE(!IsNew); + + EXPECT_THAT(T, ElementsAre(Pair(ElementsAreArray(this->make1(1)), 4))); + EXPECT_EQ(T.countNodes(), 2u); +} + +TYPED_TEST(RadixTreeTypeTest, InsertSuperStrings) { + using TreeType = RadixTree<TypeParam, int>; + TreeType T; + + for (size_t Len = 0; Len < 7; Len += 2) { + auto [It, IsNew] = T.emplace(this->make1(Len), Len); + EXPECT_TRUE(IsNew); + } + + EXPECT_THAT(T, + UnorderedElementsAre(Pair(ElementsAreArray(this->make1(0)), 0), + Pair(ElementsAreArray(this->make1(2)), 2), + Pair(ElementsAreArray(this->make1(4)), 4), + Pair(ElementsAreArray(this->make1(6)), 6))); + + EXPECT_THAT(T.find_prefixes(this->make1(0)), + UnorderedElementsAre(Pair(ElementsAreArray(this->make1(0)), 0))); + + EXPECT_THAT(T.find_prefixes(this->make1(3)), + UnorderedElementsAre(Pair(ElementsAreArray(this->make1(0)), 0), + Pair(ElementsAreArray(this->make1(2)), 2))); + + EXPECT_THAT(T.find_prefixes(this->make1(7)), + UnorderedElementsAre(Pair(ElementsAreArray(this->make1(0)), 0), + Pair(ElementsAreArray(this->make1(2)), 2), + Pair(ElementsAreArray(this->make1(4)), 4), + Pair(ElementsAreArray(this->make1(6)), 6))); + + EXPECT_EQ(T.countNodes(), 4u); +} + +TYPED_TEST(RadixTreeTypeTest, InsertSubStrings) { + using TreeType = RadixTree<TypeParam, int>; + TreeType T; + + for (size_t Len = 0; Len < 7; Len += 2) { + auto [It, IsNew] = T.emplace(this->make1(7 - Len), 7 - Len); + EXPECT_TRUE(IsNew); + } + + EXPECT_THAT(T, + UnorderedElementsAre(Pair(ElementsAreArray(this->make1(1)), 1), + Pair(ElementsAreArray(this->make1(3)), 3), + Pair(ElementsAreArray(this->make1(5)), 5), + Pair(ElementsAreArray(this->make1(7)), 7))); + + EXPECT_THAT(T.find_prefixes(this->make1(0)), UnorderedElementsAre()); + + EXPECT_THAT(T.find_prefixes(this->make1(3)), + UnorderedElementsAre(Pair(ElementsAreArray(this->make1(1)), 1), + Pair(ElementsAreArray(this->make1(3)), 3))); + + EXPECT_THAT(T.find_prefixes(this->make1(6)), + UnorderedElementsAre(Pair(ElementsAreArray(this->make1(1)), 1), + Pair(ElementsAreArray(this->make1(3)), 3), + Pair(ElementsAreArray(this->make1(5)), 5))); + + EXPECT_EQ(T.countNodes(), 5u); +} + +TYPED_TEST(RadixTreeTypeTest, InsertVShape) { + using TreeType = RadixTree<TypeParam, int>; + TreeType T; + + EXPECT_EQ(T.countNodes(), 1u); + T.emplace(this->make1(5), 15); + EXPECT_EQ(T.countNodes(), 2u); + T.emplace(this->make2(6), 26); + EXPECT_EQ(T.countNodes(), 4u); + T.emplace(this->make2(1), 21); + EXPECT_EQ(T.countNodes(), 5u); + + EXPECT_THAT(T, + UnorderedElementsAre(Pair(ElementsAreArray(this->make1(5)), 15), + Pair(ElementsAreArray(this->make2(6)), 26), + Pair(ElementsAreArray(this->make2(1)), 21))); + + EXPECT_THAT(T.find_prefixes(this->make1(7)), + UnorderedElementsAre(Pair(ElementsAreArray(this->make2(1)), 21), + Pair(ElementsAreArray(this->make1(5)), 15))); + + EXPECT_THAT(T.find_prefixes(this->make2(7)), + UnorderedElementsAre(Pair(ElementsAreArray(this->make2(1)), 21), + Pair(ElementsAreArray(this->make2(6)), 26))); + + EXPECT_EQ(T.countNodes(), 5u); +} + +} // namespace diff --git a/llvm/unittests/ADT/STLForwardCompatTest.cpp b/llvm/unittests/ADT/STLForwardCompatTest.cpp index 2a97e8d..c6ae6e3 100644 --- a/llvm/unittests/ADT/STLForwardCompatTest.cpp +++ b/llvm/unittests/ADT/STLForwardCompatTest.cpp @@ -185,7 +185,7 @@ TEST(TransformTest, ToUnderlying) { } TEST(STLForwardCompatTest, IdentityCxx20) { - llvm::identity_cxx20 identity; + llvm::identity identity; // Test with an lvalue. int X = 42; diff --git a/llvm/unittests/DebugInfo/LogicalView/CompareElementsTest.cpp b/llvm/unittests/DebugInfo/LogicalView/CompareElementsTest.cpp index e9c1fba..d3bf26b 100644 --- a/llvm/unittests/DebugInfo/LogicalView/CompareElementsTest.cpp +++ b/llvm/unittests/DebugInfo/LogicalView/CompareElementsTest.cpp @@ -75,8 +75,8 @@ public: setInstance(this); } - Error createScopes() { return LVReader::createScopes(); } - Error printScopes() { return LVReader::printScopes(); } + Error createScopes() override { return LVReader::createScopes(); } + Error printScopes() override { return LVReader::printScopes(); } void createElements(); void addElements(bool IsReference, bool IsTarget); diff --git a/llvm/unittests/DebugInfo/LogicalView/LocationRangesTest.cpp b/llvm/unittests/DebugInfo/LogicalView/LocationRangesTest.cpp index 8694971..7cd6813 100644 --- a/llvm/unittests/DebugInfo/LogicalView/LocationRangesTest.cpp +++ b/llvm/unittests/DebugInfo/LogicalView/LocationRangesTest.cpp @@ -34,7 +34,7 @@ protected: public: ReaderTest(ScopedPrinter &W) : LVReader("", "", W) { setInstance(this); } - Error createScopes() { return LVReader::createScopes(); } + Error createScopes() override { return LVReader::createScopes(); } }; // Helper function to add a logical element to a given scope. diff --git a/llvm/unittests/DebugInfo/LogicalView/LogicalElementsTest.cpp b/llvm/unittests/DebugInfo/LogicalView/LogicalElementsTest.cpp index 8aa856a..866739f 100644 --- a/llvm/unittests/DebugInfo/LogicalView/LogicalElementsTest.cpp +++ b/llvm/unittests/DebugInfo/LogicalView/LogicalElementsTest.cpp @@ -72,8 +72,8 @@ public: setInstance(this); } - Error createScopes() { return LVReader::createScopes(); } - Error printScopes() { return LVReader::printScopes(); } + Error createScopes() override { return LVReader::createScopes(); } + Error printScopes() override { return LVReader::printScopes(); } void createElements(); void addElements(); diff --git a/llvm/unittests/DebugInfo/LogicalView/SelectElementsTest.cpp b/llvm/unittests/DebugInfo/LogicalView/SelectElementsTest.cpp index 70835ce..2653347 100644 --- a/llvm/unittests/DebugInfo/LogicalView/SelectElementsTest.cpp +++ b/llvm/unittests/DebugInfo/LogicalView/SelectElementsTest.cpp @@ -60,7 +60,7 @@ public: setInstance(this); } - Error createScopes() { return LVReader::createScopes(); } + Error createScopes() override { return LVReader::createScopes(); } void createElements(); void addElements(); diff --git a/llvm/unittests/DebugInfo/LogicalView/WarningInternalTest.cpp b/llvm/unittests/DebugInfo/LogicalView/WarningInternalTest.cpp index 36c6e16..011321b 100644 --- a/llvm/unittests/DebugInfo/LogicalView/WarningInternalTest.cpp +++ b/llvm/unittests/DebugInfo/LogicalView/WarningInternalTest.cpp @@ -117,7 +117,7 @@ public: setInstance(this); } - Error createScopes() { return LVReader::createScopes(); } + Error createScopes() override { return LVReader::createScopes(); } void setMapping(); void createElements(); diff --git a/llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt b/llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt index 7b563d7..b06aa25 100644 --- a/llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt +++ b/llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt @@ -26,7 +26,6 @@ add_llvm_unittest(OrcJITTests IndirectionUtilsTest.cpp JITTargetMachineBuilderTest.cpp LazyCallThroughAndReexportsTest.cpp - LibraryResolverTest.cpp LookupAndRecordAddrsTest.cpp MachOPlatformTest.cpp MapperJITLinkMemoryManagerTest.cpp diff --git a/llvm/unittests/ExecutionEngine/Orc/Inputs/A/A_linux.yaml b/llvm/unittests/ExecutionEngine/Orc/Inputs/A/A_linux.yaml deleted file mode 100644 index afd1d9e..0000000 --- a/llvm/unittests/ExecutionEngine/Orc/Inputs/A/A_linux.yaml +++ /dev/null @@ -1,460 +0,0 @@ ---- !ELF -FileHeader: - Class: ELFCLASS64 - Data: ELFDATA2LSB - Type: ET_DYN - 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Address: 0x3F68 - Other: 0x0 - ImportName: '' - NameList: - - n_strx: 2 - n_type: 0xF - n_sect: 1 - n_desc: 0 - n_value: 16232 - - n_strx: 8 - n_type: 0x1 - n_sect: 0 - n_desc: 256 - n_value: 0 - StringTable: - - ' ' - - _sayZ - - _printf - IndirectSymbols: [ 0x1, 0x1 ] - FunctionStarts: [ 0x3F68 ] - ChainedFixups: [ 0x0, 0x0, 0x0, 0x0, 0x20, 0x0, 0x0, 0x0, 0x48, - 0x0, 0x0, 0x0, 0x50, 0x0, 0x0, 0x0, 0x1, 0x0, - 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x10, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x18, 0x0, 0x0, 0x0, 0x0, 0x40, 0xC, 0x0, - 0x0, 0x40, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x2, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x5F, 0x70, 0x72, - 0x69, 0x6E, 0x74, 0x66, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0 ] -... diff --git a/llvm/unittests/ExecutionEngine/Orc/LibraryResolverTest.cpp b/llvm/unittests/ExecutionEngine/Orc/LibraryResolverTest.cpp deleted file mode 100644 index f6990ee..0000000 --- a/llvm/unittests/ExecutionEngine/Orc/LibraryResolverTest.cpp +++ /dev/null @@ -1,896 +0,0 @@ -//===- LibraryResolverTest.cpp - Unit tests for LibraryResolver -===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#include "llvm/ExecutionEngine/Orc/TargetProcess/LibraryResolver.h" -#include "llvm/ExecutionEngine/Orc/JITTargetMachineBuilder.h" -#include "llvm/ExecutionEngine/Orc/TargetProcess/LibraryScanner.h" -#include "llvm/ObjectYAML/MachOYAML.h" -#include "llvm/ObjectYAML/yaml2obj.h" -#include "llvm/Support/FileSystem.h" -#include "llvm/Support/MemoryBuffer.h" -#include "llvm/Support/Path.h" -#include "llvm/Support/YAMLParser.h" -#include "llvm/Support/YAMLTraits.h" -#include "llvm/Support/raw_ostream.h" - -#include "llvm/Testing/Support/SupportHelpers.h" - -#include "gtest/gtest.h" - -#include <algorithm> -#include <optional> -#include <string> -#include <vector> - -using namespace llvm; -using namespace llvm::orc; - -#if defined(__APPLE__) || defined(__linux__) -// TODO: Add COFF (Windows) support for these tests. -// this facility also works correctly on Windows (COFF), -// so we should eventually enable and run these tests for that platform as well. -namespace { - -#if defined(__APPLE__) -constexpr const char *ext = ".dylib"; -#elif defined(_WIN32) -constexpr const char *ext = ".dll"; -#else -constexpr const char *ext = ".so"; -#endif - -bool EnvReady = false; - -Triple getTargetTriple() { - auto JTMB = JITTargetMachineBuilder::detectHost(); - if (!JTMB) { - consumeError(JTMB.takeError()); - return Triple(); - } - return JTMB->getTargetTriple(); -} - -static bool CheckHostSupport() { - auto Triple = getTargetTriple(); - // TODO: Extend support to COFF (Windows) once test setup and YAML conversion - // are verified. - if (!Triple.isOSBinFormatMachO() && - !(Triple.isOSBinFormatELF() && Triple.getArch() == Triple::x86_64)) - return false; - - return true; -} - -std::string getYamlFilePlatformExt() { - auto Triple = getTargetTriple(); - if (Triple.isOSBinFormatMachO()) - return "_macho"; - else if (Triple.isOSBinFormatELF()) - return "_linux"; - - return ""; -} - -unsigned getYamlDocNum() { - // auto Triple = getTargetTriple(); - // if (Triple.isOSBinFormatELF()) - // return 1; - - return 1; -} - -class LibraryTestEnvironment : public ::testing::Environment { - std::vector<std::string> CreatedDylibsDir; - std::vector<std::string> CreatedDylibs; - SmallVector<char, 128> DirPath; - -public: - void SetUp() override { - if (!CheckHostSupport()) { - EnvReady = false; - return; - } - - StringRef ThisFile = __FILE__; - SmallVector<char, 128> InputDirPath(ThisFile.begin(), ThisFile.end()); - sys::path::remove_filename(InputDirPath); - sys::path::append(InputDirPath, "Inputs"); - if (!sys::fs::exists(InputDirPath)) - return; - - SmallString<128> UniqueDir; - sys::path::append(UniqueDir, InputDirPath); - std::error_code EC = sys::fs::createUniqueDirectory(UniqueDir, DirPath); - - if (EC) - return; - - // given yamlPath + DylibPath, validate + convert - auto processYamlToDylib = [&](const SmallVector<char, 128> &YamlPath, - const SmallVector<char, 128> &DylibPath, - unsigned DocNum) -> bool { - if (!sys::fs::exists(YamlPath)) { - errs() << "YAML file missing: " - << StringRef(YamlPath.data(), YamlPath.size()) << "\n"; - EnvReady = false; - return false; - } - - auto BufOrErr = MemoryBuffer::getFile(YamlPath); - if (!BufOrErr) { - errs() << "Failed to read " - << StringRef(YamlPath.data(), YamlPath.size()) << ": " - << BufOrErr.getError().message() << "\n"; - EnvReady = false; - return false; - } - - yaml::Input yin(BufOrErr->get()->getBuffer()); - std::error_code EC; - raw_fd_ostream outFile(StringRef(DylibPath.data(), DylibPath.size()), EC, - sys::fs::OF_None); - - if (EC) { - errs() << "Failed to open " - << StringRef(DylibPath.data(), DylibPath.size()) - << " for writing: " << EC.message() << "\n"; - EnvReady = false; - return false; - } - - if (!yaml::convertYAML( - yin, outFile, - [](const Twine &M) { - // Handle or ignore errors here - errs() << "Yaml Error :" << M << "\n"; - }, - DocNum)) { - errs() << "Failed to convert " - << StringRef(YamlPath.data(), YamlPath.size()) << " to " - << StringRef(DylibPath.data(), DylibPath.size()) << "\n"; - EnvReady = false; - return false; - } - - CreatedDylibsDir.push_back(std::string(sys::path::parent_path( - StringRef(DylibPath.data(), DylibPath.size())))); - CreatedDylibs.push_back(std::string(DylibPath.begin(), DylibPath.end())); - return true; - }; - - std::vector<const char *> LibDirs = {"Z", "A", "B", "C", "D"}; - - unsigned DocNum = getYamlDocNum(); - std::string YamlPltExt = getYamlFilePlatformExt(); - for (const auto &LibdirName : LibDirs) { - // YAML path - SmallVector<char, 128> YamlPath(InputDirPath.begin(), InputDirPath.end()); - SmallVector<char, 128> YamlFileName; - YamlFileName.append(LibdirName, LibdirName + strlen(LibdirName)); - YamlFileName.append(YamlPltExt.begin(), YamlPltExt.end()); - sys::path::append(YamlPath, LibdirName, YamlFileName); - sys::path::replace_extension(YamlPath, ".yaml"); - - // dylib path - SmallVector<char, 128> DylibPath(DirPath.begin(), DirPath.end()); - SmallVector<char, 128> DylibFileName; - StringRef prefix("lib"); - DylibFileName.append(prefix.begin(), prefix.end()); - DylibFileName.append(LibdirName, LibdirName + strlen(LibdirName)); - - sys::path::append(DylibPath, LibdirName); - if (!sys::fs::exists(DylibPath)) { - auto EC = sys::fs::create_directory(DylibPath); - if (EC) - return; - } - sys::path::append(DylibPath, DylibFileName); - sys::path::replace_extension(DylibPath, ext); - if (!processYamlToDylib(YamlPath, DylibPath, DocNum)) - return; - } - - EnvReady = true; - } - - void TearDown() override { sys::fs::remove_directories(DirPath); } - - std::string getBaseDir() const { - return std::string(DirPath.begin(), DirPath.end()); - } - - std::vector<std::string> getDylibPaths() const { return CreatedDylibs; } -}; - -static LibraryTestEnvironment *GlobalEnv = - static_cast<LibraryTestEnvironment *>( - ::testing::AddGlobalTestEnvironment(new LibraryTestEnvironment())); - -inline std::string libPath(const std::string &BaseDir, - const std::string &name) { -#if defined(__APPLE__) - return BaseDir + "/" + name + ".dylib"; -#elif defined(_WIN32) - return BaseDir + "/" + name + ".dll"; -#else - return BaseDir + "/" + name + ".so"; -#endif -} - -inline std::string withext(const std::string &lib) { - SmallString<128> P(lib); - sys::path::replace_extension(P, ext); - return P.str().str(); -} - -inline std::string platformSymbolName(const std::string &name) { -#if defined(__APPLE__) - return "_" + name; // macOS prepends underscore -#else - return name; -#endif -} - -struct TestLibrary { - std::string path; - std::vector<std::string> Syms; -}; - -class LibraryResolverIT : public ::testing::Test { -protected: - std::string BaseDir; - std::unordered_map<std::string, TestLibrary> libs; - - void addLib(const std::string &name) { - SmallString<512> path; - sys::fs::real_path(libPath(BaseDir, name + "/lib" + name), path); - if (path.empty()) - EnvReady = false; - libs[name] = {path.str().str(), {platformSymbolName("say" + name)}}; - } - - void SetUp() override { - if (!EnvReady) - GTEST_SKIP() << "Skipping test: environment setup failed."; - - ASSERT_NE(GlobalEnv, nullptr); - BaseDir = GlobalEnv->getBaseDir(); - for (const auto &P : GlobalEnv->getDylibPaths()) { - if (!sys::fs::exists(P)) - GTEST_SKIP(); - } - const std::vector<std::string> libNames = {"A", "B", "C", "D", "Z"}; - for (const auto &name : libNames) - addLib(name); - - if (!EnvReady) - GTEST_SKIP() << "Skipping test: environment setup failed."; - } - - const std::vector<std::string> &sym(const std::string &key) { - return libs[key].Syms; - } - const std::string &lib(const std::string &key) { return libs[key].path; } - const std::string libdir(const std::string &key) { - SmallString<512> P(libs[key].path); - sys::path::remove_filename(P); - return P.str().str(); - } - const std::string libname(const std::string &key) { - return sys::path::filename(libs[key].path).str(); - } -}; - -// Helper: allow either "sayA" or "_sayA" depending on how your SymbolEnumerator -// reports. -static bool matchesEitherUnderscore(const std::string &got, - const std::string &bare) { - return got == bare || got == ("_" + bare); -} - -// Helper: normalize path ending check (we only care that it resolved to the -// right dylib) -static bool endsWith(const std::string &s, const std::string &suffix) { - if (s.size() < suffix.size()) - return false; - return std::equal(suffix.rbegin(), suffix.rend(), s.rbegin()); -} - -// --- 1) SymbolEnumerator enumerates real exports from libC.dylib --- -TEST_F(LibraryResolverIT, EnumerateSymbolsFromARespectsDefaults) { - const std::string libC = lib("C"); - - SymbolEnumeratorOptions Opts = SymbolEnumeratorOptions::defaultOptions(); - - std::vector<std::string> seen; - auto onEach = [&](llvm::StringRef sym) -> EnumerateResult { - seen.emplace_back(sym.str()); - return EnumerateResult::Continue; - }; - - const bool ok = SymbolEnumerator::enumerateSymbols(libC, onEach, Opts); - ASSERT_TRUE(ok) << "enumerateSymbols failed on " << libC; - - // We expect to see sayA (export) and not an undefined reference to printf. - bool foundSayA = false; - for (const auto &s : seen) { - if (matchesEitherUnderscore(s, "sayA")) { - foundSayA = true; - break; - } - } - EXPECT_FALSE(foundSayA) << "Expected exported symbol sayA in libC"; -} - -TEST_F(LibraryResolverIT, EnumerateSymbols_ExportsOnly_DefaultFlags) { - const std::string libC = lib("C"); - SymbolEnumeratorOptions Opts = SymbolEnumeratorOptions::defaultOptions(); - - std::vector<std::string> seen; - auto onEach = [&](llvm::StringRef sym) -> EnumerateResult { - seen.emplace_back(sym.str()); - return EnumerateResult::Continue; - }; - - ASSERT_TRUE(SymbolEnumerator::enumerateSymbols(libC, onEach, Opts)); - - // sayC is exported, others are undefined → only sayC expected - EXPECT_TRUE(any_of(seen, [&](const std::string &s) { - return matchesEitherUnderscore(s, "sayC"); - })); - EXPECT_FALSE(any_of(seen, [&](const std::string &s) { - return matchesEitherUnderscore(s, "sayA"); - })); - EXPECT_FALSE(any_of(seen, [&](const std::string &s) { - return matchesEitherUnderscore(s, "sayB"); - })); - EXPECT_FALSE(any_of(seen, [&](const std::string &s) { - return matchesEitherUnderscore(s, "sayZ"); - })); -} - -TEST_F(LibraryResolverIT, EnumerateSymbols_IncludesUndefineds) { - const std::string libC = lib("C"); - - SymbolEnumeratorOptions Opts; - Opts.FilterFlags = - SymbolEnumeratorOptions::IgnoreWeak | - SymbolEnumeratorOptions::IgnoreIndirect; // no IgnoreUndefined - - std::vector<std::string> seen; - auto onEach = [&](llvm::StringRef sym) -> EnumerateResult { - seen.emplace_back(sym.str()); - return EnumerateResult::Continue; - }; - - ASSERT_TRUE(SymbolEnumerator::enumerateSymbols(libC, onEach, Opts)); - - // Now we should see both sayC (export) and the undefined refs sayA, sayB, - // sayZ - EXPECT_TRUE(any_of(seen, [&](const std::string &s) { - return matchesEitherUnderscore(s, "sayC"); - })); - EXPECT_TRUE(any_of(seen, [&](const std::string &s) { - return matchesEitherUnderscore(s, "sayA"); - })); - EXPECT_TRUE(any_of(seen, [&](const std::string &s) { - return matchesEitherUnderscore(s, "sayB"); - })); - EXPECT_TRUE(any_of(seen, [&](const std::string &s) { - return matchesEitherUnderscore(s, "sayZ"); - })); -} - -TEST_F(LibraryResolverIT, EnumerateSymbols_IndirectExportRespected) { - const std::string libD = lib("D"); - - SymbolEnumeratorOptions Opts; - Opts.FilterFlags = SymbolEnumeratorOptions::IgnoreWeak; // allow indirects - - std::vector<std::string> seen; - auto onEach = [&](llvm::StringRef sym) -> EnumerateResult { - seen.emplace_back(sym.str()); - return EnumerateResult::Continue; - }; - - ASSERT_TRUE(SymbolEnumerator::enumerateSymbols(libD, onEach, Opts)); - - // sayA is re-exported from A, so should appear unless IgnoreIndirect was set - EXPECT_TRUE(any_of(seen, [&](const std::string &s) { - return matchesEitherUnderscore(s, "sayA"); - })); -} - -// --- 2) Filters: if we remove IgnoreUndefined, we should also see undefineds -// like printf --- -TEST_F(LibraryResolverIT, EnumerateSymbolsIncludesUndefWhenNotIgnored) { - const std::string libA = lib("A"); - - SymbolEnumeratorOptions Opts = SymbolEnumeratorOptions::defaultOptions(); - // Start from defaults but allow undefined - Opts.FilterFlags &= ~SymbolEnumeratorOptions::IgnoreUndefined; - - bool SawPrintf = false; - auto onEach = [&](llvm::StringRef sym) -> EnumerateResult { - if (matchesEitherUnderscore(sym.str(), "printf") || - matchesEitherUnderscore(sym.str(), "puts")) - SawPrintf = true; - return EnumerateResult::Continue; - }; - - ASSERT_TRUE(SymbolEnumerator::enumerateSymbols(libA, onEach, Opts)); - EXPECT_TRUE(SawPrintf) - << "Expected to see undefined symbol printf when not filtered"; -} - -// --- 3) Full resolution via LibraryResolutionDriver/LibraryResolver --- -TEST_F(LibraryResolverIT, DriverResolvesSymbolsToCorrectLibraries) { - // Create the resolver from real base paths (our fixtures dir) - auto Stup = LibraryResolver::Setup::create({BaseDir}); - - // Full system behavior: no mocks - auto Driver = LibraryResolutionDriver::create(Stup); - ASSERT_NE(Driver, nullptr); - - // Tell the Driver about the scan path kinds (User/System) as your production - // code expects. - Driver->addScanPath(libdir("A"), PathType::User); - Driver->addScanPath(libdir("B"), PathType::User); - Driver->addScanPath(libdir("Z"), PathType::User); - - // Symbols to resolve (bare names; class handles underscore differences - // internally) - std::vector<std::string> Syms = {platformSymbolName("sayA"), - platformSymbolName("sayB"), - platformSymbolName("sayZ")}; - - bool CallbackRan = false; - Driver->resolveSymbols(Syms, [&](SymbolQuery &Q) { - CallbackRan = true; - - // sayA should resolve to A.dylib - { - auto lib = Q.getResolvedLib(platformSymbolName("sayA")); - ASSERT_TRUE(lib.has_value()) << "sayA should be resolved"; - EXPECT_TRUE(endsWith(lib->str(), libname("A"))) - << "sayA resolved to: " << lib->str(); - } - - // sayB should resolve to B.dylib - { - auto lib = Q.getResolvedLib(platformSymbolName("sayB")); - ASSERT_TRUE(lib.has_value()) << "sayB should be resolved"; - EXPECT_TRUE(endsWith(lib->str(), libname("B"))) - << "sayB resolved to: " << lib->str(); - } - - // sayZ should resolve to B.dylib - { - auto lib = Q.getResolvedLib(platformSymbolName("sayZ")); - ASSERT_TRUE(lib.has_value()) << "sayZ should be resolved"; - EXPECT_TRUE(endsWith(lib->str(), libname("Z"))) - << "sayZ resolved to: " << lib->str(); - } - - EXPECT_TRUE(Q.allResolved()); - }); - - EXPECT_TRUE(CallbackRan); -} - -// --- 4) Cross-library reference visibility (C references A) --- -TEST_F(LibraryResolverIT, EnumeratorSeesInterLibraryRelationship) { - const std::string libC = lib("C"); - - SymbolEnumeratorOptions OnlyUndef = SymbolEnumeratorOptions::defaultOptions(); - // Show only undefined (drop IgnoreUndefined) to see C's reference to sayA - OnlyUndef.FilterFlags &= ~SymbolEnumeratorOptions::IgnoreUndefined; - - bool SawSayAAsUndef = false; - auto onEach = [&](llvm::StringRef sym) -> EnumerateResult { - if (matchesEitherUnderscore(sym.str(), "sayA")) - SawSayAAsUndef = true; - return EnumerateResult::Continue; - }; - - ASSERT_TRUE(SymbolEnumerator::enumerateSymbols(libC, onEach, OnlyUndef)); - EXPECT_TRUE(SawSayAAsUndef) - << "libC should have an undefined reference to sayA (defined in libA)"; -} - -// // // --- 5) Optional: stress SymbolQuery with the real resolve flow -// // // And resolve libC dependency libA, libB, libZ --- -TEST_F(LibraryResolverIT, ResolveManySymbols) { - auto Stup = LibraryResolver::Setup::create({BaseDir}); - auto Driver = LibraryResolutionDriver::create(Stup); - ASSERT_NE(Driver, nullptr); - Driver->addScanPath(libdir("C"), PathType::User); - - // Many duplicates to provoke concurrent updates inside SymbolQuery - std::vector<std::string> Syms = { - platformSymbolName("sayA"), platformSymbolName("sayB"), - platformSymbolName("sayA"), platformSymbolName("sayB"), - platformSymbolName("sayZ"), platformSymbolName("sayZ"), - platformSymbolName("sayZ"), platformSymbolName("sayZ"), - platformSymbolName("sayA"), platformSymbolName("sayB"), - platformSymbolName("sayA"), platformSymbolName("sayB")}; - - bool CallbackRan = false; - Driver->resolveSymbols(Syms, [&](SymbolQuery &Q) { - CallbackRan = true; - EXPECT_TRUE(Q.isResolved(platformSymbolName("sayA"))); - EXPECT_TRUE(Q.isResolved(platformSymbolName("sayB"))); - EXPECT_TRUE(Q.isResolved(platformSymbolName("sayZ"))); - - auto A = Q.getResolvedLib(platformSymbolName("sayA")); - auto B = Q.getResolvedLib(platformSymbolName("sayB")); - auto Z = Q.getResolvedLib(platformSymbolName("sayZ")); - ASSERT_TRUE(A.has_value()); - ASSERT_TRUE(B.has_value()); - ASSERT_TRUE(Z.has_value()); - EXPECT_TRUE(endsWith(A->str(), libname("A"))); - EXPECT_TRUE(endsWith(B->str(), libname("B"))); - EXPECT_TRUE(endsWith(Z->str(), libname("Z"))); - EXPECT_TRUE(Q.allResolved()); - }); - - EXPECT_TRUE(CallbackRan); -} - -// // // --- 5) Optional: stress SymbolQuery with the real resolve flow -// // // And resolve libD dependency libA --- -TEST_F(LibraryResolverIT, ResolveManySymbols2) { - auto Stup = LibraryResolver::Setup::create({BaseDir}); - auto Driver = LibraryResolutionDriver::create(Stup); - ASSERT_NE(Driver, nullptr); - Driver->addScanPath(libdir("D"), PathType::User); - - // Many duplicates to provoke concurrent updates inside SymbolQuery - std::vector<std::string> Syms = { - platformSymbolName("sayA"), platformSymbolName("sayB"), - platformSymbolName("sayA"), platformSymbolName("sayB"), - platformSymbolName("sayZ"), platformSymbolName("sayZ"), - platformSymbolName("sayZ"), platformSymbolName("sayZ"), - platformSymbolName("sayD"), platformSymbolName("sayD"), - platformSymbolName("sayA"), platformSymbolName("sayB"), - platformSymbolName("sayA"), platformSymbolName("sayB")}; - - Driver->resolveSymbols(Syms, [&](SymbolQuery &Q) { - EXPECT_TRUE(Q.isResolved(platformSymbolName("sayA"))); - EXPECT_TRUE(Q.isResolved(platformSymbolName("sayD"))); - - auto A = Q.getResolvedLib(platformSymbolName("sayA")); - auto D = Q.getResolvedLib(platformSymbolName("sayD")); - ASSERT_TRUE(A.has_value()); - ASSERT_TRUE(D.has_value()); - EXPECT_TRUE(endsWith(A->str(), libname("A"))); - EXPECT_TRUE(endsWith(D->str(), libname("D"))); - EXPECT_FALSE(Q.allResolved()); - }); -} - -TEST_F(LibraryResolverIT, ScanSingleUserPath) { - auto LibPathCache = std::make_shared<LibraryPathCache>(); - auto PResolver = std::make_shared<PathResolver>(LibPathCache); - LibraryScanHelper ScanH({}, LibPathCache, PResolver); - - ScanH.addBasePath(libdir("C"), PathType::User); - - std::error_code EC; - auto libCPathOpt = PResolver->resolve(lib("C"), EC); - - if (!libCPathOpt || EC) { - FAIL(); - } - - std::string libCPath = *libCPathOpt; - - LibraryManager LibMgr; - LibraryScanner Scanner(ScanH, LibMgr); - - Scanner.scanNext(PathType::User, 0); - - bool found = false; - LibMgr.forEachLibrary([&](const LibraryInfo &lib) { - if (lib.getFullPath() == libCPath) { - found = true; - } - return true; - }); - EXPECT_TRUE(found) << "Expected to find " << libCPath; -} - -TEST_F(LibraryResolverIT, ScanAndCheckDeps) { - auto LibPathCache = std::make_shared<LibraryPathCache>(); - auto PResolver = std::make_shared<PathResolver>(LibPathCache); - LibraryScanHelper ScanH({}, LibPathCache, PResolver); - - ScanH.addBasePath(libdir("C"), PathType::User); - - LibraryManager LibMgr; - LibraryScanner Scanner(ScanH, LibMgr); - - Scanner.scanNext(PathType::User, 0); - - size_t count = 0; - LibMgr.forEachLibrary([&](const LibraryInfo &) { - count++; - return true; - }); - - EXPECT_GE(count, 3u) << "Should find at least libA in multiple paths"; -} - -TEST_F(LibraryResolverIT, ScanEmptyPath) { - auto LibPathCache = std::make_shared<LibraryPathCache>(); - auto PResolver = std::make_shared<PathResolver>(LibPathCache); - LibraryScanHelper ScanH({}, LibPathCache, PResolver); - - ScanH.addBasePath("/tmp/empty", PathType::User); - - LibraryManager LibMgr; - LibraryScanner Scanner(ScanH, LibMgr); - - Scanner.scanNext(PathType::User, 0); - - size_t count = 0; - LibMgr.forEachLibrary([&](const LibraryInfo &) { - count++; - return true; - }); - EXPECT_EQ(count, 0u); -} - -TEST_F(LibraryResolverIT, PathResolverResolvesKnownPaths) { - auto LibPathCache = std::make_shared<LibraryPathCache>(); - auto PResolver = std::make_shared<PathResolver>(LibPathCache); - - std::error_code EC; - auto Missing = PResolver->resolve("temp/foo/bar", EC); - EXPECT_FALSE(Missing.has_value()) << "Unexpectedly resolved a bogus path"; - EXPECT_TRUE(EC) << "Expected error resolving path"; - - auto DirPath = PResolver->resolve(BaseDir, EC); - ASSERT_TRUE(DirPath.has_value()); - EXPECT_FALSE(EC) << "Expected no error resolving path"; - EXPECT_EQ(*DirPath, BaseDir); - - auto DylibPath = PResolver->resolve(lib("C"), EC); - ASSERT_TRUE(DylibPath.has_value()); - EXPECT_FALSE(EC) << "Expected no error resolving path"; - EXPECT_EQ(*DylibPath, lib("C")); -} - -TEST_F(LibraryResolverIT, PathResolverNormalizesDotAndDotDot) { - auto LibPathCache = std::make_shared<LibraryPathCache>(); - auto PResolver = std::make_shared<PathResolver>(LibPathCache); - - std::error_code EC; - - // e.g. BaseDir + "/./C/../C/C.dylib" → BaseDir + "/C.dylib" - std::string Messy = BaseDir + "/C/./../C/./libC" + ext; - auto Resolved = PResolver->resolve(Messy, EC); - ASSERT_TRUE(Resolved.has_value()); - EXPECT_FALSE(EC); - EXPECT_EQ(*Resolved, lib("C")) << "Expected realpath to collapse . and .."; -} - -#if !defined(_WIN32) -TEST_F(LibraryResolverIT, PathResolverFollowsSymlinks) { - auto LibPathCache = std::make_shared<LibraryPathCache>(); - auto PResolver = std::make_shared<PathResolver>(LibPathCache); - - std::error_code EC; - - // Create a symlink temp -> BaseDir (only if filesystem allows it) - std::string linkName = BaseDir + withext("/link_to_C"); - std::string target = lib("C"); - ::symlink(target.c_str(), linkName.c_str()); - - auto resolved = PResolver->resolve(linkName, EC); - ASSERT_TRUE(resolved.has_value()); - EXPECT_FALSE(EC); - EXPECT_EQ(*resolved, target); - - ::unlink(linkName.c_str()); // cleanup -} - -TEST_F(LibraryResolverIT, PathResolverCachesResults) { - auto LibPathCache = std::make_shared<LibraryPathCache>(); - auto PResolver = std::make_shared<PathResolver>(LibPathCache); - - SmallString<128> TmpDylib; - sys::fs::createUniqueFile(withext("A-copy"), TmpDylib); - sys::fs::copy_file(lib("A"), TmpDylib); - - std::error_code EC; - - // First resolve -> should populate LibPathCache - auto first = PResolver->resolve(TmpDylib, EC); - ASSERT_TRUE(first.has_value()); - - // Forcefully remove the file from disk - ::unlink(TmpDylib.c_str()); - - // Second resolve -> should still succeed from LibPathCache - auto second = PResolver->resolve(TmpDylib, EC); - EXPECT_TRUE(second.has_value()); - EXPECT_EQ(*second, *first); -} -#endif - -TEST_F(LibraryResolverIT, LoaderPathSubstitutionAndResolve) { - auto LibPathCache = std::make_shared<LibraryPathCache>(); - auto PResolver = std::make_shared<PathResolver>(LibPathCache); - - DylibSubstitutor substitutor; - substitutor.configure(libdir("C")); -#if defined(__APPLE__) - // Substitute @loader_path with BaseDir - std::string substituted = - substitutor.substitute(withext("@loader_path/libC")); -#elif defined(__linux__) - // Substitute $origin with BaseDir - std::string substituted = substitutor.substitute(withext("$ORIGIN/libC")); -#endif - ASSERT_FALSE(substituted.empty()); - EXPECT_EQ(substituted, lib("C")); - - // Now try resolving the substituted path - std::error_code EC; - auto resolved = PResolver->resolve(substituted, EC); - ASSERT_TRUE(resolved.has_value()) << "Expected to resolve substituted dylib"; - EXPECT_EQ(*resolved, lib("C")); - EXPECT_FALSE(EC) << "Expected no error resolving substituted dylib"; -} - -TEST_F(LibraryResolverIT, ResolveFromUsrOrSystemPaths) { - auto LibPathCache = std::make_shared<LibraryPathCache>(); - auto PResolver = std::make_shared<PathResolver>(LibPathCache); - - DylibPathValidator validator(*PResolver); - - std::vector<std::string> Paths = {"/foo/bar/", "temp/foo", libdir("C"), - libdir("A"), libdir("B"), libdir("Z")}; - - SmallVector<StringRef> P(Paths.begin(), Paths.end()); - - DylibResolver Resolver(validator); - Resolver.configure("", {{P, SearchPathType::UsrOrSys}}); - - // Check "C" - auto ValOptC = Resolver.resolve("libC", true); - EXPECT_TRUE(ValOptC.has_value()); - EXPECT_EQ(*ValOptC, lib("C")); - - auto ValOptCdylib = Resolver.resolve(withext("libC")); - EXPECT_TRUE(ValOptCdylib.has_value()); - EXPECT_EQ(*ValOptCdylib, lib("C")); - - // Check "A" - auto ValOptA = Resolver.resolve("libA", true); - EXPECT_TRUE(ValOptA.has_value()); - EXPECT_EQ(*ValOptA, lib("A")); - - auto ValOptAdylib = Resolver.resolve(withext("libA")); - EXPECT_TRUE(ValOptAdylib.has_value()); - EXPECT_EQ(*ValOptAdylib, lib("A")); - - // Check "B" - auto ValOptB = Resolver.resolve("libB", true); - EXPECT_TRUE(ValOptB.has_value()); - EXPECT_EQ(*ValOptB, lib("B")); - - auto ValOptBdylib = Resolver.resolve(withext("libB")); - EXPECT_TRUE(ValOptBdylib.has_value()); - EXPECT_EQ(*ValOptBdylib, lib("B")); - - // Check "Z" - auto ValOptZ = Resolver.resolve("libZ", true); - EXPECT_TRUE(ValOptZ.has_value()); - EXPECT_EQ(*ValOptZ, lib("Z")); - - auto ValOptZdylib = Resolver.resolve(withext("libZ")); - EXPECT_TRUE(ValOptZdylib.has_value()); - EXPECT_EQ(*ValOptZdylib, lib("Z")); -} - -#if defined(__APPLE__) -TEST_F(LibraryResolverIT, ResolveViaLoaderPathAndRPathSubstitution) { - auto LibPathCache = std::make_shared<LibraryPathCache>(); - auto PResolver = std::make_shared<PathResolver>(LibPathCache); - - DylibPathValidator validator(*PResolver); - - std::vector<std::string> Paths = {"@loader_path/../A", "@loader_path/../B", - "@loader_path/../D", "@loader_path/../Z"}; - - SmallVector<StringRef> P(Paths.begin(), Paths.end()); - - DylibResolver Resolver(validator); - - // Use only RPath config - Resolver.configure(lib("C"), {{P, SearchPathType::RPath}}); - - // --- Check A --- - auto ValOptA = Resolver.resolve("@rpath/libA", true); - EXPECT_TRUE(ValOptA.has_value()); - EXPECT_EQ(*ValOptA, lib("A")); - - auto ValOptAdylib = Resolver.resolve(withext("@rpath/libA")); - EXPECT_TRUE(ValOptAdylib.has_value()); - EXPECT_EQ(*ValOptAdylib, lib("A")); - - // --- Check B --- - auto ValOptB = Resolver.resolve("@rpath/libB", true); - EXPECT_TRUE(ValOptB.has_value()); - EXPECT_EQ(*ValOptB, lib("B")); - - auto ValOptBdylib = Resolver.resolve(withext("@rpath/libB")); - EXPECT_TRUE(ValOptBdylib.has_value()); - EXPECT_EQ(*ValOptBdylib, lib("B")); - - // --- Check Z --- - auto ValOptZ = Resolver.resolve("@rpath/libZ", true); - EXPECT_TRUE(ValOptZ.has_value()); - EXPECT_EQ(*ValOptZ, lib("Z")); - - auto ValOptZdylib = Resolver.resolve(withext("@rpath/libZ")); - EXPECT_TRUE(ValOptZdylib.has_value()); - EXPECT_EQ(*ValOptZdylib, lib("Z")); -} -#endif - -#if defined(__linux__) -TEST_F(LibraryResolverIT, ResolveViaOriginAndRPathSubstitution) { - auto LibPathCache = std::make_shared<LibraryPathCache>(); - auto PResolver = std::make_shared<PathResolver>(LibPathCache); - - DylibPathValidator validator(*PResolver); - - // On Linux, $ORIGIN works like @loader_path - std::vector<std::string> Paths = {"$ORIGIN/../A", "$ORIGIN/../B", - "$ORIGIN/../D", "$ORIGIN/../Z"}; - - SmallVector<StringRef> P(Paths.begin(), Paths.end()); - - DylibResolver Resolver(validator); - - // Use only RPath config - Resolver.configure(lib("C"), {{P, SearchPathType::RunPath}}); - - // --- Check A --- - auto ValOptA = Resolver.resolve("libA", true); - EXPECT_TRUE(ValOptA.has_value()); - EXPECT_EQ(*ValOptA, lib("A")); - - auto valOptASO = Resolver.resolve(withext("libA")); - EXPECT_TRUE(valOptASO.has_value()); - EXPECT_EQ(*valOptASO, lib("A")); - - // --- Check B --- - auto ValOptB = Resolver.resolve("libB", true); - EXPECT_TRUE(ValOptB.has_value()); - EXPECT_EQ(*ValOptB, lib("B")); - - auto valOptBSO = Resolver.resolve(withext("libB")); - EXPECT_TRUE(valOptBSO.has_value()); - EXPECT_EQ(*valOptBSO, lib("B")); - - // --- Check Z --- - auto ValOptZ = Resolver.resolve("libZ", true); - EXPECT_TRUE(ValOptZ.has_value()); - EXPECT_EQ(*ValOptZ, lib("Z")); - - auto valOptZSO = Resolver.resolve(withext("libZ")); - EXPECT_TRUE(valOptZSO.has_value()); - EXPECT_EQ(*valOptZSO, lib("Z")); -} -#endif -} // namespace -#endif // defined(__APPLE__) diff --git a/mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td b/mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td index d74abc2..37db096 100644 --- a/mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td +++ b/mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td @@ -923,10 +923,10 @@ def AMDGPU_MFMAOp : AMDGPU_Op<"mfma", [AllTypesMatch<["destC", "destD"]>, Pure]>, Arguments<(ins - I32Attr:$m, - I32Attr:$n, - I32Attr:$k, - I32Attr:$blocks, + ConfinedAttr<I32Attr, [IntIsOneOf<[4, 16, 32]>]>:$m, + ConfinedAttr<I32Attr, [IntIsOneOf<[4, 16, 32]>]>:$n, + ConfinedAttr<I32Attr, [IntIsOneOf<[1, 2, 4, 8, 16, 32, 64, 128]>]>:$k, + DefaultValuedAttr<ConfinedAttr<I32Attr, [IntIsOneOf<[1, 2, 4, 16]>]>, "1">:$blocks, MFMAInTypes:$sourceA, MFMAInTypes:$sourceB, MFMAOutTypes:$destC, @@ -969,14 +969,16 @@ def AMDGPU_MFMAOp : Example: ```mlir - %0 = amdgpu.mfma %matA * %matB + %matC - { abid = 1 : i32, cbsz = 1 : i32, - m = 32 : i32, n = 32 : i32, k = 1 : i32, blocks = 2 : i32 } + %0 = amdgpu.mfma 16x16x16 %matA * %matB + %matC + : vector<4xf16>, vector<4xf16>, vector<4xf32> + + %1 = amdgpu.mfma 32x32x1 %matD * %matE + %matF + { abid = 1 : i32, cbsz = 1 : i32, blocks = 2 : i32 } blgp = bcast_second_32 : f32, f32, vector<32xf32> ``` }]; let assemblyFormat = [{ - $sourceA `*` $sourceB `+` $destC + custom<MNKDimensionList>($m, $n, $k) $sourceA `*` $sourceB `+` $destC attr-dict `blgp` `=` $blgp `:` type($sourceA) `,` type($sourceB) `,` type($destC) @@ -1109,9 +1111,9 @@ def AMDGPU_ScaledMFMAOp : AMDGPU_Op<"scaled_mfma", [AllTypesMatch<["destC", "destD"]>, Pure]>, Arguments<(ins - I32Attr:$m, - I32Attr:$n, - I32Attr:$k, + ConfinedAttr<I32Attr, [IntIsOneOf<[16, 32]>]>:$m, + ConfinedAttr<I32Attr, [IntIsOneOf<[16, 32]>]>:$n, + ConfinedAttr<I32Attr, [IntIsOneOf<[64, 128]>]>:$k, ScaledMFMAInTypes:$sourceA, ScaledMFMAInTypes:$sourceB, ScaledMFMAOutTypes:$destC, @@ -1124,8 +1126,8 @@ def AMDGPU_ScaledMFMAOp : let summary = "MLIR wrapper for CDNA scaled mfma instructions"; let description = [{ The `amdgpu.scaled_mfma` op is an MLIR wrapper around intrinsics - for various scaled versions of `mfma` instructions in the CDNA architecture, which perform - multiple outer products in order to allow fast matrix multiplication. + for various scaled versions of `mfma` instructions in the CDNA architecture, which + perform multiple outer products in order to allow fast matrix multiplication. The wrapper will select an appropriate `mfma` instruction, if one is available, based on the provided `m`, `k`, `n`, and `nBlks` attributes, along with the @@ -1140,15 +1142,23 @@ def AMDGPU_ScaledMFMAOp : This wrapper takes inspiration from `amdgpu.mfma`, but has some key differences: - `amdgpu.scaled_mfma` operates on fp4 (f4E2M1FN), fp6 (f6E2M3FN and f6E3M2FN) and - fp8 (f8E4M3FN and f8E5M2) types using either M=N=16, K=128 or M=N=32, K=64 as their tile - size. + fp8 (f8E4M3FN and f8E5M2) types using either M=N=16, K=128 or M=N=32, K=64 as + their tile size. - `amdgpu.scaled_mfma` does not support broadcasting. So, `cbsz`, `abid`, and `blgp` - are omitted from this wrapper. - - The `negateA`, `negateB`, and `negateC` flags in `amdgpu.mfma` are only supported for - double-precision operations on gfx94x and so are not included here. + are omitted from this wrapper. + - The `negateA`, `negateB`, and `negateC` flags in `amdgpu.mfma` are only supported + for double-precision operations on gfx94x and so are not included here. + + Example: + ```mlir + %0 = amdgpu.scaled_mfma 32x32x64 (%arg0[0] * %arg1) * (%arg0[1] * %arg1) + %arg2 + : vector<4xf8E8M0FNU>, vector<32xf6E2M3FN>, f8E8M0FNU, vector<32xf6E2M3FN>, vector<16xf32> + ``` }]; let assemblyFormat = [{ - `(` $scalesA `[` $scalesIdxA `]` `*` $sourceA `)` `*` `(` $scalesB `[` $scalesIdxB `]` `*` $sourceB `)` `+` $destC + custom<MNKDimensionList>($m, $n, $k) ` ` + `(` $scalesA `[` $scalesIdxA `]` `*` $sourceA `)` `*` + `(` $scalesB `[` $scalesIdxB `]` `*` $sourceB `)` `+` $destC attr-dict `:` type($scalesA) `,` type($sourceA) `,` type($scalesB) `,` type($sourceB) `,` type($destC) }]; diff --git a/mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp b/mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp index 4c4965e..585b6da 100644 --- a/mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp +++ b/mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp @@ -422,11 +422,11 @@ LogicalResult MFMAOp::verify() { Type sourceElem = sourceType, destElem = destType; uint32_t sourceLen = 1, destLen = 1; - if (auto sourceVector = llvm::dyn_cast<VectorType>(sourceType)) { + if (auto sourceVector = dyn_cast<VectorType>(sourceType)) { sourceLen = sourceVector.getNumElements(); sourceElem = sourceVector.getElementType(); } - if (auto destVector = llvm::dyn_cast<VectorType>(destType)) { + if (auto destVector = dyn_cast<VectorType>(destType)) { destLen = destVector.getNumElements(); destElem = destVector.getElementType(); } @@ -451,7 +451,7 @@ LogicalResult MFMAOp::verify() { return emitOpError("expected both non-small-float source operand types " "to match exactly"); } - // Normalize the wider integer types the compiler expects to i8 + // Normalize the wider integer types the compiler expects to i8. if (sourceElem.isInteger(32)) { sourceLen *= 4; sourceElem = b.getI8Type(); diff --git a/mlir/test/Conversion/AMDGPUToROCDL/mfma-gfx950.mlir b/mlir/test/Conversion/AMDGPUToROCDL/mfma-gfx950.mlir index 39c31d5..c746d76 100644 --- a/mlir/test/Conversion/AMDGPUToROCDL/mfma-gfx950.mlir +++ b/mlir/test/Conversion/AMDGPUToROCDL/mfma-gfx950.mlir @@ -8,46 +8,46 @@ func.func @mfma_to_rocdl(%arg0 : vector<8xf16>, %arg1 : vector<16xf32>, // CHECK: %[[c0:.+]] = llvm.mlir.constant(0 : i32) : i32 // CHECK: rocdl.mfma.f32.32x32x16.f16{{.*}}: (vector<8xf16>, vector<8xf16>, vector<16xf32>, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg0 * %arg0 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, k = 16 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<8xf16>, vector<8xf16>, vector<16xf32> + amdgpu.mfma 32x32x16 %arg0 * %arg0 + %arg1 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<8xf16>, vector<8xf16>, vector<16xf32> // CHECK: rocdl.mfma.f32.16x16x32.f16{{.*}}: (vector<8xf16>, vector<8xf16>, vector<4xf32>, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg0 * %arg0 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 32 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<8xf16>, vector<8xf16>, vector<4xf32> + amdgpu.mfma 16x16x32 %arg0 * %arg0 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<8xf16>, vector<8xf16>, vector<4xf32> // CHECK: rocdl.mfma.f32.32x32x16.bf16{{.*}}: (vector<8xbf16>, vector<8xbf16>, vector<16xf32>, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg3 * %arg3 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, k = 16 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<8xbf16>, vector<8xbf16>, vector<16xf32> + amdgpu.mfma 32x32x16 %arg3 * %arg3 + %arg1 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<8xbf16>, vector<8xbf16>, vector<16xf32> // CHECK: rocdl.mfma.f32.16x16x32.bf16{{.*}}: (vector<8xbf16>, vector<8xbf16>, vector<4xf32>, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg3 * %arg3 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 32 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<8xbf16>, vector<8xbf16>, vector<4xf32> + amdgpu.mfma 16x16x32 %arg3 * %arg3 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<8xbf16>, vector<8xbf16>, vector<4xf32> // CHECK: rocdl.mfma.i32.32x32x32.i8{{.*}}: (vector<4xi32>, vector<4xi32>, vector<16xi32>, i32, i32, i32) -> vector<16xi32> - amdgpu.mfma %arg4 * %arg4 + %arg5 { abid = 0 : i32, cbsz = 0 : i32, k = 32 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<16xi8>, vector<16xi8>, vector<16xi32> + amdgpu.mfma 32x32x32 %arg4 * %arg4 + %arg5 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<16xi8>, vector<16xi8>, vector<16xi32> // CHECK: rocdl.mfma.i32.16x16x64.i8{{.*}}: (vector<4xi32>, vector<4xi32>, vector<4xi32>, i32, i32, i32) -> vector<4xi32> - amdgpu.mfma %arg4 * %arg4 + %arg6 { abid = 0 : i32, cbsz = 0 : i32, k = 64 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<16xi8>, vector<16xi8>, vector<4xi32> + amdgpu.mfma 16x16x64 %arg4 * %arg4 + %arg6 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<16xi8>, vector<16xi8>, vector<4xi32> // CHECK: rocdl.mfma.scale.f32.32x32x64.f8f6f4{{.*}}, %[[c0]], %[[c0]], %[[c0]], %[[c0]]{{.*}}: (vector<8xi32>, vector<8xi32>, vector<16xf32>, i32, i32, i32, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg7 * %arg7 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, k = 64 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<32xf8E4M3FN>, vector<32xf8E4M3FN>, vector<16xf32> + amdgpu.mfma 32x32x64 %arg7 * %arg7 + %arg1 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<32xf8E4M3FN>, vector<32xf8E4M3FN>, vector<16xf32> // CHECK: rocdl.mfma.scale.f32.16x16x128.f8f6f4{{.*}}, %[[c0]], %[[c0]], %[[c0]], %[[c0]]{{.*}}: (vector<8xi32>, vector<8xi32>, vector<4xf32>, i32, i32, i32, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg7 * %arg7 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 128 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<32xf8E4M3FN>, vector<32xf8E4M3FN>, vector<4xf32> + amdgpu.mfma 16x16x128 %arg7 * %arg7 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<32xf8E4M3FN>, vector<32xf8E4M3FN>, vector<4xf32> // CHECK: %[[c1:.+]] = llvm.mlir.constant(1 : i32) : i32 // CHECK: rocdl.mfma.scale.f32.32x32x64.f8f6f4{{.*}}, %[[c1]], %[[c1]], %[[c0]], %[[c0]]{{.*}}: (vector<8xi32>, vector<8xi32>, vector<16xf32>, i32, i32, i32, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg8 * %arg8 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, k = 64 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<32xf8E5M2>, vector<32xf8E5M2>, vector<16xf32> + amdgpu.mfma 32x32x64 %arg8 * %arg8 + %arg1 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<32xf8E5M2>, vector<32xf8E5M2>, vector<16xf32> // CHECK: rocdl.mfma.scale.f32.16x16x128.f8f6f4{{.*}}, %[[c1]], %[[c1]], %[[c0]], %[[c0]]{{.*}}: (vector<8xi32>, vector<8xi32>, vector<4xf32>, i32, i32, i32, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg8 * %arg8 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 128 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<32xf8E5M2>, vector<32xf8E5M2>, vector<4xf32> + amdgpu.mfma 16x16x128 %arg8 * %arg8 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<32xf8E5M2>, vector<32xf8E5M2>, vector<4xf32> // CHECK: %[[c2:.+]] = llvm.mlir.constant(2 : i32) : i32 // CHECK: rocdl.mfma.scale.f32.32x32x64.f8f6f4{{.*}}, %[[c2]], %[[c2]], %[[c0]], %[[c0]]{{.*}}: (vector<6xi32>, vector<6xi32>, vector<16xf32>, i32, i32, i32, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg9 * %arg9 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, k = 64 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<32xf6E2M3FN>, vector<32xf6E2M3FN>, vector<16xf32> + amdgpu.mfma 32x32x64 %arg9 * %arg9 + %arg1 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<32xf6E2M3FN>, vector<32xf6E2M3FN>, vector<16xf32> // CHECK: rocdl.mfma.scale.f32.16x16x128.f8f6f4{{.*}}, %[[c2]], %[[c2]], %[[c0]], %[[c0]]{{.*}}: (vector<6xi32>, vector<6xi32>, vector<4xf32>, i32, i32, i32, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg9 * %arg9 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 128 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<32xf6E2M3FN>, vector<32xf6E2M3FN>, vector<4xf32> + amdgpu.mfma 16x16x128 %arg9 * %arg9 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<32xf6E2M3FN>, vector<32xf6E2M3FN>, vector<4xf32> // CHECK: %[[c3:.+]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: rocdl.mfma.scale.f32.32x32x64.f8f6f4{{.*}}, %[[c3]], %[[c3]], %[[c0]], %[[c0]]{{.*}}: (vector<6xi32>, vector<6xi32>, vector<16xf32>, i32, i32, i32, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg10 * %arg10 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, k = 64 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<32xf6E3M2FN>, vector<32xf6E3M2FN>, vector<16xf32> + amdgpu.mfma 32x32x64 %arg10 * %arg10 + %arg1 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<32xf6E3M2FN>, vector<32xf6E3M2FN>, vector<16xf32> // CHECK: rocdl.mfma.scale.f32.16x16x128.f8f6f4{{.*}}, %[[c3]], %[[c3]], %[[c0]], %[[c0]]{{.*}}: (vector<6xi32>, vector<6xi32>, vector<4xf32>, i32, i32, i32, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg10 * %arg10 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 128 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<32xf6E3M2FN>, vector<32xf6E3M2FN>, vector<4xf32> + amdgpu.mfma 16x16x128 %arg10 * %arg10 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<32xf6E3M2FN>, vector<32xf6E3M2FN>, vector<4xf32> // CHECK-DAG: %[[c4:.+]] = llvm.mlir.constant(4 : i32) : i32 // CHECK: rocdl.mfma.scale.f32.32x32x64.f8f6f4{{.*}}, %[[c4]], %[[c4]], %[[c0]], %[[c0]]{{.*}}: (vector<4xi32>, vector<4xi32>, vector<16xf32>, i32, i32, i32, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg11 * %arg11 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, k = 64 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<32xf4E2M1FN>, vector<32xf4E2M1FN>, vector<16xf32> + amdgpu.mfma 32x32x64 %arg11 * %arg11 + %arg1 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<32xf4E2M1FN>, vector<32xf4E2M1FN>, vector<16xf32> // CHECK: rocdl.mfma.scale.f32.16x16x128.f8f6f4{{.*}}, %[[c4]], %[[c4]], %[[c0]], %[[c0]]{{.*}}: (vector<4xi32>, vector<4xi32>, vector<4xf32>, i32, i32, i32, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg11 * %arg11 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 128 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<32xf4E2M1FN>, vector<32xf4E2M1FN>, vector<4xf32> + amdgpu.mfma 16x16x128 %arg11 * %arg11 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<32xf4E2M1FN>, vector<32xf4E2M1FN>, vector<4xf32> // CHECK: rocdl.mfma.scale.f32.32x32x64.f8f6f4{{.*}}, %[[c2]], %[[c4]], %[[c0]], %[[c0]]{{.*}}: (vector<6xi32>, vector<4xi32>, vector<16xf32>, i32, i32, i32, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg9 * %arg11 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, k = 64 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<32xf6E2M3FN>, vector<32xf4E2M1FN>, vector<16xf32> + amdgpu.mfma 32x32x64 %arg9 * %arg11 + %arg1 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<32xf6E2M3FN>, vector<32xf4E2M1FN>, vector<16xf32> // CHECK: rocdl.mfma.scale.f32.16x16x128.f8f6f4{{.*}}, %[[c2]], %[[c4]], %[[c0]], %[[c0]]{{.*}}: (vector<6xi32>, vector<4xi32>, vector<4xf32>, i32, i32, i32, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg9 * %arg11 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 128 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<32xf6E2M3FN>, vector<32xf4E2M1FN>, vector<4xf32> + amdgpu.mfma 16x16x128 %arg9 * %arg11 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<32xf6E2M3FN>, vector<32xf4E2M1FN>, vector<4xf32> func.return } @@ -55,50 +55,50 @@ func.func @mfma_to_rocdl(%arg0 : vector<8xf16>, %arg1 : vector<16xf32>, // CHECK-LABEL: func @scaled_mfma_to_rocdl( // CHECK-SAME: %[[ARG0:.*]]: vector<16xf32>, %[[ARG1:.*]]: vector<4xf32>, %[[ARG2:.*]]: vector<32xf8E4M3FN>, %[[ARG3:.*]]: vector<32xf8E5M2>, %[[ARG4:.*]]: vector<32xf6E2M3FN>, %[[ARG5:.*]]: vector<32xf6E3M2FN>, %[[ARG6:.*]]: vector<32xf4E2M1FN>, %[[ARG7:.*]]: vector<4xf8E8M0FNU>, %[[ARG8:.*]]: f8E8M0FNU func.func @scaled_mfma_to_rocdl(%arg0 : vector<16xf32>, - %arg1 : vector<4xf32>, %arg2 : vector<32xf8E4M3FN>, - %arg3 : vector<32xf8E5M2>, %arg4 : vector<32xf6E2M3FN>, - %arg5 : vector<32xf6E3M2FN>, %arg6 : vector<32xf4E2M1FN>, - %arg7 : vector<4xf8E8M0FNU>, %arg8 : f8E8M0FNU) { - + %arg1 : vector<4xf32>, %arg2 : vector<32xf8E4M3FN>, + %arg3 : vector<32xf8E5M2>, %arg4 : vector<32xf6E2M3FN>, + %arg5 : vector<32xf6E3M2FN>, %arg6 : vector<32xf4E2M1FN>, + %arg7 : vector<4xf8E8M0FNU>, %arg8 : f8E8M0FNU) { + // CHECK: %[[c0:.+]] = llvm.mlir.constant(0 : i32) : i32 // CHECK: %[[c1:.+]] = llvm.mlir.constant(1 : i32) : i32 // CHECK: %[[b0:.+]] = llvm.bitcast {{.*}} : vector<4xi8> to i32 // CHECK: %[[z0:.+]] = llvm.zext {{.*}} : i8 to i32 // CHECK: rocdl.mfma.scale.f32.32x32x64.f8f6f4{{.*}}, %[[c0]], %[[b0]], %[[c1]], %[[z0]] : (vector<8xi32>, vector<8xi32>, vector<16xf32>, i32, i32, i32, i32, i32, i32) -> vector<16xf32> - amdgpu.scaled_mfma(%arg7[0] * %arg2) * (%arg8[1] * %arg2) + %arg0 { k = 64 : i32, m = 32 : i32, n = 32 : i32 } : vector<4xf8E8M0FNU>, vector<32xf8E4M3FN>, f8E8M0FNU, vector<32xf8E4M3FN>, vector<16xf32> + amdgpu.scaled_mfma 32x32x64 (%arg7[0] * %arg2) * (%arg8[1] * %arg2) + %arg0 : vector<4xf8E8M0FNU>, vector<32xf8E4M3FN>, f8E8M0FNU, vector<32xf8E4M3FN>, vector<16xf32> // CHECK: rocdl.mfma.scale.f32.16x16x128.f8f6f4{{.*}}, %[[c0]], %[[b0]], %[[c1]], %[[z0]] : (vector<8xi32>, vector<8xi32>, vector<4xf32>, i32, i32, i32, i32, i32, i32) -> vector<4xf32> - amdgpu.scaled_mfma(%arg7[0] * %arg2) * (%arg8[1] * %arg2) + %arg1 { k = 128 : i32, m = 16 : i32, n = 16 : i32 } : vector<4xf8E8M0FNU>, vector<32xf8E4M3FN>, f8E8M0FNU, vector<32xf8E4M3FN>, vector<4xf32> - + amdgpu.scaled_mfma 16x16x128 (%arg7[0] * %arg2) * (%arg8[1] * %arg2) + %arg1 : vector<4xf8E8M0FNU>, vector<32xf8E4M3FN>, f8E8M0FNU, vector<32xf8E4M3FN>, vector<4xf32> + // CHECK: llvm.bitcast - + // CHECK: rocdl.mfma.scale.f32.32x32x64.f8f6f4{{.*}}, %[[c0]], %[[b0]], %[[c1]], %[[z0]] : (vector<8xi32>, vector<8xi32>, vector<16xf32>, i32, i32, i32, i32, i32, i32) -> vector<16xf32> - amdgpu.scaled_mfma(%arg7[0] * %arg3) * (%arg8[1] * %arg3) + %arg0 { k = 64 : i32, m = 32 : i32, n = 32 : i32 } : vector<4xf8E8M0FNU>, vector<32xf8E5M2>, f8E8M0FNU, vector<32xf8E5M2>, vector<16xf32> + amdgpu.scaled_mfma 32x32x64 (%arg7[0] * %arg3) * (%arg8[1] * %arg3) + %arg0 : vector<4xf8E8M0FNU>, vector<32xf8E5M2>, f8E8M0FNU, vector<32xf8E5M2>, vector<16xf32> // CHECK: rocdl.mfma.scale.f32.16x16x128.f8f6f4{{.*}}, %[[c0]], %[[b0]], %[[c1]], %[[z0]] : (vector<8xi32>, vector<8xi32>, vector<4xf32>, i32, i32, i32, i32, i32, i32) -> vector<4xf32> - amdgpu.scaled_mfma(%arg7[0] * %arg3) * (%arg8[1] * %arg3) + %arg1 { k = 128 : i32, m = 16 : i32, n = 16 : i32 } : vector<4xf8E8M0FNU>, vector<32xf8E5M2>, f8E8M0FNU, vector<32xf8E5M2>, vector<4xf32> - + amdgpu.scaled_mfma 16x16x128 (%arg7[0] * %arg3) * (%arg8[1] * %arg3) + %arg1 : vector<4xf8E8M0FNU>, vector<32xf8E5M2>, f8E8M0FNU, vector<32xf8E5M2>, vector<4xf32> + // CHECK: llvm.bitcast - + // CHECK: rocdl.mfma.scale.f32.32x32x64.f8f6f4{{.*}}, %[[c0]], %[[b0]], %[[c1]], %[[z0]] : (vector<6xi32>, vector<6xi32>, vector<16xf32>, i32, i32, i32, i32, i32, i32) -> vector<16xf32> - amdgpu.scaled_mfma(%arg7[0] * %arg4) * (%arg8[1] * %arg4) + %arg0 { k = 64 : i32, m = 32 : i32, n = 32 : i32 } : vector<4xf8E8M0FNU>, vector<32xf6E2M3FN>, f8E8M0FNU, vector<32xf6E2M3FN>, vector<16xf32> + amdgpu.scaled_mfma 32x32x64 (%arg7[0] * %arg4) * (%arg8[1] * %arg4) + %arg0 : vector<4xf8E8M0FNU>, vector<32xf6E2M3FN>, f8E8M0FNU, vector<32xf6E2M3FN>, vector<16xf32> // CHECK: rocdl.mfma.scale.f32.16x16x128.f8f6f4{{.*}}, %[[c0]], %[[b0]], %[[c1]], %[[z0]] : (vector<6xi32>, vector<6xi32>, vector<4xf32>, i32, i32, i32, i32, i32, i32) -> vector<4xf32> - amdgpu.scaled_mfma(%arg7[0] * %arg4) * (%arg8[1] * %arg4) + %arg1 { k = 128 : i32, m = 16 : i32, n = 16 : i32 } : vector<4xf8E8M0FNU>, vector<32xf6E2M3FN>, f8E8M0FNU, vector<32xf6E2M3FN>, vector<4xf32> - + amdgpu.scaled_mfma 16x16x128 (%arg7[0] * %arg4) * (%arg8[1] * %arg4) + %arg1 : vector<4xf8E8M0FNU>, vector<32xf6E2M3FN>, f8E8M0FNU, vector<32xf6E2M3FN>, vector<4xf32> + // CHECK: llvm.bitcast // CHECK: llvm.mlir.constant(3 : i32) : i32 // CHECK: rocdl.mfma.scale.f32.32x32x64.f8f6f4{{.*}}, %[[c0]], %[[b0]], %[[c1]], %[[z0]] : (vector<6xi32>, vector<6xi32>, vector<16xf32>, i32, i32, i32, i32, i32, i32) -> vector<16xf32> - amdgpu.scaled_mfma(%arg7[0] * %arg5) * (%arg8[1] * %arg5) + %arg0 { k = 64 : i32, m = 32 : i32, n = 32 : i32 } : vector<4xf8E8M0FNU>, vector<32xf6E3M2FN>, f8E8M0FNU, vector<32xf6E3M2FN>, vector<16xf32> + amdgpu.scaled_mfma 32x32x64 (%arg7[0] * %arg5) * (%arg8[1] * %arg5) + %arg0 : vector<4xf8E8M0FNU>, vector<32xf6E3M2FN>, f8E8M0FNU, vector<32xf6E3M2FN>, vector<16xf32> // CHECK: rocdl.mfma.scale.f32.16x16x128.f8f6f4{{.*}}, %[[c0]], %[[b0]], %[[c1]], %[[z0]] : (vector<6xi32>, vector<6xi32>, vector<4xf32>, i32, i32, i32, i32, i32, i32) -> vector<4xf32> - amdgpu.scaled_mfma(%arg7[0] * %arg5) * (%arg8[1] * %arg5) + %arg1 { k = 128 : i32, m = 16 : i32, n = 16 : i32 } : vector<4xf8E8M0FNU>, vector<32xf6E3M2FN>, f8E8M0FNU, vector<32xf6E3M2FN>, vector<4xf32> - + amdgpu.scaled_mfma 16x16x128 (%arg7[0] * %arg5) * (%arg8[1] * %arg5) + %arg1 : vector<4xf8E8M0FNU>, vector<32xf6E3M2FN>, f8E8M0FNU, vector<32xf6E3M2FN>, vector<4xf32> + // CHECK: llvm.bitcast // CHECK: llvm.mlir.constant(4 : i32) : i32 - + // CHECK: rocdl.mfma.scale.f32.32x32x64.f8f6f4{{.*}}, %[[c0]], %[[b0]], %[[c1]], %[[z0]] : (vector<4xi32>, vector<4xi32>, vector<16xf32>, i32, i32, i32, i32, i32, i32) -> vector<16xf32> - amdgpu.scaled_mfma(%arg7[0] * %arg6) * (%arg8[1] * %arg6) + %arg0 { k = 64 : i32, m = 32 : i32, n = 32 : i32 } : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, f8E8M0FNU, vector<32xf4E2M1FN>, vector<16xf32> + amdgpu.scaled_mfma 32x32x64 (%arg7[0] * %arg6) * (%arg8[1] * %arg6) + %arg0 : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, f8E8M0FNU, vector<32xf4E2M1FN>, vector<16xf32> // CHECK: rocdl.mfma.scale.f32.16x16x128.f8f6f4{{.*}}, %[[c0]], %[[b0]], %[[c1]], %[[z0]] : (vector<4xi32>, vector<4xi32>, vector<4xf32>, i32, i32, i32, i32, i32, i32) -> vector<4xf32> - amdgpu.scaled_mfma(%arg7[0] * %arg6) * (%arg8[1] * %arg6) + %arg1 { k = 128 : i32, m = 16 : i32, n = 16 : i32 } : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, f8E8M0FNU, vector<32xf4E2M1FN>, vector<4xf32> + amdgpu.scaled_mfma 16x16x128 (%arg7[0] * %arg6) * (%arg8[1] * %arg6) + %arg1 : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, f8E8M0FNU, vector<32xf4E2M1FN>, vector<4xf32> func.return } diff --git a/mlir/test/Conversion/AMDGPUToROCDL/mfma.mlir b/mlir/test/Conversion/AMDGPUToROCDL/mfma.mlir index 52db142..e292d98 100644 --- a/mlir/test/Conversion/AMDGPUToROCDL/mfma.mlir +++ b/mlir/test/Conversion/AMDGPUToROCDL/mfma.mlir @@ -9,89 +9,89 @@ func.func @mfma_to_rocdl(%arg0 : f32, %arg1 : vector<32xf32>, %arg14 : vector<2xf32>, %arg15 : vector<8xf8E5M2FNUZ>, %arg16 : vector<8xf8E4M3FNUZ>) { // CHECK: rocdl.mfma.f32.32x32x1f32{{.*}}: (f32, f32, vector<32xf32>, i32, i32, i32) -> vector<32xf32> - amdgpu.mfma %arg0 * %arg0 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, k = 1 : i32, m = 32 : i32, n = 32 : i32, blocks = 2 : i32 } blgp = none : f32, f32, vector<32xf32> + amdgpu.mfma 32x32x1 %arg0 * %arg0 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, blocks = 2 : i32 } blgp = none : f32, f32, vector<32xf32> // CHECK: rocdl.mfma.f32.16x16x1f32{{.*}}: (f32, f32, vector<16xf32>, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg0 * %arg0 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 1 : i32, m = 16 : i32, n = 16 : i32, blocks = 4 : i32 } blgp = none : f32, f32, vector<16xf32> + amdgpu.mfma 16x16x1 %arg0 * %arg0 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, blocks = 4 : i32 } blgp = none : f32, f32, vector<16xf32> // CHECK: rocdl.mfma.f32.4x4x1f32{{.*}}: (f32, f32, vector<4xf32>, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg0 * %arg0 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, k = 1 : i32, m = 4 : i32, n = 4 : i32, blocks = 16 : i32 } blgp = none : f32, f32, vector<4xf32> + amdgpu.mfma 4x4x1 %arg0 * %arg0 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, blocks = 16 : i32 } blgp = none : f32, f32, vector<4xf32> // CHECK: rocdl.mfma.f32.32x32x2f32{{.*}}: (f32, f32, vector<16xf32>, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg0 * %arg0 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 2 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : f32, f32, vector<16xf32> + amdgpu.mfma 32x32x2 %arg0 * %arg0 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : f32, f32, vector<16xf32> // CHECK: rocdl.mfma.f32.16x16x4f32{{.*}}: (f32, f32, vector<4xf32>, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg0 * %arg0 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, k = 4 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : f32, f32, vector<4xf32> + amdgpu.mfma 16x16x4 %arg0 * %arg0 + %arg3 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : f32, f32, vector<4xf32> // CHECK: rocdl.mfma.f32.32x32x4f16{{.*}}: (vector<4xf16>, vector<4xf16>, vector<32xf32>, i32, i32, i32) -> vector<32xf32> - amdgpu.mfma %arg4 * %arg4 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, k = 4 : i32, m = 32 : i32, n = 32 : i32, blocks = 2 : i32 } blgp = none : vector<4xf16>, vector<4xf16>, vector<32xf32> + amdgpu.mfma 32x32x4 %arg4 * %arg4 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, blocks = 2 : i32 } blgp = none : vector<4xf16>, vector<4xf16>, vector<32xf32> // CHECK: rocdl.mfma.f32.16x16x4f16{{.*}}: (vector<4xf16>, vector<4xf16>, vector<16xf32>, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg4 * %arg4 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 4 : i32, m = 16 : i32, n = 16 : i32, blocks = 4 : i32 } blgp = none : vector<4xf16>, vector<4xf16>, vector<16xf32> + amdgpu.mfma 16x16x4 %arg4 * %arg4 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, blocks = 4 : i32 } blgp = none : vector<4xf16>, vector<4xf16>, vector<16xf32> // CHECK: rocdl.mfma.f32.4x4x4f16{{.*}}: (vector<4xf16>, vector<4xf16>, vector<4xf32>, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg4 * %arg4 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, k = 4 : i32, m = 4 : i32, n = 4 : i32, blocks = 16 : i32 } blgp = none : vector<4xf16>, vector<4xf16>, vector<4xf32> + amdgpu.mfma 4x4x4 %arg4 * %arg4 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, blocks = 16 : i32 } blgp = none : vector<4xf16>, vector<4xf16>, vector<4xf32> // CHECK: rocdl.mfma.f32.32x32x8f16{{.*}}: (vector<4xf16>, vector<4xf16>, vector<16xf32>, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg4 * %arg4 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 8 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<4xf16>, vector<4xf16>, vector<16xf32> + amdgpu.mfma 32x32x8 %arg4 * %arg4 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<4xf16>, vector<4xf16>, vector<16xf32> // CHECK: rocdl.mfma.f32.16x16x16f16{{.*}}: (vector<4xf16>, vector<4xf16>, vector<4xf32>, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg4 * %arg4 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, k = 16 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<4xf16>, vector<4xf16>, vector<4xf32> + amdgpu.mfma 16x16x16 %arg4 * %arg4 + %arg3 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<4xf16>, vector<4xf16>, vector<4xf32> // CHECK: %[[BITCAST_4xi8_i32:.+]] = llvm.bitcast {{.*}} : vector<4xi8> to i32 // CHECK: rocdl.mfma.i32.32x32x4i8 %[[BITCAST_4xi8_i32]], %[[BITCAST_4xi8_i32]], {{.*}}: (i32, i32, vector<32xi32>, i32, i32, i32) -> vector<32xi32> - amdgpu.mfma %arg5 * %arg5 + %arg6 { abid = 0 : i32, cbsz = 0 : i32, k = 4 : i32, m = 32 : i32, n = 32 : i32, blocks = 2 : i32 } blgp = none : vector<4xi8>, vector<4xi8>, vector<32xi32> + amdgpu.mfma 32x32x4 %arg5 * %arg5 + %arg6 { abid = 0 : i32, cbsz = 0 : i32, blocks = 2 : i32 } blgp = none : vector<4xi8>, vector<4xi8>, vector<32xi32> // CHECK: rocdl.mfma.i32.16x16x4i8{{.*}}: (i32, i32, vector<16xi32>, i32, i32, i32) -> vector<16xi32> - amdgpu.mfma %arg5 * %arg5 + %arg7 { abid = 0 : i32, cbsz = 0 : i32, k = 4 : i32, m = 16 : i32, n = 16 : i32, blocks = 4 : i32 } blgp = none : vector<4xi8>, vector<4xi8>, vector<16xi32> + amdgpu.mfma 16x16x4 %arg5 * %arg5 + %arg7 { abid = 0 : i32, cbsz = 0 : i32, blocks = 4 : i32 } blgp = none : vector<4xi8>, vector<4xi8>, vector<16xi32> // CHECK: rocdl.mfma.i32.4x4x4i8{{.*}}: (i32, i32, vector<4xi32>, i32, i32, i32) -> vector<4xi32> - amdgpu.mfma %arg5 * %arg5 + %arg8 { abid = 0 : i32, cbsz = 0 : i32, k = 4 : i32, m = 4 : i32, n = 4 : i32, blocks = 16 : i32 } blgp = none : vector<4xi8>, vector<4xi8>, vector<4xi32> + amdgpu.mfma 4x4x4 %arg5 * %arg5 + %arg8 { abid = 0 : i32, cbsz = 0 : i32, blocks = 16 : i32 } blgp = none : vector<4xi8>, vector<4xi8>, vector<4xi32> // CHECK: rocdl.mfma.i32.32x32x8i8{{.*}}: (i32, i32, vector<16xi32>, i32, i32, i32) -> vector<16xi32> - amdgpu.mfma %arg5 * %arg5 + %arg7 { abid = 0 : i32, cbsz = 0 : i32, k = 8 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<4xi8>, vector<4xi8>, vector<16xi32> + amdgpu.mfma 32x32x8 %arg5 * %arg5 + %arg7 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<4xi8>, vector<4xi8>, vector<16xi32> // CHECK: rocdl.mfma.i32.16x16x16i8{{.*}}: (i32, i32, vector<4xi32>, i32, i32, i32) -> vector<4xi32> - amdgpu.mfma %arg5 * %arg5 + %arg8 { abid = 0 : i32, cbsz = 0 : i32, k = 16 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<4xi8>, vector<4xi8>, vector<4xi32> + amdgpu.mfma 16x16x16 %arg5 * %arg5 + %arg8 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<4xi8>, vector<4xi8>, vector<4xi32> // CHECK: %[[BITCAST_2xbf16_2xi16:.+]] = llvm.bitcast {{.*}} : vector<2xbf16> to vector<2xi16> // CHECK: rocdl.mfma.f32.32x32x2bf16 %[[BITCAST_2xbf16_2xi16]], %[[BITCAST_2xbf16_2xi16]], %{{.*}}: (vector<2xi16>, vector<2xi16>, vector<32xf32>, i32, i32, i32) -> vector<32xf32> - amdgpu.mfma %arg9 * %arg9 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, k = 2 : i32, m = 32 : i32, n = 32 : i32, blocks = 2 : i32 } blgp = none : vector<2xbf16>, vector<2xbf16>, vector<32xf32> + amdgpu.mfma 32x32x2 %arg9 * %arg9 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, blocks = 2 : i32 } blgp = none : vector<2xbf16>, vector<2xbf16>, vector<32xf32> // CHECK: rocdl.mfma.f32.16x16x2bf16{{.*}}: (vector<2xi16>, vector<2xi16>, vector<16xf32>, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg9 * %arg9 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 2 : i32, m = 16 : i32, n = 16 : i32, blocks = 4 : i32 } blgp = none : vector<2xbf16>, vector<2xbf16>, vector<16xf32> + amdgpu.mfma 16x16x2 %arg9 * %arg9 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, blocks = 4 : i32 } blgp = none : vector<2xbf16>, vector<2xbf16>, vector<16xf32> // CHECK: rocdl.mfma.f32.4x4x2bf16{{.*}}: (vector<2xi16>, vector<2xi16>, vector<4xf32>, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg9 * %arg9 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, k = 2 : i32, m = 4 : i32, n = 4 : i32, blocks = 16 : i32 } blgp = none : vector<2xbf16>, vector<2xbf16>, vector<4xf32> + amdgpu.mfma 4x4x2 %arg9 * %arg9 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, blocks = 16 : i32 } blgp = none : vector<2xbf16>, vector<2xbf16>, vector<4xf32> // CHECK: rocdl.mfma.f32.32x32x4bf16{{.*}}: (vector<2xi16>, vector<2xi16>, vector<16xf32>, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg9 * %arg9 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 4 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<2xbf16>, vector<2xbf16>, vector<16xf32> + amdgpu.mfma 32x32x4 %arg9 * %arg9 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<2xbf16>, vector<2xbf16>, vector<16xf32> // CHECK: rocdl.mfma.f32.16x16x8bf16{{.*}}: (vector<2xi16>, vector<2xi16>, vector<4xf32>, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg9 * %arg9 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, k = 8 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<2xbf16>, vector<2xbf16>, vector<4xf32> + amdgpu.mfma 16x16x8 %arg9 * %arg9 + %arg3 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<2xbf16>, vector<2xbf16>, vector<4xf32> // CHECK: %[[BITCAST_4xbf16_4xi16:.+]] = llvm.bitcast {{.*}} : vector<4xbf16> to vector<4xi16> // CHECK: rocdl.mfma.f32.32x32x4bf16.1k %[[BITCAST_4xbf16_4xi16]], %[[BITCAST_4xbf16_4xi16]], {{.*}}: (vector<4xi16>, vector<4xi16>, vector<32xf32>, i32, i32, i32) -> vector<32xf32> - amdgpu.mfma %arg10 * %arg10 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, k = 4 : i32, m = 32 : i32, n = 32 : i32, blocks = 2 : i32 } blgp = none : vector<4xbf16>, vector<4xbf16>, vector<32xf32> + amdgpu.mfma 32x32x4 %arg10 * %arg10 + %arg1 { abid = 0 : i32, cbsz = 0 : i32, blocks = 2 : i32 } blgp = none : vector<4xbf16>, vector<4xbf16>, vector<32xf32> // CHECK: rocdl.mfma.f32.16x16x4bf16.1k{{.*}}: (vector<4xi16>, vector<4xi16>, vector<16xf32>, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg10 * %arg10 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 4 : i32, m = 16 : i32, n = 16 : i32, blocks = 4 : i32 } blgp = none : vector<4xbf16>, vector<4xbf16>, vector<16xf32> + amdgpu.mfma 16x16x4 %arg10 * %arg10 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, blocks = 4 : i32 } blgp = none : vector<4xbf16>, vector<4xbf16>, vector<16xf32> // CHECK: rocdl.mfma.f32.4x4x4bf16.1k{{.*}}: (vector<4xi16>, vector<4xi16>, vector<4xf32>, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg10 * %arg10 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, k = 4 : i32, m = 4 : i32, n = 4 : i32, blocks = 16 : i32 } blgp = none : vector<4xbf16>, vector<4xbf16>, vector<4xf32> + amdgpu.mfma 4x4x4 %arg10 * %arg10 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, blocks = 16 : i32 } blgp = none : vector<4xbf16>, vector<4xbf16>, vector<4xf32> // CHECK: rocdl.mfma.f32.32x32x8bf16.1k{{.*}}: (vector<4xi16>, vector<4xi16>, vector<16xf32>, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg10 * %arg10 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 8 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<4xbf16>, vector<4xbf16>, vector<16xf32> + amdgpu.mfma 32x32x8 %arg10 * %arg10 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<4xbf16>, vector<4xbf16>, vector<16xf32> // CHECK: rocdl.mfma.f32.16x16x16bf16.1k{{.*}}: (vector<4xi16>, vector<4xi16>, vector<4xf32>, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg10 * %arg10 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, k = 16 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<4xbf16>, vector<4xbf16>, vector<4xf32> + amdgpu.mfma 16x16x16 %arg10 * %arg10 + %arg3 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<4xbf16>, vector<4xbf16>, vector<4xf32> // CHECK: rocdl.mfma.f64.16x16x4f64{{.*}}: (f64, f64, vector<4xf64>, i32, i32, i32) -> vector<4xf64> - amdgpu.mfma %arg11 * %arg11 + %arg12 { abid = 0 : i32, cbsz = 0 : i32, k = 4 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : f64, f64, vector<4xf64> + amdgpu.mfma 16x16x4 %arg11 * %arg11 + %arg12 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : f64, f64, vector<4xf64> // CHECK: rocdl.mfma.f64.4x4x4f64{{.*}}: (f64, f64, f64, i32, i32, i32) -> f64 - amdgpu.mfma %arg11 * %arg11 + %arg11 { abid = 0 : i32, cbsz = 0 : i32, k = 4 : i32, m = 4 : i32, n = 4 : i32, blocks = 4 : i32 } blgp = none : f64, f64, f64 + amdgpu.mfma 4x4x4 %arg11 * %arg11 + %arg11 { abid = 0 : i32, cbsz = 0 : i32, blocks = 4 : i32 } blgp = none : f64, f64, f64 // CHECK: %[[BITCAST_8xi8_i64:.+]] = llvm.bitcast {{.*}} : vector<8xi8> to i64 // CHECK: rocdl.mfma.i32.16x16x32.i8 %[[BITCAST_8xi8_i64]], %[[BITCAST_8xi8_i64]], {{.*}}: (i64, i64, vector<4xi32>, i32, i32, i32) -> vector<4xi32> - amdgpu.mfma %arg13 * %arg13 + %arg8 { abid = 0 : i32, cbsz = 0 : i32, k = 32 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<8xi8>, vector<8xi8>, vector<4xi32> + amdgpu.mfma 16x16x32 %arg13 * %arg13 + %arg8 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<8xi8>, vector<8xi8>, vector<4xi32> // CHECK: rocdl.mfma.i32.32x32x16.i8{{.*}}: (i64, i64, vector<16xi32>, i32, i32, i32) -> vector<16xi32> - amdgpu.mfma %arg13 * %arg13 + %arg7 { abid = 0 : i32, cbsz = 0 : i32, k = 16 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<8xi8>, vector<8xi8>, vector<16xi32> + amdgpu.mfma 32x32x16 %arg13 * %arg13 + %arg7 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<8xi8>, vector<8xi8>, vector<16xi32> // CHECK: rocdl.mfma.f32.16x16x8.xf32{{.*}}: (vector<2xf32>, vector<2xf32>, vector<4xf32>, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg14 * %arg14 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, k = 8 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32, reducePrecision } blgp = none : vector<2xf32>, vector<2xf32>, vector<4xf32> + amdgpu.mfma 16x16x8 %arg14 * %arg14 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, reducePrecision } blgp = none : vector<2xf32>, vector<2xf32>, vector<4xf32> // CHECK: rocdl.mfma.f32.32x32x4.xf32{{.*}}: (vector<2xf32>, vector<2xf32>, vector<16xf32>, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg14 * %arg14 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 4 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32, reducePrecision } blgp = none : vector<2xf32>, vector<2xf32>, vector<16xf32> + amdgpu.mfma 32x32x4 %arg14 * %arg14 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, reducePrecision } blgp = none : vector<2xf32>, vector<2xf32>, vector<16xf32> // CHECK: %[[BITCAST_8xi8_i64_1:.+]] = llvm.bitcast {{.*}} : vector<8xi8> to i64 // CHECK: rocdl.mfma.f32.16x16x32.bf8.bf8 %[[BITCAST_8xi8_i64_1]], %[[BITCAST_8xi8_i64_1]], {{.*}}: (i64, i64, vector<4xf32>, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg15 * %arg15 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, k = 32 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<8xf8E5M2FNUZ>, vector<8xf8E5M2FNUZ>, vector<4xf32> + amdgpu.mfma 16x16x32 %arg15 * %arg15 + %arg3 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<8xf8E5M2FNUZ>, vector<8xf8E5M2FNUZ>, vector<4xf32> // CHECK: %[[BITCAST_8xi8_i64_2:.+]] = llvm.bitcast {{.*}} : vector<8xi8> to i64 // CHECK: rocdl.mfma.f32.16x16x32.bf8.fp8 %[[BITCAST_8xi8_i64_1]], %[[BITCAST_8xi8_i64_2]], {{.*}}: (i64, i64, vector<4xf32>, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg15 * %arg16 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, k = 32 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<8xf8E5M2FNUZ>, vector<8xf8E4M3FNUZ>, vector<4xf32> + amdgpu.mfma 16x16x32 %arg15 * %arg16 + %arg3 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<8xf8E5M2FNUZ>, vector<8xf8E4M3FNUZ>, vector<4xf32> // CHECK: rocdl.mfma.f32.16x16x32.fp8.bf8{{.*}}: (i64, i64, vector<4xf32>, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg16 * %arg15 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, k = 32 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<8xf8E4M3FNUZ>, vector<8xf8E5M2FNUZ>, vector<4xf32> + amdgpu.mfma 16x16x32 %arg16 * %arg15 + %arg3 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<8xf8E4M3FNUZ>, vector<8xf8E5M2FNUZ>, vector<4xf32> // CHECK: rocdl.mfma.f32.16x16x32.fp8.fp8{{.*}}: (i64, i64, vector<4xf32>, i32, i32, i32) -> vector<4xf32> - amdgpu.mfma %arg16 * %arg16 + %arg3 { abid = 0 : i32, cbsz = 0 : i32, k = 32 : i32, m = 16 : i32, n = 16 : i32, blocks = 1 : i32 } blgp = none : vector<8xf8E4M3FNUZ>, vector<8xf8E4M3FNUZ>, vector<4xf32> + amdgpu.mfma 16x16x32 %arg16 * %arg16 + %arg3 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<8xf8E4M3FNUZ>, vector<8xf8E4M3FNUZ>, vector<4xf32> // CHECK: rocdl.mfma.f32.32x32x16.bf8.bf8{{.*}}: (i64, i64, vector<16xf32>, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg15 * %arg15 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 16 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<8xf8E5M2FNUZ>, vector<8xf8E5M2FNUZ>, vector<16xf32> + amdgpu.mfma 32x32x16 %arg15 * %arg15 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<8xf8E5M2FNUZ>, vector<8xf8E5M2FNUZ>, vector<16xf32> // CHECK: rocdl.mfma.f32.32x32x16.bf8.fp8{{.*}}: (i64, i64, vector<16xf32>, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg15 * %arg16 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 16 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<8xf8E5M2FNUZ>, vector<8xf8E4M3FNUZ>, vector<16xf32> + amdgpu.mfma 32x32x16 %arg15 * %arg16 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<8xf8E5M2FNUZ>, vector<8xf8E4M3FNUZ>, vector<16xf32> // CHECK: rocdl.mfma.f32.32x32x16.fp8.bf8{{.*}}: (i64, i64, vector<16xf32>, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg16 * %arg15 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 16 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<8xf8E4M3FNUZ>, vector<8xf8E5M2FNUZ>, vector<16xf32> + amdgpu.mfma 32x32x16 %arg16 * %arg15 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<8xf8E4M3FNUZ>, vector<8xf8E5M2FNUZ>, vector<16xf32> // CHECK: rocdl.mfma.f32.32x32x16.fp8.fp8{{.*}}: (i64, i64, vector<16xf32>, i32, i32, i32) -> vector<16xf32> - amdgpu.mfma %arg16 * %arg16 + %arg2 { abid = 0 : i32, cbsz = 0 : i32, k = 16 : i32, m = 32 : i32, n = 32 : i32, blocks = 1 : i32 } blgp = none : vector<8xf8E4M3FNUZ>, vector<8xf8E4M3FNUZ>, vector<16xf32> + amdgpu.mfma 32x32x16 %arg16 * %arg16 + %arg2 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<8xf8E4M3FNUZ>, vector<8xf8E4M3FNUZ>, vector<16xf32> func.return } diff --git a/mlir/test/Dialect/AMDGPU/canonicalize.mlir b/mlir/test/Dialect/AMDGPU/canonicalize.mlir index 52d3275..fee0c00 100644 --- a/mlir/test/Dialect/AMDGPU/canonicalize.mlir +++ b/mlir/test/Dialect/AMDGPU/canonicalize.mlir @@ -165,10 +165,10 @@ func.func @fold_gather_to_lds_of_cast_dest(%global: memref<128x72xf32, 1>, %lds: // CHECK-LABEL: func @scaled_mfma // CHECK: %[[SCALE_1:.*]] = vector.extract_strided_slice %0 {offsets = [0], sizes = [4], strides = [1]} : vector<16xf8E8M0FNU> to vector<4xf8E8M0FNU> // CHECK: %[[SCALE_2:.*]] = vector.extract_strided_slice %2 {offsets = [4], sizes = [4], strides = [1]} : vector<16xf8E8M0FNU> to vector<4xf8E8M0FNU> -// CHECK: amdgpu.scaled_mfma(%[[SCALE_1]][3] * %{{.*}}) * (%[[SCALE_2]][2] * %{{.*}}) {{.*}} +// CHECK: amdgpu.scaled_mfma 16x16x128 (%[[SCALE_1]][3] * %{{.*}}) * (%[[SCALE_2]][2] * %{{.*}}) {{.*}} // CHECK: %[[SCALE_3:.*]] = vector.extract_strided_slice %5 {offsets = [8], sizes = [4], strides = [1]} : vector<16xf8E8M0FNU> to vector<4xf8E8M0FNU> // CHECK: %[[SCALE_4:.*]] = vector.extract_strided_slice %7 {offsets = [12], sizes = [4], strides = [1]} : vector<16xf8E8M0FNU> to vector<4xf8E8M0FNU> -// CHECK: amdgpu.scaled_mfma(%[[SCALE_3]][1] * %{{.*}}) * (%[[SCALE_4]][0] * %{{.*}}) {{.*}} +// CHECK: amdgpu.scaled_mfma 16x16x128 (%[[SCALE_3]][1] * %{{.*}}) * (%[[SCALE_4]][0] * %{{.*}}) {{.*}} func.func @scaled_mfma(%opA: vector<32xf4E2M1FN>, %opB: vector<32xf4E2M1FN>, %scalesA: vector<2x1x8x1xf8E8M0FNU>, %scalesB: vector<2x1x8x1xf8E8M0FNU>) -> (vector<4xf32>, vector<4xf32>) { %cst_0 = arith.constant dense<0.000000e+00> : vector<4xf32> %cst_1 = arith.constant dense<5.877470e-39> : vector<4xf8E8M0FNU> @@ -176,12 +176,12 @@ func.func @scaled_mfma(%opA: vector<32xf4E2M1FN>, %opB: vector<32xf4E2M1FN>, %sc %sA = vector.insert %scaleA, %cst_1 [0] : f8E8M0FNU into vector<4xf8E8M0FNU> %scaleB = vector.extract %scalesB[0, 0, 6, 0] : f8E8M0FNU from vector<2x1x8x1xf8E8M0FNU> %sB = vector.insert %scaleB, %cst_1 [0] : f8E8M0FNU into vector<4xf8E8M0FNU> - %res_0 = amdgpu.scaled_mfma(%sA[0] * %opA) * (%sB[0] * %opB) + %cst_0 {k = 128 : i32, m = 16 : i32, n = 16 : i32} : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> + %res_0 = amdgpu.scaled_mfma 16x16x128 (%sA[0] * %opA) * (%sB[0] * %opB) + %cst_0 : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> %scaleC = vector.extract %scalesA[1, 0, 1, 0] : f8E8M0FNU from vector<2x1x8x1xf8E8M0FNU> %sC = vector.insert %scaleC, %cst_1 [0] : f8E8M0FNU into vector<4xf8E8M0FNU> %scaleD = vector.extract %scalesB[1, 0, 4, 0] : f8E8M0FNU from vector<2x1x8x1xf8E8M0FNU> %sD = vector.insert %scaleD, %cst_1 [0] : f8E8M0FNU into vector<4xf8E8M0FNU> - %res_1 = amdgpu.scaled_mfma(%sC[0] * %opA) * (%sD[0] * %opB) + %cst_0 {k = 128 : i32, m = 16 : i32, n = 16 : i32} : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> + %res_1 = amdgpu.scaled_mfma 16x16x128 (%sC[0] * %opA) * (%sD[0] * %opB) + %cst_0 : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> return %res_0, %res_1 : vector<4xf32>, vector<4xf32> } @@ -192,7 +192,7 @@ func.func @scaled_mfma(%opA: vector<32xf4E2M1FN>, %opB: vector<32xf4E2M1FN>, %sc // CHECK: vector.insert {{.*}} : f8E8M0FNU into vector<4xf8E8M0FNU> // CHECK: vector.extract {{.*}} : f8E8M0FNU from vector<2xf8E8M0FNU> // CHECK: vector.insert {{.*}} : f8E8M0FNU into vector<4xf8E8M0FNU> -// CHECK: amdgpu.scaled_mfma({{.*}}[0] * {{.*}}) * ({{.*}}[0] * {{.*}} +// CHECK: amdgpu.scaled_mfma 16x16x128 ({{.*}}[0] * {{.*}}) * ({{.*}}[0] * {{.*}} func.func @scaled_mfma_less_than_4(%opA: vector<32xf4E2M1FN>, %opB: vector<32xf4E2M1FN>, %scalesA: vector<2xf8E8M0FNU>, %scalesB: vector<2xf8E8M0FNU>) -> vector<4xf32> { %cst_0 = arith.constant dense<0.000000e+00> : vector<4xf32> %cst_1 = arith.constant dense<5.877470e-39> : vector<4xf8E8M0FNU> @@ -200,17 +200,17 @@ func.func @scaled_mfma_less_than_4(%opA: vector<32xf4E2M1FN>, %opB: vector<32xf4 %sA = vector.insert %scaleA, %cst_1 [0] : f8E8M0FNU into vector<4xf8E8M0FNU> %scaleB = vector.extract %scalesB[1] : f8E8M0FNU from vector<2xf8E8M0FNU> %sB = vector.insert %scaleB, %cst_1 [0] : f8E8M0FNU into vector<4xf8E8M0FNU> - %res_0 = amdgpu.scaled_mfma(%sA[0] * %opA) * (%sB[0] * %opB) + %cst_0 {k = 128 : i32, m = 16 : i32, n = 16 : i32} : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> + %res_0 = amdgpu.scaled_mfma 16x16x128 (%sA[0] * %opA) * (%sB[0] * %opB) + %cst_0 : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> return %res_0 : vector<4xf32> } // ----- // CHECK-LABEL: func @scaled_mfma_ugly_shapes -// CHECK: amdgpu.scaled_mfma(%{{.*}}[0] * %{{.*}}) * (%{{.*}}[3] * %arg1) + %cst {k = 128 : i32, m = 16 : i32, n = 16 : i32} : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> -// CHECK: amdgpu.scaled_mfma(%{{.*}}[1] * %{{.*}}) * (%{{.*}}[3] * %arg1) + %cst {k = 128 : i32, m = 16 : i32, n = 16 : i32} : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> -// CHECK: amdgpu.scaled_mfma(%{{.*}}[2] * %{{.*}}) * (%{{.*}}[2] * %arg1) + %cst {k = 128 : i32, m = 16 : i32, n = 16 : i32} : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> -// CHECK: amdgpu.scaled_mfma(%{{.*}}[3] * %{{.*}}) * (%{{.*}}[1] * %arg1) + %cst {k = 128 : i32, m = 16 : i32, n = 16 : i32} : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> +// CHECK: amdgpu.scaled_mfma 16x16x128 (%{{.*}}[0] * %{{.*}}) * (%{{.*}}[3] * %arg1) + %cst : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> +// CHECK: amdgpu.scaled_mfma 16x16x128 (%{{.*}}[1] * %{{.*}}) * (%{{.*}}[3] * %arg1) + %cst : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> +// CHECK: amdgpu.scaled_mfma 16x16x128 (%{{.*}}[2] * %{{.*}}) * (%{{.*}}[2] * %arg1) + %cst : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> +// CHECK: amdgpu.scaled_mfma 16x16x128 (%{{.*}}[3] * %{{.*}}) * (%{{.*}}[1] * %arg1) + %cst : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> func.func @scaled_mfma_ugly_shapes(%opA: vector<32xf4E2M1FN>, %opB: vector<32xf4E2M1FN>, %scalesA: vector<5x5xf8E8M0FNU>, %scalesB: vector<7x23xf8E8M0FNU>) -> (vector<4xf32>, vector<4xf32>, vector<4xf32>, vector<4xf32>) { %cst_0 = arith.constant dense<0.000000e+00> : vector<4xf32> %cst_1 = arith.constant dense<5.877470e-39> : vector<4xf8E8M0FNU> @@ -237,10 +237,10 @@ func.func @scaled_mfma_ugly_shapes(%opA: vector<32xf4E2M1FN>, %opB: vector<32xf4 %sB_6_21 = vector.insert %scaleB_6_21, %cst_1 [0] : f8E8M0FNU into vector<4xf8E8M0FNU> %sB_6_20 = vector.insert %scaleB_6_20, %cst_1 [0] : f8E8M0FNU into vector<4xf8E8M0FNU> %sB_6_19 = vector.insert %scaleB_6_19, %cst_1 [0] : f8E8M0FNU into vector<4xf8E8M0FNU> - - %res_4 = amdgpu.scaled_mfma(%sA_0_4[0] * %opA) * (%sB_6_22[0] * %opB) + %cst_0 {k = 128 : i32, m = 16 : i32, n = 16 : i32} : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> - %res_5 = amdgpu.scaled_mfma(%sA_0_5[0] * %opA) * (%sB_6_21[0] * %opB) + %cst_0 {k = 128 : i32, m = 16 : i32, n = 16 : i32} : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> - %res_6 = amdgpu.scaled_mfma(%sA_0_6[0] * %opA) * (%sB_6_20[0] * %opB) + %cst_0 {k = 128 : i32, m = 16 : i32, n = 16 : i32} : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> - %res_7 = amdgpu.scaled_mfma(%sA_0_7[0] * %opA) * (%sB_6_19[0] * %opB) + %cst_0 {k = 128 : i32, m = 16 : i32, n = 16 : i32} : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> + + %res_4 = amdgpu.scaled_mfma 16x16x128 (%sA_0_4[0] * %opA) * (%sB_6_22[0] * %opB) + %cst_0 : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> + %res_5 = amdgpu.scaled_mfma 16x16x128 (%sA_0_5[0] * %opA) * (%sB_6_21[0] * %opB) + %cst_0 : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> + %res_6 = amdgpu.scaled_mfma 16x16x128 (%sA_0_6[0] * %opA) * (%sB_6_20[0] * %opB) + %cst_0 : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> + %res_7 = amdgpu.scaled_mfma 16x16x128 (%sA_0_7[0] * %opA) * (%sB_6_19[0] * %opB) + %cst_0 : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf32> return %res_4, %res_5, %res_6, %res_7 : vector<4xf32>, vector<4xf32>, vector<4xf32>, vector<4xf32> } diff --git a/mlir/test/Dialect/AMDGPU/invalid.mlir b/mlir/test/Dialect/AMDGPU/invalid.mlir index 6a2518a..5784764 100644 --- a/mlir/test/Dialect/AMDGPU/invalid.mlir +++ b/mlir/test/Dialect/AMDGPU/invalid.mlir @@ -19,9 +19,7 @@ func.func @mixing_packed_stoch_round_types(%arg0: f32, %arg1: i32, %arg2: vector func.func @bad_source_types(%a: vector<2xf32>, %b: vector<4xf16>, %c: vector<32xf32>) -> vector<32xf32> { // expected-error@+1 {{'amdgpu.mfma' op expected both non-small-float source operand types to match exactly}} - %d = amdgpu.mfma %a * %b + %c { - m = 32 : i32, n = 32 : i32, k = 1 : i32, blocks = 2 : i32, - abid = 0 : i32, cbsz = 0 : i32} blgp = none : vector<2xf32>, vector<4xf16>, vector<32xf32> + %d = amdgpu.mfma 32x32x1 %a * %b + %c { blocks = 2 : i32, abid = 0 : i32, cbsz = 0 : i32} blgp = none : vector<2xf32>, vector<4xf16>, vector<32xf32> func.return %d : vector<32xf32> } @@ -30,9 +28,7 @@ func.func @bad_source_types(%a: vector<2xf32>, %b: vector<4xf16>, func.func @bad_source_types_f8(%a: vector<8xf8E5M2FNUZ>, %b: vector<8xi8>, %c: vector<32xf32>) -> vector<32xf32> { // expected-error@+1 {{'amdgpu.mfma' op expected both source operands to have small-float elements if one does}} - %d = amdgpu.mfma %a * %b + %c { - m = 32 : i32, n = 32 : i32, k = 1 : i32, blocks = 2 : i32, - abid = 0 : i32, cbsz = 0 : i32} blgp = none : vector<8xf8E5M2FNUZ>, vector<8xi8>, vector<32xf32> + %d = amdgpu.mfma 32x32x1 %a * %b + %c { blocks = 2 : i32, abid = 0 : i32, cbsz = 0 : i32} blgp = none : vector<8xf8E5M2FNUZ>, vector<8xi8>, vector<32xf32> func.return %d : vector<32xf32> } @@ -41,9 +37,7 @@ func.func @bad_source_types_f8(%a: vector<8xf8E5M2FNUZ>, %b: vector<8xi8>, func.func @bad_source_arguments(%a: vector<2xf32>, %b: vector<2xf32>, %c: vector<32xf32>) -> vector<32xf32> { // expected-error@+1 {{'amdgpu.mfma' op expected 1 source values for this operation but got 2}} - %d = amdgpu.mfma %a * %b + %c { - m = 32 : i32, n = 32 : i32, k = 1 : i32, blocks = 2 : i32, - abid = 0 : i32, cbsz = 0 : i32} blgp = none : vector<2xf32>, vector<2xf32>, vector<32xf32> + %d = amdgpu.mfma 32x32x1 %a * %b + %c { blocks = 2 : i32, abid = 0 : i32, cbsz = 0 : i32} blgp = none : vector<2xf32>, vector<2xf32>, vector<32xf32> func.return %d : vector<32xf32> } @@ -52,9 +46,7 @@ func.func @bad_source_arguments(%a: vector<2xf32>, %b: vector<2xf32>, func.func @bad_source_arguments_i8(%a: vector<8xi8>, %b: vector<8xi8>, %c: vector<4xi32>) -> vector<4xi32> { // expected-error@+1 {{'amdgpu.mfma' op expected 4 source values for this operation but got 8}} - %d = amdgpu.mfma %a * %b + %c { - m = 32 : i32, n = 32 : i32, k = 4 : i32, blocks = 2 : i32, - abid = 0 : i32, cbsz = 0 : i32} blgp = none : vector<8xi8>, vector<8xi8>, vector<4xi32> + %d = amdgpu.mfma 32x32x4 %a * %b + %c { blocks = 2 : i32, abid = 0 : i32, cbsz = 0 : i32} blgp = none : vector<8xi8>, vector<8xi8>, vector<4xi32> func.return %d : vector<4xi32> } @@ -62,9 +54,7 @@ func.func @bad_source_arguments_i8(%a: vector<8xi8>, %b: vector<8xi8>, func.func @bad_dest_type(%a: f32, %b: f32, %c: vector<16xf32>) -> vector<16xf32> { // expected-error@+1 {{'amdgpu.mfma' op expected 32 result values for this operation but got 16}} - %d = amdgpu.mfma %a * %b + %c { - m = 32 : i32, n = 32 : i32, k = 1 : i32, blocks = 2 : i32, - abid = 0 : i32, cbsz = 0 : i32} blgp = none : f32, f32, vector<16xf32> + %d = amdgpu.mfma 32x32x1 %a * %b + %c { blocks = 2 : i32, abid = 0 : i32, cbsz = 0 : i32} blgp = none : f32, f32, vector<16xf32> return %d : vector<16xf32> } @@ -72,9 +62,7 @@ func.func @bad_dest_type(%a: f32, %b: f32, %c: vector<16xf32>) -> vector<16xf32> func.func @f64_permuting_b(%a: f64, %b: f64, %c: vector<4xf64>) -> vector<4xf64> { // expected-error@+1 {{'amdgpu.mfma' op double-precision ops do not support permuting lanes of B}} - %d = amdgpu.mfma %a * %b + %c { - m = 16 : i32, n = 16 : i32, k = 4 : i32, blocks = 1 : i32, - abid = 0 : i32, cbsz = 0 : i32} blgp = bcast_first_32 : f64, f64, vector<4xf64> + %d = amdgpu.mfma 16x16x4 %a * %b + %c { abid = 0 : i32, cbsz = 0 : i32} blgp = bcast_first_32 : f64, f64, vector<4xf64> return %d : vector<4xf64> } @@ -82,9 +70,7 @@ func.func @f64_permuting_b(%a: f64, %b: f64, %c: vector<4xf64>) -> vector<4xf64> func.func @f64_permuting_a(%a: f64, %b: f64, %c: vector<4xf64>) -> vector<4xf64> { // expected-error@+1 {{'amdgpu.mfma' op double-precision ops do not support permuting lanes of A}} - %d = amdgpu.mfma %a * %b + %c { - m = 16 : i32, n = 16 : i32, k = 4 : i32, blocks = 1 : i32, - abid = 0 : i32, cbsz = 1 : i32} blgp = none : f64, f64, vector<4xf64> + %d = amdgpu.mfma 16x16x4 %a * %b + %c { abid = 0 : i32, cbsz = 1 : i32} blgp = none : f64, f64, vector<4xf64> return %d : vector<4xf64> } @@ -92,9 +78,7 @@ func.func @f64_permuting_a(%a: f64, %b: f64, %c: vector<4xf64>) -> vector<4xf64> func.func @abid_without_bradcast(%a: f32, %b: f32, %c: vector<32xf32>) -> vector<32xf32> { // expected-error@+1 {{'amdgpu.mfma' op block ID for permuting A (abid) must be below 2 ** cbsz}} - %d = amdgpu.mfma %a * %b + %c { - m = 32 : i32, n = 32 : i32, k = 1 : i32, blocks = 2 : i32, - abid = 1 : i32, cbsz = 0 : i32} blgp = none : f32, f32, vector<32xf32> + %d = amdgpu.mfma 32x32x1 %a * %b + %c { blocks = 2 : i32, abid = 1 : i32, cbsz = 0 : i32} blgp = none : f32, f32, vector<32xf32> func.return %d : vector<32xf32> } @@ -102,9 +86,7 @@ func.func @abid_without_bradcast(%a: f32, %b: f32, %c: vector<32xf32>) -> vector func.func @abid_too_large(%a: f32, %b: f32, %c: vector<32xf32>) -> vector<32xf32> { // expected-error@+1 {{'amdgpu.mfma' op block ID for permuting A (abid) must be below 2 ** cbsz}} - %d = amdgpu.mfma %a * %b + %c { - m = 32 : i32, n = 32 : i32, k = 1 : i32, blocks = 2 : i32, - abid = 2 : i32, cbsz = 1 : i32} blgp = none : f32, f32, vector<32xf32> + %d = amdgpu.mfma 32x32x1 %a * %b + %c { blocks = 2 : i32, abid = 2 : i32, cbsz = 1 : i32} blgp = none : f32, f32, vector<32xf32> func.return %d : vector<32xf32> } @@ -112,9 +94,39 @@ func.func @abid_too_large(%a: f32, %b: f32, %c: vector<32xf32>) -> vector<32xf32 func.func @no_negation(%a: f32, %b: f32, %c: vector<32xf32>) -> vector<32xf32> { // expected-error@+1 {{'amdgpu.mfma' op negation flags only available for double-precision operations}} - %d = amdgpu.mfma %a * %b + %c { - m = 32 : i32, n = 32 : i32, k = 1 : i32, blocks = 2 : i32, - abid = 0 : i32, cbsz = 0 : i32, negateA} blgp = none : f32, f32, vector<32xf32> + %d = amdgpu.mfma 32x32x1 %a * %b + %c { blocks = 2 : i32, abid = 0 : i32, cbsz = 0 : i32, negateA} blgp = none : f32, f32, vector<32xf32> + func.return %d : vector<32xf32> +} + +// ----- + +func.func @mfma_invalid_m(%a: f32, %b: f32, %c: vector<32xf32>) -> vector<32xf32> { + // expected-error@+1 {{'amdgpu.mfma' op attribute 'm' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {4, 16, 32}}} + %d = amdgpu.mfma 7x32x1 %a * %b + %c { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : f32, f32, vector<32xf32> + func.return %d : vector<32xf32> +} + +// ----- + +func.func @mfma_invalid_n(%a: f32, %b: f32, %c: vector<32xf32>) -> vector<32xf32> { + // expected-error@+1 {{'amdgpu.mfma' op attribute 'n' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {4, 16, 32}}} + %d = amdgpu.mfma 32x7x1 %a * %b + %c { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : f32, f32, vector<32xf32> + func.return %d : vector<32xf32> +} + +// ----- + +func.func @mfma_invalid_k(%a: f32, %b: f32, %c: vector<32xf32>) -> vector<32xf32> { + // expected-error@+1 {{'amdgpu.mfma' op attribute 'k' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {1, 2, 4, 8, 16, 32, 64, 128}}} + %d = amdgpu.mfma 32x32x3 %a * %b + %c { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : f32, f32, vector<32xf32> + func.return %d : vector<32xf32> +} + +// ----- + +func.func @mfma_invalid_blocks(%a: f32, %b: f32, %c: vector<32xf32>) -> vector<32xf32> { + // expected-error@+1 {{'amdgpu.mfma' op attribute 'blocks' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {1, 2, 4, 16}}} + %d = amdgpu.mfma 32x32x1 %a * %b + %c { blocks = 7 : i32, abid = 0 : i32, cbsz = 0 : i32 } blgp = none : f32, f32, vector<32xf32> func.return %d : vector<32xf32> } @@ -302,3 +314,27 @@ func.func @amdgpu.scaled_ext_packed816_invalid_input_output_sizes(%v: vector<8xf %ret0 = amdgpu.scaled_ext_packed816 %v scale(%scale) blockSize(16) firstScaleLane(0) firstScaleByte(0) : vector<8xf8E5M2>, vector<4xf8E8M0FNU> -> vector<16xf16> func.return } + +// ----- + +func.func @scaled_mfma_invalid_m(%arg0 : vector<4xf8E8M0FNU>, %arg1 : vector<32xf4E2M1FN>, %arg2 : vector<16xf32>) -> vector<16xf32> { + // expected-error@+1 {{'amdgpu.scaled_mfma' op attribute 'm' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {16, 32}}} + %0 = amdgpu.scaled_mfma 8x32x64 (%arg0[0] * %arg1) * (%arg0[1] * %arg1) + %arg2 : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<16xf32> + func.return %0 : vector<16xf32> +} + +// ----- + +func.func @scaled_mfma_invalid_n(%arg0 : vector<4xf8E8M0FNU>, %arg1 : vector<32xf4E2M1FN>, %arg2 : vector<16xf32>) -> vector<16xf32> { + // expected-error@+1 {{'amdgpu.scaled_mfma' op attribute 'n' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {16, 32}}} + %0 = amdgpu.scaled_mfma 32x8x64 (%arg0[0] * %arg1) * (%arg0[1] * %arg1) + %arg2 : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<16xf32> + func.return %0 : vector<16xf32> +} + +// ----- + +func.func @scaled_mfma_invalid_k(%arg0 : vector<4xf8E8M0FNU>, %arg1 : vector<32xf4E2M1FN>, %arg2 : vector<16xf32>) -> vector<16xf32> { + // expected-error@+1 {{'amdgpu.scaled_mfma' op attribute 'k' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {64, 128}}} + %0 = amdgpu.scaled_mfma 32x32x32 (%arg0[0] * %arg1) * (%arg0[1] * %arg1) + %arg2 : vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<4xf8E8M0FNU>, vector<32xf4E2M1FN>, vector<16xf32> + func.return %0 : vector<16xf32> +} diff --git a/mlir/test/Dialect/AMDGPU/ops.mlir b/mlir/test/Dialect/AMDGPU/ops.mlir index a185eb6..a330967 100644 --- a/mlir/test/Dialect/AMDGPU/ops.mlir +++ b/mlir/test/Dialect/AMDGPU/ops.mlir @@ -559,9 +559,16 @@ func.func @sched_barrier() { } // CHECK-LABEL: func @mfma -func.func @mfma(%arg0 : f32, %arg1 : vector<32xf32>) -> vector<32xf32> { - // CHECK: amdgpu.mfma - %0 = amdgpu.mfma %arg0 * %arg0 + %arg1 { abid = 1 : i32, cbsz = 1 : i32, k = 1 : i32, m = 32 : i32, n = 32 : i32, blocks = 2 : i32 } blgp = bcast_second_32 : f32, f32, vector<32xf32> +func.func @mfma(%arg0 : vector<4xf16>, %arg1 : vector<4xf32>) -> vector<4xf32> { + // CHECK: amdgpu.mfma 16x16x16 + %0 = amdgpu.mfma 16x16x16 %arg0 * %arg0 + %arg1 { abid = 0 : i32, cbsz = 0 : i32 } blgp = none : vector<4xf16>, vector<4xf16>, vector<4xf32> + func.return %0 : vector<4xf32> +} + +// CHECK-LABEL: func @mfma_with_blocks +func.func @mfma_with_blocks(%arg0 : f32, %arg1 : vector<32xf32>) -> vector<32xf32> { + // CHECK: amdgpu.mfma 32x32x1 + %0 = amdgpu.mfma 32x32x1 %arg0 * %arg0 + %arg1 { abid = 1 : i32, cbsz = 1 : i32, blocks = 2 : i32 } blgp = bcast_second_32 : f32, f32, vector<32xf32> func.return %0 : vector<32xf32> } @@ -602,8 +609,8 @@ func.func @permlane32_swap(%arg0 : f32) -> f32 { // CHECK-LABEL: func @scaled_mfma func.func @scaled_mfma(%arg0 : f8E8M0FNU, %arg1 : vector<32xf6E2M3FN>, %arg2 : vector<16xf32>) -> vector<16xf32> { - // CHECK: amdgpu.scaled_mfma - %0 = amdgpu.scaled_mfma(%arg0[0] * %arg1) * (%arg0[1] * %arg1) + %arg2 { k = 64 : i32, m = 32 : i32, n = 32 : i32 } : f8E8M0FNU, vector<32xf6E2M3FN>, f8E8M0FNU, vector<32xf6E2M3FN>, vector<16xf32> + // CHECK: amdgpu.scaled_mfma 32x32x64 + %0 = amdgpu.scaled_mfma 32x32x64 (%arg0[0] * %arg1) * (%arg0[1] * %arg1) + %arg2 : f8E8M0FNU, vector<32xf6E2M3FN>, f8E8M0FNU, vector<32xf6E2M3FN>, vector<16xf32> func.return %0 : vector<16xf32> } |