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| author | Sander de Smalen <sander.desmalen@arm.com> | 2023-05-12 08:22:21 +0000 |
|---|---|---|
| committer | Sander de Smalen <sander.desmalen@arm.com> | 2023-05-12 08:43:13 +0000 |
| commit | c89266448666262a3fc3b2f620d65078b4edd0ba (patch) | |
| tree | d9c250b68dde65dd96f1ea2b11d57e67c5d414cc /mlir/lib/Bytecode/Reader/BytecodeReader.cpp | |
| parent | 3b95b818135f85376082621149e59c297f640c14 (diff) | |
| download | llvm-c89266448666262a3fc3b2f620d65078b4edd0ba.zip llvm-c89266448666262a3fc3b2f620d65078b4edd0ba.tar.gz llvm-c89266448666262a3fc3b2f620d65078b4edd0ba.tar.bz2 | |
[AArch64][SME2/SVE2p1] Add predicate-as-counter intrinsics for while*
These intrinsics are used to implement the while intrinsics that result
in a predicate-as-counter value, e.g.
__attribute__((arm_streaming))
svcount_t svwhilelt_c8(int64_t rn, int64_t rm, uint64_t vl)
As described in https://github.com/ARM-software/acle/pull/217
Reviewed By: hassnaa-arm
Differential Revision: https://reviews.llvm.org/D150265
Diffstat (limited to 'mlir/lib/Bytecode/Reader/BytecodeReader.cpp')
0 files changed, 0 insertions, 0 deletions