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authorCraig Topper <craig.topper@sifive.com>2025-10-02 21:14:43 -0700
committerGitHub <noreply@github.com>2025-10-02 21:14:43 -0700
commit874428708f3bcf2fc8402b2aa0ca720c1b6cd3a6 (patch)
tree60ecf1e8a3dc3794799d66aeb1a8ac990b291f57 /mlir/lib/Bindings/Python/MainModule.cpp
parent715e0fab00fc7c6cbbbf84c1309f36dc9c613553 (diff)
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[RISCV][GISel] Use relaxed_load/store in GISel atomic patterns. NFC (#161712)
We have additional patterns for GISel because we need to make s16 and s32 legal for load/store. GISel does not distinquish integer and FP scalar types in LLT. We only know whether the load should be integer or FP after register bank selection. These patterns should have been updated to use relaxed_load/store when the patterns in RISCVInstrInfoA.td were updated. Without this we will miscompile loads/stores with strong memory ordering when Zalasr is enabled. This patch just fixes the miscompile, Zalasr will now cause a GISel abort in some cases. A follow up patch will add additional GISel patterns for Zalasr.
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