diff options
| author | Gabriel Hjort Åkerlund <gabriel.hjort.akerlund@ericsson.com> | 2020-09-18 10:08:32 +0200 |
|---|---|---|
| committer | Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> | 2020-09-18 11:01:11 +0200 |
| commit | c10200536f2ee3f29a7d2b82812e5d13b40fc3e4 (patch) | |
| tree | 0c26d62c5b22c097fa0be9bfa3b944992ca49f8a /llvm/utils/TableGen/CodeGenTarget.cpp | |
| parent | 2afe4becec77d91b47afcc4b6eaaa1002cebf837 (diff) | |
| download | llvm-c10200536f2ee3f29a7d2b82812e5d13b40fc3e4.zip llvm-c10200536f2ee3f29a7d2b82812e5d13b40fc3e4.tar.gz llvm-c10200536f2ee3f29a7d2b82812e5d13b40fc3e4.tar.bz2 | |
[TableGen][GlobalISel] Fix handling of zero_reg
When generating matching tables for GlobalISel, TableGen would output
"::zero_reg" whenever encountering the zero_reg, which in turn would
result in compilation error. This patch fixes that by instead outputting
NoRegister (== 0), which is the same result that TableGen produces when
generating matching tables for ISelDAG.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D86215
Diffstat (limited to 'llvm/utils/TableGen/CodeGenTarget.cpp')
| -rw-r--r-- | llvm/utils/TableGen/CodeGenTarget.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp index 889110a..302d3e9 100644 --- a/llvm/utils/TableGen/CodeGenTarget.cpp +++ b/llvm/utils/TableGen/CodeGenTarget.cpp @@ -266,6 +266,11 @@ StringRef CodeGenTarget::getInstNamespace() const { return ""; } +StringRef CodeGenTarget::getRegNamespace() const { + auto &RegClasses = RegBank->getRegClasses(); + return RegClasses.size() > 0 ? RegClasses.front().Namespace : ""; +} + Record *CodeGenTarget::getInstructionSet() const { return TargetRec->getValueAsDef("InstructionSet"); } |