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| author | James Molloy <jmolloy@google.com> | 2019-09-19 13:39:54 +0000 |
|---|---|---|
| committer | James Molloy <jmolloy@google.com> | 2019-09-19 13:39:54 +0000 |
| commit | 88a5fbfcea79b4711542f0587bed39aa392da12f (patch) | |
| tree | f0fe771785e9a746017136a34f0d62752e6054c7 /llvm/utils/TableGen/CodeGenTarget.cpp | |
| parent | b88800d8829b9a6602547e26050fffd528e21822 (diff) | |
| download | llvm-88a5fbfcea79b4711542f0587bed39aa392da12f.zip llvm-88a5fbfcea79b4711542f0587bed39aa392da12f.tar.gz llvm-88a5fbfcea79b4711542f0587bed39aa392da12f.tar.bz2 | |
[TableGen] Support encoding per-HwMode
Much like ValueTypeByHwMode/RegInfoByHwMode, this patch allows targets
to modify an instruction's encoding based on HwMode. When the
EncodingInfos field is non-empty the Inst and Size fields of the Instruction
are ignored and taken from EncodingInfos instead.
As part of this promote getHwMode() from TargetSubtargetInfo to MCSubtargetInfo.
This is NFC for all existing targets - new code is generated only if targets
use EncodingByHwMode.
llvm-svn: 372320
Diffstat (limited to 'llvm/utils/TableGen/CodeGenTarget.cpp')
| -rw-r--r-- | llvm/utils/TableGen/CodeGenTarget.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp index 478bbb7..fa8b842 100644 --- a/llvm/utils/TableGen/CodeGenTarget.cpp +++ b/llvm/utils/TableGen/CodeGenTarget.cpp @@ -478,7 +478,8 @@ void CodeGenTarget::reverseBitsForLittleEndianEncoding() { if (!isLittleEndianEncoding()) return; - std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction"); + std::vector<Record *> Insts = + Records.getAllDerivedDefinitions("InstructionEncoding"); for (Record *R : Insts) { if (R->getValueAsString("Namespace") == "TargetOpcode" || R->getValueAsBit("isPseudo")) |