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| author | Carl Ritson <carl.ritson@amd.com> | 2021-06-11 08:40:51 +0900 |
|---|---|---|
| committer | Carl Ritson <carl.ritson@amd.com> | 2021-06-11 08:58:16 +0900 |
| commit | 2c2d2922a24b7fa8a92f38d9043ab476d330210d (patch) | |
| tree | 213be0adac2ad945d8f8a753c1bc03c8d0d0f120 /llvm/utils/TableGen/CodeGenTarget.cpp | |
| parent | cfbb92441f17d1f5a9d9c3e195646df4117cb0ca (diff) | |
| download | llvm-2c2d2922a24b7fa8a92f38d9043ab476d330210d.zip llvm-2c2d2922a24b7fa8a92f38d9043ab476d330210d.tar.gz llvm-2c2d2922a24b7fa8a92f38d9043ab476d330210d.tar.bz2 | |
[ValueTypes] Define MVTs for v6i32, v6f32, v7i32, v7f32
For use in AMDGPU selection DAG.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D103881
Diffstat (limited to 'llvm/utils/TableGen/CodeGenTarget.cpp')
| -rw-r--r-- | llvm/utils/TableGen/CodeGenTarget.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp index a1e6784..f788903 100644 --- a/llvm/utils/TableGen/CodeGenTarget.cpp +++ b/llvm/utils/TableGen/CodeGenTarget.cpp @@ -117,6 +117,8 @@ StringRef llvm::getEnumName(MVT::SimpleValueType T) { case MVT::v3i32: return "MVT::v3i32"; case MVT::v4i32: return "MVT::v4i32"; case MVT::v5i32: return "MVT::v5i32"; + case MVT::v6i32: return "MVT::v6i32"; + case MVT::v7i32: return "MVT::v7i32"; case MVT::v8i32: return "MVT::v8i32"; case MVT::v16i32: return "MVT::v16i32"; case MVT::v32i32: return "MVT::v32i32"; @@ -160,6 +162,8 @@ StringRef llvm::getEnumName(MVT::SimpleValueType T) { case MVT::v3f32: return "MVT::v3f32"; case MVT::v4f32: return "MVT::v4f32"; case MVT::v5f32: return "MVT::v5f32"; + case MVT::v6f32: return "MVT::v6f32"; + case MVT::v7f32: return "MVT::v7f32"; case MVT::v8f32: return "MVT::v8f32"; case MVT::v16f32: return "MVT::v16f32"; case MVT::v32f32: return "MVT::v32f32"; |