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author | Jay Foad <jay.foad@amd.com> | 2023-08-14 14:08:57 +0100 |
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committer | Jay Foad <jay.foad@amd.com> | 2023-08-14 15:22:35 +0100 |
commit | 6551cfa8eb2960dbc27e2882b204c4e0aff0109f (patch) | |
tree | 98cea3860238e1c60b4f6ae9d59a272388af3c9a /llvm/utils/TableGen/CodeGenRegisters.cpp | |
parent | 2e7ee4dc21430b0fe4c9ee306dc1d8c7986a6646 (diff) | |
download | llvm-6551cfa8eb2960dbc27e2882b204c4e0aff0109f.zip llvm-6551cfa8eb2960dbc27e2882b204c4e0aff0109f.tar.gz llvm-6551cfa8eb2960dbc27e2882b204c4e0aff0109f.tar.bz2 |
[CodeGen] Set regunitmasks for leaf regs to all instead of none
This simplifies every use of MCRegUnitMaskIterator.
Differential Revision: https://reviews.llvm.org/D157864
Diffstat (limited to 'llvm/utils/TableGen/CodeGenRegisters.cpp')
-rw-r--r-- | llvm/utils/TableGen/CodeGenRegisters.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp index 74fb806..b8dde6e 100644 --- a/llvm/utils/TableGen/CodeGenRegisters.cpp +++ b/llvm/utils/TableGen/CodeGenRegisters.cpp @@ -2123,8 +2123,8 @@ void CodeGenRegBank::computeRegUnitLaneMasks() { for (auto &Register : Registers) { // Create an initial lane mask for all register units. const auto &RegUnits = Register.getRegUnits(); - CodeGenRegister::RegUnitLaneMaskList - RegUnitLaneMasks(RegUnits.count(), LaneBitmask::getNone()); + CodeGenRegister::RegUnitLaneMaskList RegUnitLaneMasks( + RegUnits.count(), LaneBitmask::getAll()); // Iterate through SubRegisters. typedef CodeGenRegister::SubRegMap SubRegMap; const SubRegMap &SubRegs = Register.getSubRegs(); @@ -2143,7 +2143,7 @@ void CodeGenRegBank::computeRegUnitLaneMasks() { unsigned u = 0; for (unsigned RU : RegUnits) { if (SUI == RU) { - RegUnitLaneMasks[u] |= LaneMask; + RegUnitLaneMasks[u] &= LaneMask; assert(!Found); Found = true; } |